diff --git a/verilog/sd2snes/dac_test.v b/verilog/sd2snes/dac_test.v
index 40d16d8..790c82c 100644
--- a/verilog/sd2snes/dac_test.v
+++ b/verilog/sd2snes/dac_test.v
@@ -19,7 +19,8 @@
//
//////////////////////////////////////////////////////////////////////////////////
module dac_test(
- input clkin,
+ input clkin,
+ input sysclk,
input we,
input[10:0] pgm_address,
input[7:0] pgm_data,
@@ -43,6 +44,15 @@ reg[7:0] vol_reg;
reg[7:0] vol_target_reg;
reg[1:0] vol_latch_reg;
reg vol_valid;
+reg[2:0] sysclk_sreg;
+wire sysclk_rising = (sysclk_sreg[2:1] == 2'b01);
+
+reg [16:0] interpol_count;
+reg interpol_overflow;
+
+always @(posedge clkin) begin
+ sysclk_sreg <= {sysclk_sreg[1:0], sysclk};
+end
dac_buf snes_dac_buf (
.clka(clkin),
@@ -94,6 +104,23 @@ initial begin
samples <= 16'h0;
end
+always @(posedge clkin) begin
+ if(reset_rising) begin
+ dac_address_r <= 0;
+ interpol_overflow <= 0;
+ interpol_count <= 0;
+ end else if(sysclk_rising) begin
+ if(interpol_count > 65437) begin
+ interpol_count <= interpol_count + 135 - 65573;
+ dac_address_r <= dac_address_r + play_r;
+ interpol_overflow <= 1;
+ end else begin
+ interpol_count <= interpol_count + 135;
+ interpol_overflow <= 0;
+ end
+ end
+end
+
always @(posedge clkin) begin
cnt <= cnt + 1;
lrck_sreg <= {lrck_sreg[1:0], lrck};
@@ -126,7 +153,6 @@ end
always @(posedge clkin) begin
if (lrck_rising) begin // right channel
smpshift <= (({16'h0, dac_data[31:16]^16'h8000} * vol_reg) >> 8) ^ 16'h8000;
- dac_address_r <= reset_rising ? 9'h0 : (dac_address_r + play_r);
samples <= samples + 1;
end else if (lrck_falling) begin // left channel
smpshift <= (({16'h0, dac_data[15:0]^16'h8000} * vol_reg) >> 8) ^ 16'h8000;
diff --git a/verilog/sd2snes/ipcore_dir/dac_buf.v b/verilog/sd2snes/ipcore_dir/dac_buf.v
index f84343f..cd050d4 100644
--- a/verilog/sd2snes/ipcore_dir/dac_buf.v
+++ b/verilog/sd2snes/ipcore_dir/dac_buf.v
@@ -62,7 +62,7 @@ output [31 : 0] doutb;
.C_ADDRB_WIDTH(9),
.C_ALGORITHM(1),
.C_BYTE_SIZE(9),
- .C_COMMON_CLK(1),
+ .C_COMMON_CLK(0),
.C_DEFAULT_DATA("0"),
.C_DISABLE_WARN_BHV_COLL(0),
.C_DISABLE_WARN_BHV_RANGE(0),
diff --git a/verilog/sd2snes/ipcore_dir/dac_buf.xise b/verilog/sd2snes/ipcore_dir/dac_buf.xise
index 31cc58d..d198247 100644
--- a/verilog/sd2snes/ipcore_dir/dac_buf.xise
+++ b/verilog/sd2snes/ipcore_dir/dac_buf.xise
@@ -36,29 +36,332 @@
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diff --git a/verilog/sd2snes/main.v b/verilog/sd2snes/main.v
index cfc5dda..11ad4e4 100644
--- a/verilog/sd2snes/main.v
+++ b/verilog/sd2snes/main.v
@@ -114,6 +114,7 @@ sd_dma snes_sd_dma(.CLK(CLK2),
);
dac_test snes_dac_test(.clkin(CLK2),
+ .sysclk(SNES_SYSCLK),
.mclk(DAC_MCLK),
.lrck(DAC_LRCK),
.sdout(DAC_SDOUT),
diff --git a/verilog/sd2snes/sd2snes.xise b/verilog/sd2snes/sd2snes.xise
index 06f4f6b..25d999d 100644
--- a/verilog/sd2snes/sd2snes.xise
+++ b/verilog/sd2snes/sd2snes.xise
@@ -66,6 +66,10 @@
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