diff --git a/verilog/sd2sneslite/main.ucf b/verilog/sd2sneslite/main.ucf
index 8ec5c4d..284bcc8 100644
--- a/verilog/sd2sneslite/main.ucf
+++ b/verilog/sd2sneslite/main.ucf
@@ -1,5 +1,5 @@
 NET "CLKIN" TNM_NET = "CLKIN";
-TIMESPEC TS_CLKIN = PERIOD "CLKIN" 24 MHz HIGH 50 %;
+TIMESPEC TS_CLKIN = PERIOD "CLKIN" 24.05 MHz HIGH 50 %;
 //TIMESPEC TS_CLKIN = PERIOD "CLKIN" 21.5 MHz HIGH 50 %;
 
 NET "p113_out" IOSTANDARD = LVCMOS33;
@@ -9,7 +9,7 @@ NET "p113_out" LOC = P113;
 NET "SPI_SCK" LOC = P71;
 NET "SPI_SCK" CLOCK_DEDICATED_ROUTE = FALSE;
 NET "SPI_SCK" TNM_NET = "SPI_SCK";
-TIMESPEC TS_SPI_SCK = PERIOD "SPI_SCK" 48MHz HIGH 50 %;
+TIMESPEC TS_SPI_SCK = PERIOD "SPI_SCK" 48.1MHz HIGH 50 %;
 
 NET "SPI_SCK" IOSTANDARD = LVCMOS33;
 NET "SPI_SCK" DRIVE = 8;