From bc5cf05880437d4e8eb66af34d42380165a77c76 Mon Sep 17 00:00:00 2001 From: ikari Date: Sat, 8 May 2010 10:07:15 +0200 Subject: [PATCH] SuperCIC key: improve mid-operation pair mode detect; documentation, cleanup. --- cic/supercic/supercic-key.asm | 17 +++++++++-------- cic/supercic/supercic-lock.asm | 24 ++++++++++++------------ 2 files changed, 21 insertions(+), 20 deletions(-) diff --git a/cic/supercic/supercic-key.asm b/cic/supercic/supercic-key.asm index c6ceeda..fa88648 100644 --- a/cic/supercic/supercic-key.asm +++ b/cic/supercic/supercic-key.asm @@ -28,7 +28,7 @@ processor p12f629 ; +5V (27,58) [16] |1 8| GND (5,36) [8] ; CIC clk (56) [6] |2 7| CIC data i/o 0 (55) [2] ; status out |3 6| CIC data i/o 1 (24) [1] -; nc |4 5| CIC slave reset (25) [7] +; /PAIR |4 5| CIC slave reset (25) [7] ; `-------' ; ; @@ -38,7 +38,7 @@ processor p12f629 ; -------------------------+---------------------------- ; OK or no lock CIC | high ; error | low -; SuperCIC pair mode | high-low alternating @1kHz +; SuperCIC pair mode | 148.75kHz / 50% duty cycle ; ; In case lockout fails, the region is switched automatically and ; will be used after the next reset. @@ -53,7 +53,8 @@ processor p12f629 ; 0x4d buffer for eeprom access ; 0x4e loop variable for longwait ; 0x4f loop variable for wait -; +; 0x5e SuperCIC pair mode detect (phase 1) +; 0x5f SuperCIC pair mode detect (phase 2) ; --------------------------------------------------------------------- @@ -444,13 +445,13 @@ mangle_key_withskip bcf GPIO, 0 movf GPIO, w movwf 0x5e - btfsc GPIO, 3 + btfss GPIO, 3 bsf GPIO, 0 movf GPIO, w movwf 0x5f bcf GPIO, 0 - nop - nop + btfsc GPIO, 3 + clrf 0x5e nop btfss 0x20, 4 ; skip if half-byte carry goto mangle_return ; +2 cycles in return @@ -622,7 +623,7 @@ mangle_lock_withskip goto scic_pair_skip1 btfsc 0x5f, 1 goto scic_pair_skip2 - btfss GPIO, 3 + btfsc GPIO, 3 goto scic_pair_skip3 goto supercic_pairmode scic_pair_skip1 @@ -696,7 +697,7 @@ die_intloop banksel GPIO bcf GPIO, 4 -; --------forever: blink status pin-------- +; --------get caught up-------- die_trap goto die_trap ; ----------------------------------------------------------------------- diff --git a/cic/supercic/supercic-lock.asm b/cic/supercic/supercic-lock.asm index 63d49ea..02d14aa 100644 --- a/cic/supercic/supercic-lock.asm +++ b/cic/supercic/supercic-lock.asm @@ -40,21 +40,21 @@ processor p16f630 ; pin 9 connected to key CIC pin 1 (or clone CIC pin 6) ; pin 10 connected to key CIC pin 2 (or clone CIC pin 7) ; pin 11 connected to key CIC pin 9 (SNES /reset line) -; pin 12 connected to PPU1 pin 24 and PPU2 pin 30 (both isolated from mainboard) +; pin 12 connected to PPU1 pin 24 & PPU2 pin 30 (both isolated from mainboard) ; pin 13 connected to reset button ; ; D4 out is always switched to the autodetected region and is not user -; overridable. It can be used, by adding an address decoder and a latch, -; to override bit 4 of the $213f register (used by games to detect the -; console region). +; overridable except in SuperCIC pair mode. +; It can be used, by adding an address decoder and a latch, to override +; bit 4 of the $213f register (used by games to detect the console region). ; ; Host reset out behaves as follows: ; After powerup it is held low for a couple of ms to allow the components ; to power-up properly. ; It is then asserted a high level even if the CIC "auth" should fail at ; any point, thus enabling homebrew or other cartridges without a CIC or -; CIC clone to be run properly while maintaining compatibility with CIC -; demanding cartridges like S-DD1 or SA-1 powered ones. +; CIC clone to be run properly while maintaining compatibility with +; cartridges requiring a CIC, like S-DD1 or SA-1 games. ; The type of key CIC (411/413) is detected automatically. ; ; This implementation supports automatic 50/60Hz switching based on the @@ -80,12 +80,12 @@ processor p16f630 ; immediately. ; ; SuperCIC pair mode: when a SuperCIC lock and SuperCIC key detect each other -; they both switch both of the data pins to inputs. The lock then passes through -; data i/o 0 to SNES 50/60Hz and data i/o 1 to an optional D4 output (for -; overriding the 213f register using additional hardware). This makes it -; possible to switch 50/60Hz and D4 from the cartridge slot, e.g. by connecting -; an additional MCU to the CIC data lines. Of course, they have to be tristated -; for normal (non-passthrough) operation first. +; they both switch both of the data pins to inputs. The lock then passes +; through data i/o 0 to SNES 50/60Hz and data i/o 1 to an optional D4 output +; (for overriding the 213f register using additional hardware). This makes it +; possible to switch 50/60Hz and D4 from the cartridge slot, e.g. by +; connecting an additional MCU to the CIC data lines. Of course, they have to +; be tristated for normal (non-passthrough) operation. ; ; Table 1. 50/60Hz output behavior according to user setting and key CIC type. ; SuperCIC key CIC "region"