cleanup, more gfx tests

This commit is contained in:
ikari 2009-10-21 00:51:36 +02:00
parent a749f77037
commit c14d25f6e2
6 changed files with 251 additions and 261 deletions

View File

@ -1,4 +1,4 @@
OBJS = header.ips reset.o65 main.o65 font.o65 palette.o65 data.o65 const.o65 logo.o65 text.o65 # gfx.o65 # vars.o65 OBJS = header.ips reset.o65 main.o65 font.o65 palette.o65 data.o65 const.o65 logo.o65 text.o65 dma.o65 # gfx.o65 # vars.o65
all: menu.bin all: menu.bin

View File

@ -1,6 +1,7 @@
version .byt " v0.1",0
zero .word 0 zero .word 0
bg2tile .byt $20 bg2tile .byt $20
hdma_pal .byt 44 hdma_pal_src .byt 44
.byt $60, $2d .byt $60, $2d
.byt 24 .byt 24
.byt $00, $00 .byt $00, $00
@ -35,7 +36,9 @@ hdma_pal .byt 44
.byt 1 .byt 1
.byt $60, $2d .byt $60, $2d
.byt $00 .byt $00
hdma_cg_addr .byt $f0
hdma_cg_addr_src
.byt $f0
.byt $00, $00, $00, $00, $00, $00, $00, $00 .byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00 .byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00 .byt $00, $00, $00, $00, $00, $00, $00, $00
@ -66,11 +69,25 @@ hdma_cg_addr .byt $f0
.byt $00, $00, $00, $00, $00, $00, $00, $00 .byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00 .byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00 .byt $00
hdma_mode .byt 74, $03, $01, $05, $00 hdma_mode_src .byt 74, $03, $01, $05, $00
hdma_scroll .byt 74 hdma_scroll_src .byt 74
.byt $00, $00, $ff, $00 .byt $00, $00, $ff, $00
.byt $01 .byt $01
.byt $fc, $00, $05, $00 .byt $fc, $00, $05, $00
.byt $00 .byt $00
hdma_math_src .byt 1
.byt $00, $e0
.byt 1
.byt $00, $e0
.byt 1
.byt $60, $bf
.byt 8
.byt $60, $b0
.byt 1
.byt $60, $bf
.byt 1
.byt $00, $e0
.byt 0
hello .byt "Lorem ipsum dolor sit amet, consectetur adipiscing elit. Aliquam ultrices pharetra libero et ultricies. Proin massa arcu, mattis eu gravida in, tempor sed magna. Mauris molestie purus urna, ut venenatis lorem. Nam nunc lorem, lacinia vel porta quis, sodales eleifend turpis. Aliquam nunc elit, consequat in malesuada vel, elementum eget ipsum. Duis eu lectus nec ipsum imperdiet adipiscing a ac nulla. Mauris risus nisi, posuere nec mollis ac, blandit quis lacus. Donec a sapien felis, ut tempus quam. Nunc semper erat et ipsum accumsan in condimentum enim adipiscing. Sed lobortis accumsan venenatis. Donec euismod mauris gravida risus convallis commodo. Class aptent taciti sociosqu ad litora torquent per conubia nostra, per inceptos himenaeos. Duis vehicula sem sit amet arcu luctus rhoncus. Etiam sed vulputate ligula. Etiam mauris lectus, eleifend nec fermentum id, bibendum sit amet purus. Pellentesque sollicitudin turpis in leo pharetra vulputate. Sed consequat mattis tortor vitae consectetur. Nullam quis ante in nisl venenatis dignissim. Duis mattis lacus euismod leo volutpat. ", 0 hello .byt "Lorem ipsum dolor sit amet, consectetur adipiscing elit. Aliquam ultrices pharetra libero et ultricies. Proin massa arcu, mattis eu gravida in, tempor sed magna. Mauris molestie purus urna, ut venenatis lorem. Nam nunc lorem, lacinia vel porta quis, sodales eleifend turpis. Aliquam nunc elit, consequat in malesuada vel, elementum eget ipsum. Duis eu lectus nec ipsum imperdiet adipiscing a ac nulla. Mauris risus nisi, posuere nec mollis ac, blandit quis lacus. Donec a sapien felis, ut tempus quam. Nunc semper erat et ipsum accumsan in condimentum enim adipiscing. Sed lobortis accumsan venenatis. Donec euismod mauris gravida risus convallis commodo. Class aptent taciti sociosqu ad litora torquent per conubia nostra, per inceptos himenaeos. Duis vehicula sem sit amet arcu luctus rhoncus. Etiam sed vulputate ligula. Etiam mauris lectus, eleifend nec fermentum id, bibendum sit amet purus. Pellentesque sollicitudin turpis in leo pharetra vulputate. Sed consequat mattis tortor vitae consectetur. Nullam quis ante in nisl venenatis dignissim. Duis mattis lacus euismod leo volutpat. ", 0
lohello .byt "Miau", 0

View File

@ -26,3 +26,54 @@ print_y .byt 0 ;y coordinate
print_src .word 0 ;source data address print_src .word 0 ;source data address
print_bank .byt 0 ;source data bank print_bank .byt 0 ;source data bank
print_pal .byt 0 ;palette number for text output print_pal .byt 0 ;palette number for text output
;----------parameters for dma----------
dma_a_bank .byt 0
dma_a_addr .word 0
dma_b_reg .byt 0
dma_len .word 0
dma_mode .byt 0
;----------state information----------
bar_pos .byt 0 ; y position of select bar
;----------hdma values in RAM
hdma_pal .byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0
hdma_cg_addr .byt 0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0
hdma_mode .byt 0,0,0,0,0
hdma_scroll .byt 0
.byt 0,0,0,0
.byt 0
.byt 0,0,0,0
.byt 0
hdma_math .byt 0
.byt 0,0
.byt 0
.byt 0,0
.byt 0
.byt 0,0
.byt 0
.byt 0,0
.byt 0
.byt 0,0
.byt 0
infloop .byt 0,0 ; to be filled w/ 80 FE

View File

@ -1,58 +1,18 @@
#include "memmap.i65" #include "memmap.i65"
#include "dma.i65"
GAME_MAIN: GAME_MAIN:
jsr snes_init jsr snes_init
jsr setup_gfx jsr setup_gfx
jsr tests
jsr setup_hdma jsr setup_hdma
- bra - jsr tests
jsr colortest
jmp @infloop ;infinite loop in WRAM
setup_hdma: colortest:
sep #$20 : .as sep #$20 : .as
rep #$10 : .xl rep #$10 : .xl
stz $420b stz $2130
stz $420c
lda #$02 ;A to B; direct; 2x single reg
sta $4320 ;we use ch. 2 for color data
lda #$22 ;2122 = CG RAM
sta $4321 ;dest: CG RAM
lda #^hdma_pal
ldy #!hdma_pal
sty $4322
sta $4324
lda #$00 ;A to B; direct; 1x single reg
sta $4310 ;ch. 1 for color address
lda #$21 ;2121 = CG addr
sta $4311 ;dest: CG Address
lda #^hdma_cg_addr
ldy #!hdma_cg_addr
sty $4312
sta $4314
lda #$00 ;A to B; direct; 1x single reg
sta $4330 ;ch. 3 for mode switch
lda #$05 ;2105 = BG mode
sta $4331
lda #^hdma_mode
ldy #!hdma_mode
sty $4332
sta $4334
lda #$03 ;A to B; direct; 2x 2x single reg
sta $4340 ;ch. 4 for scroll
lda #$0d ;210e = BG1VOFS
sta $4341
lda #^hdma_scroll
ldy #!hdma_scroll
sty $4342
sta $4344
; lda #$06
; sta $420c ;enable HDMA ch. 1+2
lda #$80
sta $4200 ;enable V-BLANK NMI
rts rts
setup_gfx: setup_gfx:
@ -61,119 +21,93 @@ setup_gfx:
stz $420b stz $420b
stz $420c stz $420c
;clear tilemap buffers ;clear tilemap buffers
lda #$08 ;A to B; fixed, one reg
sta $4300
lda #^zero
ldy #!zero
sty $4302
sta $4304
ldx #$0 ;65536
stx $4305
ldx #$0000 ldx #$0000
stx $2181 stx $2181
lda #$01 lda #$01
sta $2183 sta $2183
DMA0(#$08, #0, #^zero, #!zero, #$80)
;copy 2bpp font (can be used as 4-bit lores font!)
ldx #$4000
stx $2116
DMA0(#$01, #$2000, #^font2, #!font2, #$18)
;copy 4bpp font
ldx #$0000
stx $2116
DMA0(#$01, #$4000, #^font4, #!font4, #$18)
;clear BG1 tilemap
ldx #BG1_TILE_BASE
stx $2116
DMA0(#$09, #$800, #^zero, #!zero, #$18)
;clear BG2 tilemap
ldx #BG2_TILE_BASE
stx $2116
DMA0(#$09, #$800, #^zero, #!zero, #$18)
;copy logo tiles
ldx #$2000
stx $2116
DMA0(#$01, #$3480, #^logo, #!logo, #$18)
;copy logo tilemap
ldx #BG1_TILE_BASE
stx $2116
DMA0(#$01, #$280, #^logomap, #!logomap, #$18)
;set palette
stz $2121
DMA0(#$00, #$200, #^palette, #!palette, #$22)
;copy hdma tables so we can work "without" the cartridge
;palette
lda #^hdma_pal
ldx #!hdma_pal
stx $2181
sta $2183
DMA0(#$00, #52, #^hdma_pal_src, #!hdma_pal_src, #$80)
;CG addr for palette
lda #^hdma_cg_addr
ldx #!hdma_cg_addr
stx $2181
sta $2183
DMA0(#$00, #227, #^hdma_cg_addr_src, #!hdma_cg_addr_src, #$80)
;screen mode
lda #^hdma_mode
ldx #!hdma_mode
stx $2181
sta $2183
DMA0(#$00, #5, #^hdma_mode_src, #!hdma_mode_src, #$80)
;bg scroll
lda #^hdma_scroll
ldx #!hdma_scroll
stx $2181
sta $2183
DMA0(#$00, #11, #^hdma_scroll_src, #!hdma_scroll_src, #$80);
;color math
lda #^hdma_math
ldx #!hdma_math
stx $2181
sta $2183
DMA0(#$00, #19, #^hdma_math_src, #!hdma_math_src, #$80);
;copy infinite loop to WRAM
lda #$80 lda #$80
sta $4301 sta infloop
lda #$01 lda #$fe
sta $420b sta infloop+1
lda #$01 ;A to B; (direct); non-fixed, inc, two reg
sta $4300 ;to DMA ch.0 ctrl
lda #^font2 ;font source bank
ldy #!font2 ;font source address
sty $4302 ;address -> 4302,4303
sta $4304 ;bank -> 4304
ldx #$2000 ;transfer size
stx $4305 ;to reg
ldx #$4000 ;BG2 chr
stx $2116 ;VRAM address 0x8000
lda #$18 ;VRAM data port
sta $4301 ;to channel 0 tgt address
lda #$01 ;ch 0 enable
sta $420b ;GPDMA GO!
lda #$01 ;A to B; (direct); non-fixed, inc, two reg
sta $4300 ;to DMA ch.0 ctrl
lda #^font4 ;font source bank
ldy #!font4 ;font source address
sty $4302 ;address -> 4302,4303
sta $4304 ;bank -> 4304
ldx #$4000 ;transfer size
stx $4305 ;to reg
ldx #$0000 ;BG1 chr
stx $2116 ;VRAM address 0x0000
lda #$18 ;VRAM data port
sta $4301 ;to channel 0 tgt address
lda #$01 ;ch 0 enable
sta $420b ;GPDMA GO!
lda #$09 ;A to B; fixed, two reg
sta $4300
lda #^zero
ldy #!zero
sty $4302
sta $4304
ldx #$1000
stx $4305 ;zero 4096b of VRAM
ldx #$5000
stx $2116 ;from 0xa000-0xafff
lda #$18 ;VRAM data port
sta $4301 ;to channel 0 tgt address
lda #$01
sta $420b
; copy logo
lda #$01 ;A to B; (direct); non-fixed, inc, two reg
sta $4300 ;to DMA ch.0 ctrl
lda #^logo ;font source bank
ldy #!logo ;font source address
sty $4302 ;address -> 4302,4303
sta $4304 ;bank -> 4304
ldx #$3480 ;transfer size
stx $4305 ;to reg
ldx #$2000 ;after font
stx $2116 ;VRAM address 0x4000
lda #$18 ;VRAM data port
sta $4301 ;to channel 0 tgt address
lda #$01 ;ch 0 enable
sta $420b ;GPDMA GO!
; copy logo tilemap
lda #$01 ;A to B; (direct); non-fixed, inc, two reg
sta $4300 ;to DMA ch.0 ctrl
lda #^logomap ;font source bank
ldy #!logomap ;font source address
sty $4302 ;address -> 4302,4303
sta $4304 ;bank -> 4304
ldx #$280 ;transfer size
stx $4305 ;to reg
ldx #$5400 ;BG1 tilemap
stx $2116 ;VRAM address 0x6800
lda #$18 ;VRAM data port
sta $4301 ;to channel 0 tgt address
lda #$01 ;ch 0 enable
sta $420b ;GPDMA GO!
stz $2121 ;palette index 0
lda #$00
sta $4300
lda #^palette
ldy #!palette
sty $4302
sta $4304
ldx #$200
stx $4305
lda #$22 ;CG RAM port
sta $4301
lda #$01
sta $420b
rts rts
tests: tests:
sep #$20 : .as ;8-bit accumulator sep #$20 : .as ;8-bit accumulator
rep #$10 : .xl ;16-bit index rep #$10 : .xl ;16-bit index
lda #$0f
sta $2100 ;screen on, full brightness
lda #$03 ;mode 3, mode 5 via HDMA :D lda #$03 ;mode 3, mode 5 via HDMA :D
sta $2105 sta $2105
lda #$54 ;Tilemap addr 0xA800 lda #$54 ;Tilemap addr 0xA800
@ -190,11 +124,8 @@ tests:
lda #$00 lda #$00
sta $2130 sta $2130
stz $2121 stz $2121
lda #$0 lda #$0f
ldx #$0 sta $2100 ;screen on, full brightness
ldy #$0
lda #$44
sta @AVR_CMD
lda #0 lda #0
sta print_x sta print_x
lda #10 lda #10
@ -203,7 +134,15 @@ tests:
ldx #!hello ldx #!hello
sta print_bank sta print_bank
stx print_src stx print_src
jsr print jsr hiprint
lda #^version
ldx #!version
sta print_bank
stx print_src
stz print_x
lda #8
sta print_y
jsr loprint
rts rts
snes_init: snes_init:
@ -298,73 +237,3 @@ snes_init:
stz $420c ; stz $420c ;
rts rts
texttest:
rep #$10 : .xl
sep #$20 : .as
;copy test text
lda #$00 ;A->B, inc, 1 reg
sta $4300
lda #^hello
ldy #!hello
sty $4302
sta $4304
ldx #31 ;26 bytes
stx $4305
ldx #$5140
stx $2116
lda #$18
sta $4301
stz $2115 ;increment after LOW byte (write to 2118)
lda #$01
sta $420b
lda #$08 ;A->B, fixed, 1 reg
sta $4300
lda #^bg2tile
ldy #!bg2tile
sty $4302
sta $4304
ldx #31 ;26 bytes
stx $4305
ldx #$5140
stx $2116
lda #$19
sta $4301
lda #$80
sta $2115 ;increment after HIGH byte (write to 2119)
lda #$01
sta $420b
lda #$00 ;A->B, inc, 1 reg
sta $4300
lda #^hello
ldy #!hello+4
sty $4302
sta $4304
ldx #$c ;24 bytes
stx $4305
ldx #$5540
stx $2116
lda #$18
sta $4301
stz $2115 ;increment after LOW byte (write to 2118)
lda #$01
sta $420b
lda #$08 ;A->B, fixed, 1 reg
sta $4300
lda #^bg2tile
ldy #!bg2tile
sty $4302
sta $4304
ldx #$c ;24 bytes
stx $4305
ldx #$5540
stx $2116
lda #$19
sta $4301
lda #$80
sta $2115 ;increment after HIGH byte (write to 2119)
lda #$01
sta $420b
rts

View File

@ -2,49 +2,57 @@
; See http://bisqwit.iki.fi/source/snescom.html for details. ; See http://bisqwit.iki.fi/source/snescom.html for details.
#include "memmap.i65" #include "memmap.i65"
#include "dma.i65"
#define TILE_ADDR_REG_VAL(addr, scsize) \ #define TILE_ADDR_REG_VAL(addr, scsize) \
(((addr & $FC00) >> 8) + scsize) (((addr & $FC00) >> 8) + scsize)
#define BMAP_ADDR_REG_VAL(addr, addr2) \ #define BMAP_ADDR_REG_VAL(addr, addr2) \
(((addr & $F000) >> 12) | (((addr2 & $F000) >> 12) << 4)) (((addr & $F000) >> 12) | (((addr2 & $F000) >> 12) << 4))
; NMI - called once per screen refresh (or something like that) ; NMI - called on VBlank
NMI_ROUTINE: NMI_ROUTINE:
sep #$20 : .as sep #$20 : .as
lda @$4210 lda #$00
pha
plb
lda $4210
lda #$01
sta $4300
lda #^BG1_TILE_BUF
ldx #!BG1_TILE_BUF+64*10
stx $4302
sta $4304
ldx #$380*2-64*10
stx $4305
ldx #BG1_TILE_BASE+32*10 ldx #BG1_TILE_BASE+32*10
stx $2116 stx $2116
lda #$18 DMA0(#$01, #$380*2-64*10, #^BG1_TILE_BUF, #!BG1_TILE_BUF+64*10, #$18)
sta $4301
lda #$01
sta $420b
lda #$01
sta $4300
lda #^BG2_TILE_BUF
ldx #!BG2_TILE_BUF+64*10
stx $4302
sta $4304
ldx #$380*2-64*10
stx $4305
ldx #BG2_TILE_BASE+32*10 ldx #BG2_TILE_BASE+32*10
stx $2116 stx $2116
lda #$18 DMA0(#$01, #$380*2-64*10, #^BG2_TILE_BUF, #!BG2_TILE_BUF+64*10, #$18);
sta $4301
ldx #BG2_TILE_BASE
stx $2116
DMA0(#$01, #64*10, #^BG2_TILE_BUF, #!BG2_TILE_BUF, #$18);
lda bar_pos
inc
bne +
inc
+
cmp #224
bne +
lda #1
+
sta bar_pos
cmp #113
bcs lower_half
sta hdma_math
lda #$01 lda #$01
sta $420b sta hdma_math+3
bra math_cont
lda #$1e ; ch. 1-4 lower_half
clc
sbc #111
sta hdma_math+3
lda #112
sta hdma_math
math_cont
lda #$3e ; ch. 1-5
sta @$420c ; trigger HDMA sta @$420c ; trigger HDMA
rtl rtl

View File

@ -1,6 +1,6 @@
.text .text
#include "memmap.i65" #include "memmap.i65"
print: hiprint:
rep #$30 : .xl : .al rep #$30 : .xl : .al
lda !print_x lda !print_x
and #$00ff and #$00ff
@ -12,7 +12,7 @@ print:
phx phx
bra print_bg_cont bra print_bg_cont
print_bg1 print_bg1
ldx #!BG2_TILE_BUF+1 ; for 2nd loop ldx #!BG2_TILE_BUF+2 ; for 2nd loop
phx phx
ldx #!BG1_TILE_BUF ; for 1st loop da whoop ldx #!BG1_TILE_BUF ; for 1st loop da whoop
phx phx
@ -39,7 +39,7 @@ print_bg_cont
; because VRAM can only be accessed during VBLANK and forced blanking. ; because VRAM can only be accessed during VBLANK and forced blanking.
sta $2181 sta $2181
sep #$20 : .as sep #$20 : .as
lda #$7f ;we really only need the lsb. full bank for clarity lda #$7f ;we really only need bit 0. full bank given for clarity
sta $2183 sta $2183
print_loop print_loop
ldx !print_src ldx !print_src
@ -98,4 +98,49 @@ print_end
pha pha
plb plb
rts rts
loprint:
rep #$30 : .xl : .al
lda !print_x
and #$00ff
asl ;double the offset for WRAM addressing
clc
adc #!BG2_TILE_BUF
sta !print_x
lda !print_y
and #$00ff
asl
asl
asl
asl
asl
asl ;double the offset for WRAM addressing
clc
adc !print_x
; we need to transfer to WRAM and from there to VRAM via DMA during VBLANK
; because VRAM can only be accessed during VBLANK and forced blanking.
sta $2181
sep #$20 : .as
lda #$7f ;we really only need bit 0. full bank given for clarity
sta $2183
ldx !print_src
lda !print_bank
pha
plb
loprint_loop_inner
lda !0,x
beq loprint_end
sta @$2180
lda #$00
adc #$00
ora #$20
sta @$2180
inx
bra loprint_loop_inner
loprint_end
lda #$00
pha
plb
rts