FPGA: misc cleanup

verilog/sd2snes/mcu_cmd.v

@@ -201,7 +201,7 @@ always @(posedge clk) begin
         SD_DMA_PARTIALr <= cmd_data[2];
       end
       4'h8: SD_DMA_TGTr <= 2'b00;
-      4'h9: SD_DMA_TGTr <= cmd_data[1:0]; // not implemented
+      4'h9: SD_DMA_TGTr <= 2'b00; // cmd_data[1:0]; // not implemented
 //      4'hE:
 //      select memory unit
     endcase

verilog/sd2snes_cx4/main.v

@@ -105,7 +105,6 @@ wire [10:0] SD_DMA_PARTIAL_START;
 wire [10:0] SD_DMA_PARTIAL_END;
 
 wire [10:0] dac_addr;
-//wire [7:0] dac_volume;
 wire [7:0] msu_volumerq_out;
 wire [6:0] msu_status_out;
 wire [31:0] msu_addressrq_out;