IGR: several bugfixes, more tolerant decoding (12 vs. 16 bits)

This commit is contained in:
ikari 2010-08-10 00:43:06 +02:00
parent 221c165aef
commit cc786a965e
2 changed files with 60 additions and 57 deletions

View File

@ -110,14 +110,23 @@ start
bsf 0x24, 1 bsf 0x24, 1
clrf 0x23 clrf 0x23
btfss 0x24, 1 ; SuperCIC present? btfss 0x24, 1 ; SuperCIC absent?
bsf 0x23, 1 ; then enable passthru goto doregion_60 ; then set defaults
bsf 0x23, 1 ; else enable passthru
goto doregion_60 ; set defaults idle
; check region passthru
waitforlatch_h ; wait for "latch" to become high btfss 0x23, 1 ; passthru enabled?
goto waitforlatch_h ;
btfsc PORTA, 3
bsf PORTA, 4
btfss PORTA, 3
bcf PORTA, 4
call setleds_passthru
waitforlatch_h ; wait for "latch" to become high
btfss PORTA, 1 btfss PORTA, 1
goto waitforlatch_h goto idle
waitforlatch_l ; wait for "latch" to become low waitforlatch_l ; wait for "latch" to become low
@ -140,7 +149,7 @@ dl1_wait
goto dl1_wait goto dl1_wait
btfss 0x22, 3 ;first byte done? btfss 0x22, 3 ;first byte done?
goto dl1 goto dl1
bcf STATUS, C ; clear carry clrf 0x22
dl2 dl2
movf PORTA, w ;read data bit movf PORTA, w ;read data bit
rlf 0x21, f ;shift rlf 0x21, f ;shift
@ -150,53 +159,46 @@ dl2
dl2_wait dl2_wait
btfss PORTA, 2 ;wait for clk=h btfss PORTA, 2 ;wait for clk=h
goto dl2_wait goto dl2_wait
btfss 0x22, 4 btfss 0x22, 2 ; read only 4 bits
goto dl2 goto dl2
; check region passthru
btfss 0x23, 1 ; passthru enabled?
goto checkkeys ;
btfsc PORTA, 3
bsf PORTA, 4
btfss PORTA, 3
bcf PORTA, 4
call setleds_passthru
checkkeys checkkeys
; we now have the first 8 bits in 0x20 and the second 8 bits in 0x21 ; we now have the first 8 bits in 0x20 and the second 4 bits in 0x21
; 00011111 00011111 = ABXY, Select, L ; 00011111 00011111 = ABXY, Select, L
movlw 0x4f movlw 0x04
xorwf 0x21, w xorwf 0x21, w
btfsc STATUS, Z btfsc STATUS, Z
goto group4f goto group04
movlw 0x8f movlw 0x08
xorwf 0x21, w xorwf 0x21, w
btfsc STATUS, Z btfsc STATUS, Z
goto group8f goto group08
movlw 0xcf movlw 0x0c
xorwf 0x21, w xorwf 0x21, w
btfsc STATUS, Z btfsc STATUS, Z
goto groupcf goto group0c
goto waitforlatch_h goto idle
group4f group04
movlw 0xdf movlw 0xdf
xorwf 0x20, w xorwf 0x20, w
btfss STATUS, Z btfss STATUS, Z
goto waitforlatch_h goto idle
goto doregion_60 goto doregion_60
group8f group08
movlw 0xdf movlw 0xdf
xorwf 0x20, w xorwf 0x20, w
btfss STATUS, Z btfss STATUS, Z
goto waitforlatch_h goto idle
btfss 0x24, 1 ; SuperCIC absent? btfss 0x24, 1 ; SuperCIC absent?
goto doreset_long ; then do long reset goto doreset_long ; then do long reset
goto doreset_dbl ; else do dbl reset goto doreset_dbl ; else do dbl reset
groupcf group0c
movlw 0x5f movlw 0x5f
xorwf 0x20, w xorwf 0x20, w
btfsc STATUS, Z btfsc STATUS, Z
@ -209,7 +211,7 @@ groupcf
xorwf 0x20, w xorwf 0x20, w
btfsc STATUS, Z btfsc STATUS, Z
goto doreset_normal goto doreset_normal
goto waitforlatch_h goto idle
doreset_normal doreset_normal
banksel TRISA banksel TRISA
@ -221,7 +223,7 @@ doreset_normal
banksel TRISA banksel TRISA
bsf TRISA, 5 bsf TRISA, 5
banksel PORTA banksel PORTA
goto waitforlatch_h goto idle
doreset_dbl doreset_dbl
banksel TRISA banksel TRISA
@ -240,7 +242,7 @@ doreset_dbl
banksel TRISA banksel TRISA
bsf TRISA, 5 bsf TRISA, 5
banksel PORTA banksel PORTA
goto waitforlatch_h goto idle
doreset_long doreset_long
banksel TRISA banksel TRISA
@ -252,25 +254,25 @@ doreset_long
banksel TRISA banksel TRISA
bsf TRISA, 5 bsf TRISA, 5
banksel PORTA banksel PORTA
goto waitforlatch_h goto idle
doregion_50 doregion_50
bsf PORTA, 4 bsf PORTA, 4
clrf 0x23 clrf 0x23
call setleds_own call setleds_own
goto waitforlatch_h goto idle
doregion_60 doregion_60
bcf PORTA, 4 bcf PORTA, 4
clrf 0x23 clrf 0x23
call setleds_own call setleds_own
goto waitforlatch_h goto idle
doregion_passthru doregion_passthru
clrf 0x23 clrf 0x23
btfsc 0x24, 1 ; SuperCIC present? btfsc 0x24, 1 ; SuperCIC present?
bsf 0x23, 1 ; then enable passthru bsf 0x23, 1 ; then enable passthru
goto waitforlatch_h goto idle
; --------wait: 3*(W-1)+7 cycles (including call+return). W=0 -> 256!-------- ; --------wait: 3*(W-1)+7 cycles (including call+return). W=0 -> 256!--------
wait wait

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@ -2,26 +2,27 @@
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:10004000A20103100508A00D0139A004A20A051D94 :100040000512B320851C1B2885182428A001A101B6
:100050002728A21D222803100508A10D0139A1049B :10005000A20103100508A00D0139A004A20A051D84
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:100090001A28DF302006031D1A289828DF30200692 :1000900056281B28DF302006031D1B289928DF3037
:1000A000031D1A28A41C862870285F302006031917 :1000A0002006031D1B28A41C872871285F3020060A
:1000B0009C289F30200603199428CF30200603196E :1000B00003199D289F30200603199528CF3020066C
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:10010000831603138516831203131A288316031309 :10010000A520831603138516831203131B28831659
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:02018000080075
:02400E00D43F9D :02400E00D43F9D
:00000001FF :00000001FF