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MkII Rev.C PCB WIP (inverse polarity protection)

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This commit is contained in:
ikari 2011-02-04 13:53:19 +01:00
parent 23594146c2
commit e31d44ca30
10 changed files with 11804 additions and 11701 deletions
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153
pcb/kicad/RevC/fpga.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Wed 02 Feb 2011 07:10:00 PM CET EESchema Schematic File Version 2 date Fri 04 Feb 2011 01:04:25 PM CET
LIBS:power LIBS:power
LIBS:device LIBS:device
LIBS:transistors LIBS:transistors
@ -40,13 +40,14 @@ LIBS:cs4344
LIBS:double_sch_kcom LIBS:double_sch_kcom
LIBS:usb_minib LIBS:usb_minib
LIBS:mic23250 LIBS:mic23250
LIBS:cy62158ev30
LIBS:sd2snes-cache LIBS:sd2snes-cache
EELAYER 25 0 EELAYER 25 0
EELAYER END EELAYER END
$Descr A3 16535 11700 $Descr A3 16535 11700
Sheet 6 6 Sheet 6 6
Title "sd2snes Mark II" Title "sd2snes Mark II"
Date "2 feb 2011" Date "4 feb 2011"
Rev "B" Rev "B"
Comp "Maximilian Rehkopf" Comp "Maximilian Rehkopf"
Comment1 "" Comment1 ""
@ -759,7 +760,7 @@ Text Notes 12800 8150 1 50 ~ 0
SNES A+B bus SNES A+B bus
Text Notes 11800 4500 1 50 ~ 0 Text Notes 11800 4500 1 50 ~ 0
70ns PSRAM bus 70ns PSRAM bus
Text Notes 4650 5600 1 50 ~ 0 Text Notes 4000 5600 1 50 ~ 0
45ns SRAM bus 45ns SRAM bus
Text Notes 2900 7400 0 50 ~ 0 Text Notes 2900 7400 0 50 ~ 0
SD bus; shared with MCU SD bus; shared with MCU
@ -793,63 +794,63 @@ Text GLabel 5650 2100 0 50 Output ~ 0
DONE DONE
Text GLabel 5650 1900 0 50 Input ~ 0 Text GLabel 5650 1900 0 50 Input ~ 0
PROG_B PROG_B
Text GLabel 5800 7000 0 50 Output ~ 0
RAM_A8
Text GLabel 5800 6900 0 50 BiDi ~ 0
RAM_DQ0
Text GLabel 5800 6800 0 50 Output ~ 0
RAM_A6
Text GLabel 5800 6600 0 50 Output ~ 0
RAM_A7
Text GLabel 5800 6500 0 50 Output ~ 0
RAM_A3
Text GLabel 5800 6400 0 50 Output ~ 0
RAM_A4
Text GLabel 5800 6300 0 50 Output ~ 0
RAM_/WE
Text GLabel 5800 6200 0 50 Output ~ 0
RAM_A1
Text GLabel 5800 6100 0 50 Output ~ 0
RAM_A2
Text GLabel 5800 6000 0 50 Output ~ 0 Text GLabel 5800 6000 0 50 Output ~ 0
RAM_A0 RAM_A8
Text GLabel 5800 5900 0 50 BiDi ~ 0 Text GLabel 5800 4500 0 50 BiDi ~ 0
RAM_DQ1 RAM_DQ0
Text GLabel 5800 5800 0 50 BiDi ~ 0 Text GLabel 5800 5900 0 50 Output ~ 0
RAM_DQ4 RAM_A6
Text GLabel 5800 5700 0 50 BiDi ~ 0 Text GLabel 5800 6100 0 50 Output ~ 0
RAM_DQ5 RAM_A7
Text GLabel 5800 5600 0 50 Output ~ 0
RAM_A5
Text GLabel 5800 5500 0 50 Output ~ 0
RAM_A17
Text GLabel 5800 5400 0 50 BiDi ~ 0
RAM_DQ6
Text GLabel 5800 5300 0 50 Output ~ 0 Text GLabel 5800 5300 0 50 Output ~ 0
RAM_A18 RAM_A3
Text GLabel 5800 5200 0 50 BiDi ~ 0 Text GLabel 5800 5500 0 50 Output ~ 0
RAM_DQ7 RAM_A4
Text GLabel 5800 5100 0 50 BiDi ~ 0 Text GLabel 5800 6400 0 50 Output ~ 0
RAM_DQ2 RAM_/WE
Text GLabel 5800 5000 0 50 Output ~ 0 Text GLabel 5800 5000 0 50 Output ~ 0
RAM_A9 RAM_A1
Text GLabel 5800 4900 0 50 Output ~ 0 Text GLabel 5800 5100 0 50 Output ~ 0
RAM_/OE RAM_A2
Text GLabel 5800 4800 0 50 Output ~ 0 Text GLabel 5800 4800 0 50 Output ~ 0
RAM_A10 RAM_A0
Text GLabel 5800 4600 0 50 Output ~ 0 Text GLabel 5800 4300 0 50 BiDi ~ 0
RAM_A11 RAM_DQ1
Text GLabel 5800 4500 0 50 Output ~ 0 Text GLabel 5800 4200 0 50 BiDi ~ 0
RAM_A16 RAM_DQ4
Text GLabel 5800 4400 0 50 Output ~ 0 Text GLabel 5800 4400 0 50 BiDi ~ 0
RAM_A12 RAM_DQ5
Text GLabel 5800 4300 0 50 Output ~ 0 Text GLabel 5800 5700 0 50 Output ~ 0
RAM_A15 RAM_A5
Text GLabel 5800 4200 0 50 Output ~ 0 Text GLabel 5800 7000 0 50 Output ~ 0
RAM_A13 RAM_A17
Text GLabel 5800 4600 0 50 BiDi ~ 0
RAM_DQ6
Text GLabel 5800 6600 0 50 Output ~ 0
RAM_A18
Text GLabel 5800 4900 0 50 BiDi ~ 0
RAM_DQ7
Text GLabel 5800 4100 0 50 BiDi ~ 0 Text GLabel 5800 4100 0 50 BiDi ~ 0
RAM_DQ2
Text GLabel 5800 5800 0 50 Output ~ 0
RAM_A9
Text GLabel 5800 5400 0 50 Output ~ 0
RAM_/OE
Text GLabel 5800 5200 0 50 Output ~ 0
RAM_A10
Text GLabel 5800 5600 0 50 Output ~ 0
RAM_A11
Text GLabel 5800 6800 0 50 Output ~ 0
RAM_A16
Text GLabel 5800 6300 0 50 Output ~ 0
RAM_A12
Text GLabel 5800 6900 0 50 Output ~ 0
RAM_A15
Text GLabel 5800 6200 0 50 Output ~ 0
RAM_A13
Text GLabel 5800 4000 0 50 BiDi ~ 0
RAM_DQ3 RAM_DQ3
Text GLabel 5800 4000 0 50 Output ~ 0 Text GLabel 5800 6500 0 50 Output ~ 0
RAM_A14 RAM_A14
Text GLabel 5800 3900 0 50 Output ~ 0 Text GLabel 5800 3900 0 50 Output ~ 0
ROM_A5 ROM_A5
@ -1068,73 +1069,73 @@ SNES_REFRESH
Text GLabel 10900 4550 2 50 Input ~ 0 Text GLabel 10900 4550 2 50 Input ~ 0
SNES_SYS_CLK SNES_SYS_CLK
$Comp $Comp
L GND #PWR0104 L GND #PWR0105
U 1 1 4BADE94E U 1 1 4BADE94E
P 5800 2000 P 5800 2000
F 0 "#PWR0104" H 5800 2000 30 0001 C CNN F 0 "#PWR0105" H 5800 2000 30 0001 C CNN
F 1 "GND" H 5800 1930 30 0001 C CNN F 1 "GND" H 5800 1930 30 0001 C CNN
1 5800 2000 1 5800 2000
0 1 1 0 0 1 1 0
$EndComp $EndComp
$Comp $Comp
L GND #PWR0105 L GND #PWR0106
U 1 1 4BADE8CE U 1 1 4BADE8CE
P 8450 10900 P 8450 10900
F 0 "#PWR0105" H 8450 10900 30 0001 C CNN F 0 "#PWR0106" H 8450 10900 30 0001 C CNN
F 1 "GND" H 8450 10830 30 0001 C CNN F 1 "GND" H 8450 10830 30 0001 C CNN
1 8450 10900 1 8450 10900
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +1.2V #PWR0106 L +1.2V #PWR0107
U 1 1 4BADD09D U 1 1 4BADD09D
P 5650 10200 P 5650 10200
F 0 "#PWR0106" H 5650 10340 20 0001 C CNN F 0 "#PWR0107" H 5650 10340 20 0001 C CNN
F 1 "+1.2V" H 5650 10310 30 0000 C CNN F 1 "+1.2V" H 5650 10310 30 0000 C CNN
1 5650 10200 1 5650 10200
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +2.5V #PWR0107 L +2.5V #PWR0108
U 1 1 4BADD090 U 1 1 4BADD090
P 4100 10200 P 4100 10200
F 0 "#PWR0107" H 4100 10150 20 0001 C CNN F 0 "#PWR0108" H 4100 10150 20 0001 C CNN
F 1 "+2.5V" H 4100 10300 30 0000 C CNN F 1 "+2.5V" H 4100 10300 30 0000 C CNN
1 4100 10200 1 4100 10200
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR0108 L GND #PWR0109
U 1 1 4BADD08B U 1 1 4BADD08B
P 5650 11100 P 5650 11100
F 0 "#PWR0108" H 5650 11100 30 0001 C CNN F 0 "#PWR0109" H 5650 11100 30 0001 C CNN
F 1 "GND" H 5650 11030 30 0001 C CNN F 1 "GND" H 5650 11030 30 0001 C CNN
1 5650 11100 1 5650 11100
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR0109 L GND #PWR0110
U 1 1 4BADD089 U 1 1 4BADD089
P 4100 11100 P 4100 11100
F 0 "#PWR0109" H 4100 11100 30 0001 C CNN F 0 "#PWR0110" H 4100 11100 30 0001 C CNN
F 1 "GND" H 4100 11030 30 0001 C CNN F 1 "GND" H 4100 11030 30 0001 C CNN
1 4100 11100 1 4100 11100
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR0110 L GND #PWR0111
U 1 1 4BADD072 U 1 1 4BADD072
P 650 11100 P 650 11100
F 0 "#PWR0110" H 650 11100 30 0001 C CNN F 0 "#PWR0111" H 650 11100 30 0001 C CNN
F 1 "GND" H 650 11030 30 0001 C CNN F 1 "GND" H 650 11030 30 0001 C CNN
1 650 11100 1 650 11100
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR0111 L +3.3V #PWR0112
U 1 1 4BADD05C U 1 1 4BADD05C
P 650 10200 P 650 10200
F 0 "#PWR0111" H 650 10160 30 0001 C CNN F 0 "#PWR0112" H 650 10160 30 0001 C CNN
F 1 "+3.3V" H 650 10310 30 0000 C CNN F 1 "+3.3V" H 650 10310 30 0000 C CNN
1 650 10200 1 650 10200
1 0 0 -1 1 0 0 -1
@ -1292,28 +1293,28 @@ $EndComp
Text Notes 6550 1300 0 50 ~ 0 Text Notes 6550 1300 0 50 ~ 0
JTAG JTAG
$Comp $Comp
L +3.3V #PWR0112 L +3.3V #PWR0113
U 1 1 4BAD12D2 U 1 1 4BAD12D2
P 7650 800 P 7650 800
F 0 "#PWR0112" H 7650 760 30 0001 C CNN F 0 "#PWR0113" H 7650 760 30 0001 C CNN
F 1 "+3.3V" H 7650 910 30 0000 C CNN F 1 "+3.3V" H 7650 910 30 0000 C CNN
1 7650 800 1 7650 800
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +2.5V #PWR0113 L +2.5V #PWR0114
U 1 1 4BAD12BE U 1 1 4BAD12BE
P 9050 800 P 9050 800
F 0 "#PWR0113" H 9050 750 20 0001 C CNN F 0 "#PWR0114" H 9050 750 20 0001 C CNN
F 1 "+2.5V" H 9050 900 30 0000 C CNN F 1 "+2.5V" H 9050 900 30 0000 C CNN
1 9050 800 1 9050 800
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +1.2V #PWR0114 L +1.2V #PWR0115
U 1 1 4BAD12B4 U 1 1 4BAD12B4
P 9650 800 P 9650 800
F 0 "#PWR0114" H 9650 940 20 0001 C CNN F 0 "#PWR0115" H 9650 940 20 0001 C CNN
F 1 "+1.2V" H 9650 910 30 0000 C CNN F 1 "+1.2V" H 9650 910 30 0000 C CNN
1 9650 800 1 9650 800
1 0 0 -1 1 0 0 -1

97
pcb/kicad/RevC/mcu.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Wed 02 Feb 2011 07:10:00 PM CET EESchema Schematic File Version 2 date Fri 04 Feb 2011 01:04:25 PM CET
LIBS:power LIBS:power
LIBS:device LIBS:device
LIBS:transistors LIBS:transistors
@ -40,13 +40,14 @@ LIBS:cs4344
LIBS:double_sch_kcom LIBS:double_sch_kcom
LIBS:usb_minib LIBS:usb_minib
LIBS:mic23250 LIBS:mic23250
LIBS:cy62158ev30
LIBS:sd2snes-cache LIBS:sd2snes-cache
EELAYER 25 0 EELAYER 25 0
EELAYER END EELAYER END
$Descr A4 11700 8267 $Descr A4 11700 8267
Sheet 4 6 Sheet 4 6
Title "sd2snes Mark II" Title "sd2snes Mark II"
Date "2 feb 2011" Date "4 feb 2011"
Rev "B" Rev "B"
Comp "Maximilian Rehkopf" Comp "Maximilian Rehkopf"
Comment1 "" Comment1 ""
@ -476,10 +477,10 @@ F 2 "SM0805_FIXEDMASK" H 1400 3700 60 0001 C CNN
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR044 L +3.3V #PWR043
U 1 1 4C814422 U 1 1 4C814422
P 1400 3400 P 1400 3400
F 0 "#PWR044" H 1400 3360 30 0001 C CNN F 0 "#PWR043" H 1400 3360 30 0001 C CNN
F 1 "+3.3V" H 1400 3510 30 0000 C CNN F 1 "+3.3V" H 1400 3510 30 0000 C CNN
1 1400 3400 1 1400 3400
-1 0 0 -1 -1 0 0 -1
@ -538,10 +539,10 @@ F 2 "PIN_ARRAY_2X1" H 8500 6400 60 0001 C CNN
1 0 0 1 1 0 0 1
$EndComp $EndComp
$Comp $Comp
L GND #PWR045 L GND #PWR044
U 1 1 4C4A0B6E U 1 1 4C4A0B6E
P 7950 6700 P 7950 6700
F 0 "#PWR045" H 7950 6700 30 0001 C CNN F 0 "#PWR044" H 7950 6700 30 0001 C CNN
F 1 "GND" H 7950 6630 30 0001 C CNN F 1 "GND" H 7950 6630 30 0001 C CNN
1 7950 6700 1 7950 6700
-1 0 0 -1 -1 0 0 -1
@ -621,10 +622,10 @@ F 2 "SM0805_FIXEDMASK" H 1400 4900 60 0001 C CNN
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR046 L +3.3V #PWR045
U 1 1 4C063C16 U 1 1 4C063C16
P 1400 4600 P 1400 4600
F 0 "#PWR046" H 1400 4560 30 0001 C CNN F 0 "#PWR045" H 1400 4560 30 0001 C CNN
F 1 "+3.3V" H 1400 4710 30 0000 C CNN F 1 "+3.3V" H 1400 4710 30 0000 C CNN
1 1400 4600 1 1400 4600
-1 0 0 -1 -1 0 0 -1
@ -642,28 +643,28 @@ $EndComp
Text GLabel 2700 5100 0 50 Input ~ 0 Text GLabel 2700 5100 0 50 Input ~ 0
/RESET /RESET
$Comp $Comp
L +5V #PWR047 L +5V #PWR046
U 1 1 4BFBFF63 U 1 1 4BFBFF63
P 10500 5750 P 10500 5750
F 0 "#PWR047" H 10500 5840 20 0001 C CNN F 0 "#PWR046" H 10500 5840 20 0001 C CNN
F 1 "+5V" H 10500 5840 30 0000 C CNN F 1 "+5V" H 10500 5840 30 0000 C CNN
1 10500 5750 1 10500 5750
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR048 L +3.3V #PWR047
U 1 1 4BFBFF50 U 1 1 4BFBFF50
P 9200 5750 P 9200 5750
F 0 "#PWR048" H 9200 5710 30 0001 C CNN F 0 "#PWR047" H 9200 5710 30 0001 C CNN
F 1 "+3.3V" H 9200 5860 30 0000 C CNN F 1 "+3.3V" H 9200 5860 30 0000 C CNN
1 9200 5750 1 9200 5750
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR049 L GND #PWR048
U 1 1 4BFBFF44 U 1 1 4BFBFF44
P 8850 5850 P 8850 5850
F 0 "#PWR049" H 8850 5850 30 0001 C CNN F 0 "#PWR048" H 8850 5850 30 0001 C CNN
F 1 "GND" H 8850 5780 30 0001 C CNN F 1 "GND" H 8850 5780 30 0001 C CNN
1 8850 5850 1 8850 5850
0 1 1 0 0 1 1 0
@ -717,10 +718,10 @@ F 2 "SM0805_FIXEDMASK" H 7450 4900 60 0001 C CNN
0 -1 1 0 0 -1 1 0
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR050 L +3.3V #PWR049
U 1 1 4BF84ABB U 1 1 4BF84ABB
P 1100 1900 P 1100 1900
F 0 "#PWR050" H 1100 1860 30 0001 C CNN F 0 "#PWR049" H 1100 1860 30 0001 C CNN
F 1 "+3.3V" H 1100 2010 30 0000 C CNN F 1 "+3.3V" H 1100 2010 30 0000 C CNN
1 1100 1900 1 1100 1900
-1 0 0 -1 -1 0 0 -1
@ -766,19 +767,19 @@ F 2 "LED-3MM-FIXED" H 1100 2500 60 0001 C CNN
0 -1 1 0 0 -1 1 0
$EndComp $EndComp
$Comp $Comp
L GND #PWR051 L GND #PWR050
U 1 1 4BF6C1FC U 1 1 4BF6C1FC
P 5850 7600 P 5850 7600
F 0 "#PWR051" H 5850 7600 30 0001 C CNN F 0 "#PWR050" H 5850 7600 30 0001 C CNN
F 1 "GND" H 5850 7530 30 0001 C CNN F 1 "GND" H 5850 7530 30 0001 C CNN
1 5850 7600 1 5850 7600
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR052 L +3.3V #PWR051
U 1 1 4BF6C1F7 U 1 1 4BF6C1F7
P 5850 6800 P 5850 6800
F 0 "#PWR052" H 5850 6760 30 0001 C CNN F 0 "#PWR051" H 5850 6760 30 0001 C CNN
F 1 "+3.3V" H 5850 6910 30 0000 C CNN F 1 "+3.3V" H 5850 6910 30 0000 C CNN
1 5850 6800 1 5850 6800
-1 0 0 -1 -1 0 0 -1
@ -844,10 +845,10 @@ CIC_DATA0
Text GLabel 7000 2400 2 50 3State ~ 0 Text GLabel 7000 2400 2 50 3State ~ 0
CIC_DATA1 CIC_DATA1
$Comp $Comp
L GND #PWR053 L GND #PWR052
U 1 1 4BF0021F U 1 1 4BF0021F
P 9600 5200 P 9600 5200
F 0 "#PWR053" H 9600 5200 30 0001 C CNN F 0 "#PWR052" H 9600 5200 30 0001 C CNN
F 1 "GND" H 9600 5130 30 0001 C CNN F 1 "GND" H 9600 5130 30 0001 C CNN
1 9600 5200 1 9600 5200
1 0 0 -1 1 0 0 -1
@ -865,10 +866,10 @@ F 5 "Assmann A-USBB-M5" H 10100 4700 60 0001 C CNN "Value"
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR054 L GND #PWR053
U 1 1 4BEFBCAA U 1 1 4BEFBCAA
P 1200 6850 P 1200 6850
F 0 "#PWR054" H 1200 6850 30 0001 C CNN F 0 "#PWR053" H 1200 6850 30 0001 C CNN
F 1 "GND" H 1200 6780 30 0001 C CNN F 1 "GND" H 1200 6780 30 0001 C CNN
1 1200 6850 1 1200 6850
-1 0 0 -1 -1 0 0 -1
@ -911,37 +912,37 @@ SNES_/RESET
Text GLabel 7650 5950 2 50 Output ~ 0 Text GLabel 7650 5950 2 50 Output ~ 0
CIC_MCLR CIC_MCLR
$Comp $Comp
L GND #PWR055 L GND #PWR054
U 1 1 4BEECBF1 U 1 1 4BEECBF1
P 3100 6850 P 3100 6850
F 0 "#PWR055" H 3100 6850 30 0001 C CNN F 0 "#PWR054" H 3100 6850 30 0001 C CNN
F 1 "GND" H 3100 6780 30 0001 C CNN F 1 "GND" H 3100 6780 30 0001 C CNN
1 3100 6850 1 3100 6850
-1 0 0 -1 -1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR056 L GND #PWR055
U 1 1 4BEECBEF U 1 1 4BEECBEF
P 2500 6850 P 2500 6850
F 0 "#PWR056" H 2500 6850 30 0001 C CNN F 0 "#PWR055" H 2500 6850 30 0001 C CNN
F 1 "GND" H 2500 6780 30 0001 C CNN F 1 "GND" H 2500 6780 30 0001 C CNN
1 2500 6850 1 2500 6850
-1 0 0 -1 -1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR057 L GND #PWR056
U 1 1 4BEECBEE U 1 1 4BEECBEE
P 2200 6850 P 2200 6850
F 0 "#PWR057" H 2200 6850 30 0001 C CNN F 0 "#PWR056" H 2200 6850 30 0001 C CNN
F 1 "GND" H 2200 6780 30 0001 C CNN F 1 "GND" H 2200 6780 30 0001 C CNN
1 2200 6850 1 2200 6850
-1 0 0 -1 -1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR058 L GND #PWR057
U 1 1 4BEECBE5 U 1 1 4BEECBE5
P 1600 6850 P 1600 6850
F 0 "#PWR058" H 1600 6850 30 0001 C CNN F 0 "#PWR057" H 1600 6850 30 0001 C CNN
F 1 "GND" H 1600 6780 30 0001 C CNN F 1 "GND" H 1600 6780 30 0001 C CNN
1 1600 6850 1 1600 6850
-1 0 0 -1 -1 0 0 -1
@ -1027,73 +1028,73 @@ F 2 "XTAL_SMD_05032" H 1900 6200 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR059 L GND #PWR058
U 1 1 4BB8BBE8 U 1 1 4BB8BBE8
P 10700 3900 P 10700 3900
F 0 "#PWR059" H 10700 3900 30 0001 C CNN F 0 "#PWR058" H 10700 3900 30 0001 C CNN
F 1 "GND" H 10700 3830 30 0001 C CNN F 1 "GND" H 10700 3830 30 0001 C CNN
1 10700 3900 1 10700 3900
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR060 L +3.3V #PWR059
U 1 1 4BB8BBD6 U 1 1 4BB8BBD6
P 10700 2650 P 10700 2650
F 0 "#PWR060" H 10700 2610 30 0001 C CNN F 0 "#PWR059" H 10700 2610 30 0001 C CNN
F 1 "+3.3V" H 10700 2760 30 0000 C CNN F 1 "+3.3V" H 10700 2760 30 0000 C CNN
1 10700 2650 1 10700 2650
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR061 L +3.3V #PWR060
U 1 1 4BB8BB64 U 1 1 4BB8BB64
P 4650 1450 P 4650 1450
F 0 "#PWR061" H 4650 1410 30 0001 C CNN F 0 "#PWR060" H 4650 1410 30 0001 C CNN
F 1 "+3.3V" H 4650 1560 30 0000 C CNN F 1 "+3.3V" H 4650 1560 30 0000 C CNN
1 4650 1450 1 4650 1450
-1 0 0 -1 -1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR062 L GND #PWR061
U 1 1 4BB8BB56 U 1 1 4BB8BB56
P 4450 6850 P 4450 6850
F 0 "#PWR062" H 4450 6850 30 0001 C CNN F 0 "#PWR061" H 4450 6850 30 0001 C CNN
F 1 "GND" H 4450 6780 30 0001 C CNN F 1 "GND" H 4450 6780 30 0001 C CNN
1 4450 6850 1 4450 6850
-1 0 0 -1 -1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +BATT #PWR063 L +BATT #PWR062
U 1 1 4BB8AE61 U 1 1 4BB8AE61
P 4350 1450 P 4350 1450
F 0 "#PWR063" H 4350 1400 20 0001 C CNN F 0 "#PWR062" H 4350 1400 20 0001 C CNN
F 1 "+BATT" H 4350 1550 30 0000 C CNN F 1 "+BATT" H 4350 1550 30 0000 C CNN
1 4350 1450 1 4350 1450
-1 0 0 -1 -1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR064 L +3.3V #PWR063
U 1 1 4BB8AE12 U 1 1 4BB8AE12
P 5250 1450 P 5250 1450
F 0 "#PWR064" H 5250 1410 30 0001 C CNN F 0 "#PWR063" H 5250 1410 30 0001 C CNN
F 1 "+3.3V" H 5250 1560 30 0000 C CNN F 1 "+3.3V" H 5250 1560 30 0000 C CNN
1 5250 1450 1 5250 1450
-1 0 0 -1 -1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR065 L GND #PWR064
U 1 1 4BAF2DEB U 1 1 4BAF2DEB
P 4650 6850 P 4650 6850
F 0 "#PWR065" H 4650 6850 30 0001 C CNN F 0 "#PWR064" H 4650 6850 30 0001 C CNN
F 1 "GND" H 4650 6780 30 0001 C CNN F 1 "GND" H 4650 6780 30 0001 C CNN
1 4650 6850 1 4650 6850
-1 0 0 -1 -1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR066 L GND #PWR065
U 1 1 4BAF2DE3 U 1 1 4BAF2DE3
P 5100 6850 P 5100 6850
F 0 "#PWR066" H 5100 6850 30 0001 C CNN F 0 "#PWR065" H 5100 6850 30 0001 C CNN
F 1 "GND" H 5100 6780 30 0001 C CNN F 1 "GND" H 5100 6780 30 0001 C CNN
1 5100 6850 1 5100 6850
-1 0 0 -1 -1 0 0 -1

61
pcb/kicad/RevC/memory.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Wed 02 Feb 2011 07:10:00 PM CET EESchema Schematic File Version 2 date Fri 04 Feb 2011 01:04:25 PM CET
LIBS:power LIBS:power
LIBS:device LIBS:device
LIBS:transistors LIBS:transistors
@ -40,13 +40,14 @@ LIBS:cs4344
LIBS:double_sch_kcom LIBS:double_sch_kcom
LIBS:usb_minib LIBS:usb_minib
LIBS:mic23250 LIBS:mic23250
LIBS:cy62158ev30
LIBS:sd2snes-cache LIBS:sd2snes-cache
EELAYER 25 0 EELAYER 25 0
EELAYER END EELAYER END
$Descr A4 11700 8267 $Descr A4 11700 8267
Sheet 3 6 Sheet 3 6
Title "sd2snes Mark II" Title "sd2snes Mark II"
Date "2 feb 2011" Date "4 feb 2011"
Rev "B" Rev "B"
Comp "Maximilian Rehkopf" Comp "Maximilian Rehkopf"
Comment1 "" Comment1 ""
@ -289,19 +290,19 @@ SRAM battery power
Text Notes 9800 5300 0 50 ~ 0 Text Notes 9800 5300 0 50 ~ 0
Battery power OE switch Battery power OE switch
$Comp $Comp
L +3.3V #PWR030 L +3.3V #PWR029
U 1 1 4BF2FE97 U 1 1 4BF2FE97
P 8350 5050 P 8350 5050
F 0 "#PWR030" H 8350 5010 30 0001 C CNN F 0 "#PWR029" H 8350 5010 30 0001 C CNN
F 1 "+3.3V" H 8350 5160 30 0000 C CNN F 1 "+3.3V" H 8350 5160 30 0000 C CNN
1 8350 5050 1 8350 5050
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR031 L GND #PWR030
U 1 1 4BF2FE7B U 1 1 4BF2FE7B
P 9600 6350 P 9600 6350
F 0 "#PWR031" H 9600 6350 30 0001 C CNN F 0 "#PWR030" H 9600 6350 30 0001 C CNN
F 1 "GND" H 9600 6280 30 0001 C CNN F 1 "GND" H 9600 6280 30 0001 C CNN
1 9600 6350 1 9600 6350
1 0 0 -1 1 0 0 -1
@ -347,28 +348,28 @@ F 2 "SOT23EBC" H 9500 5250 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR032 L GND #PWR031
U 1 1 4BF1A006 U 1 1 4BF1A006
P 10500 2000 P 10500 2000
F 0 "#PWR032" H 10500 2000 30 0001 C CNN F 0 "#PWR031" H 10500 2000 30 0001 C CNN
F 1 "GND" H 10500 1930 30 0001 C CNN F 1 "GND" H 10500 1930 30 0001 C CNN
1 10500 2000 1 10500 2000
0 -1 -1 0 0 -1 -1 0
$EndComp $EndComp
$Comp $Comp
L +BATT #PWR033 L +BATT #PWR032
U 1 1 4BF19EA4 U 1 1 4BF19EA4
P 8400 1400 P 8400 1400
F 0 "#PWR033" H 8400 1350 20 0001 C CNN F 0 "#PWR032" H 8400 1350 20 0001 C CNN
F 1 "+BATT" H 8400 1500 30 0000 C CNN F 1 "+BATT" H 8400 1500 30 0000 C CNN
1 8400 1400 1 8400 1400
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR034 L +3.3V #PWR033
U 1 1 4BF19E7A U 1 1 4BF19E7A
P 6900 1400 P 6900 1400
F 0 "#PWR034" H 6900 1360 30 0001 C CNN F 0 "#PWR033" H 6900 1360 30 0001 C CNN
F 1 "+3.3V" H 6900 1510 30 0000 C CNN F 1 "+3.3V" H 6900 1510 30 0000 C CNN
1 6900 1400 1 6900 1400
1 0 0 -1 1 0 0 -1
@ -675,10 +676,10 @@ Text GLabel 2050 2150 0 50 Input ~ 0
ROM_A0 ROM_A0
NoConn ~ 4250 4550 NoConn ~ 4250 4550
$Comp $Comp
L GND #PWR035 L GND #PWR034
U 1 1 4BCA30BF U 1 1 4BCA30BF
P 4750 5400 P 4750 5400
F 0 "#PWR035" H 4750 5400 30 0001 C CNN F 0 "#PWR034" H 4750 5400 30 0001 C CNN
F 1 "GND" H 4750 5330 30 0001 C CNN F 1 "GND" H 4750 5330 30 0001 C CNN
1 4750 5400 1 4750 5400
1 0 0 -1 1 0 0 -1
@ -718,73 +719,73 @@ F 2 "SM0805_FIXEDMASK" H 3250 7000 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR036 L GND #PWR035
U 1 1 4BAD3D2B U 1 1 4BAD3D2B
P 3550 7300 P 3550 7300
F 0 "#PWR036" H 3550 7300 30 0001 C CNN F 0 "#PWR035" H 3550 7300 30 0001 C CNN
F 1 "GND" H 3550 7230 30 0001 C CNN F 1 "GND" H 3550 7230 30 0001 C CNN
1 3550 7300 1 3550 7300
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +1.8V #PWR037 L +1.8V #PWR036
U 1 1 4BAD3D27 U 1 1 4BAD3D27
P 3550 6700 P 3550 6700
F 0 "#PWR037" H 3550 6840 20 0001 C CNN F 0 "#PWR036" H 3550 6840 20 0001 C CNN
F 1 "+1.8V" H 3550 6810 30 0000 C CNN F 1 "+1.8V" H 3550 6810 30 0000 C CNN
1 3550 6700 1 3550 6700
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR038 L GND #PWR037
U 1 1 4BAD3D20 U 1 1 4BAD3D20
P 3250 7300 P 3250 7300
F 0 "#PWR038" H 3250 7300 30 0001 C CNN F 0 "#PWR037" H 3250 7300 30 0001 C CNN
F 1 "GND" H 3250 7230 30 0001 C CNN F 1 "GND" H 3250 7230 30 0001 C CNN
1 3250 7300 1 3250 7300
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR039 L +3.3V #PWR038
U 1 1 4BAD3D0B U 1 1 4BAD3D0B
P 3250 6700 P 3250 6700
F 0 "#PWR039" H 3250 6660 30 0001 C CNN F 0 "#PWR038" H 3250 6660 30 0001 C CNN
F 1 "+3.3V" H 3250 6810 30 0000 C CNN F 1 "+3.3V" H 3250 6810 30 0000 C CNN
1 3250 6700 1 3250 6700
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR040 L GND #PWR039
U 1 1 4BAD33A7 U 1 1 4BAD33A7
P 3400 5400 P 3400 5400
F 0 "#PWR040" H 3400 5400 30 0001 C CNN F 0 "#PWR039" H 3400 5400 30 0001 C CNN
F 1 "GND" H 3400 5330 30 0001 C CNN F 1 "GND" H 3400 5330 30 0001 C CNN
1 3400 5400 1 3400 5400
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR041 L GND #PWR040
U 1 1 4BAD339F U 1 1 4BAD339F
P 7650 5000 P 7650 5000
F 0 "#PWR041" H 7650 5000 30 0001 C CNN F 0 "#PWR040" H 7650 5000 30 0001 C CNN
F 1 "GND" H 7650 4930 30 0001 C CNN F 1 "GND" H 7650 4930 30 0001 C CNN
1 7650 5000 1 7650 5000
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +1.8V #PWR042 L +1.8V #PWR041
U 1 1 4BAD32D2 U 1 1 4BAD32D2
P 3300 1550 P 3300 1550
F 0 "#PWR042" H 3300 1690 20 0001 C CNN F 0 "#PWR041" H 3300 1690 20 0001 C CNN
F 1 "+1.8V" H 3300 1660 30 0000 C CNN F 1 "+1.8V" H 3300 1660 30 0000 C CNN
1 3300 1550 1 3300 1550
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR043 L +3.3V #PWR042
U 1 1 4BAD32BE U 1 1 4BAD32BE
P 3500 1550 P 3500 1550
F 0 "#PWR043" H 3500 1510 30 0001 C CNN F 0 "#PWR042" H 3500 1510 30 0001 C CNN
F 1 "+3.3V" H 3500 1660 30 0000 C CNN F 1 "+3.3V" H 3500 1660 30 0000 C CNN
1 3500 1550 1 3500 1550
1 0 0 -1 1 0 0 -1

987
pcb/kicad/RevC/pwr_misc.sch
View File

File diff suppressed because it is too large Load Diff

20259
pcb/kicad/RevC/sd2snes.brd
View File

File diff suppressed because it is too large Load Diff

9
pcb/kicad/RevC/sd2snes.cmp
View File

@ -1,4 +1,4 @@
Cmp-Mod V01 Created by CvPCB (2010-12-16 BZR 2663)-testing date = Wed 02 Feb 2011 02:20:17 PM CET Cmp-Mod V01 Created by CvPCB (2010-12-16 BZR 2663)-testing date = Fri 04 Feb 2011 10:49:48 AM CET
BeginCmp BeginCmp
TimeStamp = /4B6EC9C3/4BAF2EAF; TimeStamp = /4B6EC9C3/4BAF2EAF;
@ -651,6 +651,13 @@ ValeurCmp = 2N2222A;
IdModule = SOT23EBC; IdModule = SOT23EBC;
EndCmp EndCmp
BeginCmp
TimeStamp = /4B6EC9C3/4D4BC942;
Reference = Q301;
ValeurCmp = IRLML2502PBF;
IdModule = SOT23GDS;
EndCmp
BeginCmp BeginCmp
TimeStamp = /4BAA6ABD/4BF2FD9F; TimeStamp = /4BAA6ABD/4BF2FD9F;
Reference = Q511; Reference = Q511;

1850
pcb/kicad/RevC/sd2snes.net
View File

File diff suppressed because it is too large Load Diff

43
pcb/kicad/RevC/sd2snes.pro
View File

@ -1,4 +1,4 @@
update=Wed 02 Feb 2011 01:44:31 PM CET update=Fri 04 Feb 2011 01:05:39 PM CET
version=1 version=1
last_client=pcbnew last_client=pcbnew
[general] [general]
@ -34,8 +34,6 @@ RptD_X=0
RptD_Y=100 RptD_Y=100
RptLab=1 RptLab=1
LabSize=50 LabSize=50
PrintMonochrome=1
ShowSheetReferenceAndTitleBlock=0
[eeschema/libraries] [eeschema/libraries]
LibName1=power LibName1=power
LibName2=device LibName2=device
@ -78,6 +76,7 @@ LibName38=libs/cs4344
LibName39=libs/double_sch_kcom LibName39=libs/double_sch_kcom
LibName40=libs/usb_minib LibName40=libs/usb_minib
LibName41=libs/mic23250 LibName41=libs/mic23250
LibName42=libs/cy62158ev30
[cvpcb] [cvpcb]
version=1 version=1
NetIExt=net NetIExt=net
@ -85,24 +84,24 @@ NetIExt=net
EquName1=devcms EquName1=devcms
[pcbnew] [pcbnew]
version=1 version=1
PadDrlX=0 PadDrlX=320
PadDimH=2166 PadDimH=600
PadDimV=787 PadDimV=600
BoardThickness=500 BoardThickness=630
SgPcb45=1 SgPcb45=1
TxtPcbV=300 TxtPcbV=800
TxtPcbH=300 TxtPcbH=600
TxtModV=300 TxtModV=600
TxtModH=300 TxtModH=600
TxtModW=60 TxtModW=120
VEgarde=40 VEgarde=100
DrawLar=59 DrawLar=70
EdgeLar=150 EdgeLar=40
TxtLar=60 TxtLar=120
MSegLar=80 MSegLar=150
LastNetListRead=sd2snes.net LastNetListRead=
[pcbnew/libraries] [pcbnew/libraries]
LibDir=/home/ikari/prj/sd2snes/pcb/kicad LibDir=../../kicad
LibName1=sockets LibName1=sockets
LibName2=connect LibName2=connect
LibName3=discret LibName3=discret
@ -113,7 +112,5 @@ LibName7=display
LibName8=valves LibName8=valves
LibName9=led LibName9=led
LibName10=dip_sockets LibName10=dip_sockets
LibName11=libs/snescart LibName11=libs/mypackages
LibName12=libs/mypackages LibName12=libs/hai
LibName13=libs/sdcard
LibName14=libs/hai

7
pcb/kicad/RevC/sd2snes.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Wed 02 Feb 2011 07:10:00 PM CET EESchema Schematic File Version 2 date Fri 04 Feb 2011 01:04:25 PM CET
LIBS:power LIBS:power
LIBS:device LIBS:device
LIBS:transistors LIBS:transistors
@ -40,13 +40,14 @@ LIBS:cs4344
LIBS:double_sch_kcom LIBS:double_sch_kcom
LIBS:usb_minib LIBS:usb_minib
LIBS:mic23250 LIBS:mic23250
LIBS:cy62158ev30
LIBS:sd2snes-cache LIBS:sd2snes-cache
EELAYER 25 0 EELAYER 25 0
EELAYER END EELAYER END
$Descr A4 11700 8267 $Descr A4 11700 8267
Sheet 1 6 Sheet 1 6
Title "sd2snes Mark II" Title "sd2snes Mark II"
Date "2 feb 2011" Date "4 feb 2011"
Rev "B" Rev "B"
Comp "Maximilian Rehkopf" Comp "Maximilian Rehkopf"
Comment1 "" Comment1 ""
@ -57,7 +58,7 @@ $EndDescr
Wire Notes Line Wire Notes Line
3650 4200 6150 4200 3650 4200 6150 4200
Text Notes 3300 3250 0 100 ~ 0 Text Notes 3300 3250 0 100 ~ 0
Changes from Rev.A / TODO:\n [x] remove FPGA from JTAG chain\n [x] remove SNES IRQ_DIR+IRQ, replace with IRQ_OE. IRQ is unidirectional cart -> console\n (replace 1gate w/ transistor)\n [x] disconnect P2.10 from FPGA, using a different GPIO for IRQ / INIT_B\n [x] add pullup to P2.10\n [ ] add JTAG pullups\n [x] add series resistor for CPU_CLK\n [x] add a jumper in PIC MCLR line to MCU\n [x] change PIC to DIP8 type for easier preprogramming\n [x] change "P1" to "P401" in pin description in silk screen\n [x] filter CIC data lines\n [x] rearrange SD card interface/LEDs on MCU\n [ ] RAs for SNES signals?\n [x] reroute/add decoupling capacitors\n [x] filter SNES control signals (RD, WR, PARD, PAWR, CPU_CLK, IRQ) Changes from Rev.A / TODO:\n [x] remove FPGA from JTAG chain\n [x] remove SNES IRQ_DIR+IRQ, replace with IRQ_OE. IRQ is unidirectional cart -> console\n (replace 1gate w/ transistor)\n [x] disconnect P2.10 from FPGA, using a different GPIO for IRQ / INIT_B\n [x] add pullup to P2.10\n [ ] add JTAG pullups\n [x] add series resistor for CPU_CLK\n [x] add a jumper in PIC MCLR line to MCU\n [x] change PIC to DIP8 type for easier preprogramming\n [x] change "P1" to "P401" in pin description in silk screen\n [x] filter CIC data lines\n [x] rearrange SD card interface/LEDs on MCU\n [ ] RAs for SNES signals?\n [x] reroute/add decoupling capacitors\n [x] filter SNES control signals (RD, WR, PARD, PAWR, CPU_CLK, IRQ)\n [x] replace 4Mbit SRAM with much cheaper TSOP-II type\n [ ] add inverse polarity protection
$Sheet $Sheet
S 1250 1250 1700 1250 S 1250 1250 1700 1250
U 4B6E16F2 U 4B6E16F2

39
pcb/kicad/RevC/snesslot.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Wed 02 Feb 2011 07:10:00 PM CET EESchema Schematic File Version 2 date Fri 04 Feb 2011 01:04:25 PM CET
LIBS:power LIBS:power
LIBS:device LIBS:device
LIBS:transistors LIBS:transistors
@ -40,13 +40,14 @@ LIBS:cs4344
LIBS:double_sch_kcom LIBS:double_sch_kcom
LIBS:usb_minib LIBS:usb_minib
LIBS:mic23250 LIBS:mic23250
LIBS:cy62158ev30
LIBS:sd2snes-cache LIBS:sd2snes-cache
EELAYER 25 0 EELAYER 25 0
EELAYER END EELAYER END
$Descr A3 16535 11700 $Descr A3 16535 11700
Sheet 2 6 Sheet 2 6
Title "sd2snes Mark II" Title "sd2snes Mark II"
Date "2 feb 2011" Date "4 feb 2011"
Rev "B" Rev "B"
Comp "Maximilian Rehkopf" Comp "Maximilian Rehkopf"
Comment1 "" Comment1 ""
@ -54,6 +55,15 @@ Comment2 ""
Comment3 "" Comment3 ""
Comment4 "" Comment4 ""
$EndDescr $EndDescr
$Comp
L +5VL #PWR17
U 1 1 4D4BC910
P 8300 2900
F 0 "#PWR17" H 8300 3030 20 0001 C CNN
F 1 "+5VL" H 8300 3000 30 0000 C CNN
1 8300 2900
1 0 0 -1
$EndComp
Wire Wire Line Wire Wire Line
10100 7600 9800 7600 10100 7600 9800 7600
Wire Wire Line Wire Wire Line
@ -1788,46 +1798,37 @@ F 1 "+5V" H 14000 2250 50 0000 C CNN
-1 0 0 -1 -1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +5V #PWR025 L GND #PWR025
U 1 1 4B6E9D3D
P 8300 2900
F 0 "#PWR025" H 8300 2990 20 0001 C CNN
F 1 "+5V" H 8300 2990 30 0000 C CNN
1 8300 2900
1 0 0 -1
$EndComp
$Comp
L GND #PWR026
U 1 1 4B6E9C12 U 1 1 4B6E9C12
P 14250 5600 P 14250 5600
F 0 "#PWR026" H 14250 5600 30 0001 C CNN F 0 "#PWR025" H 14250 5600 30 0001 C CNN
F 1 "GND" H 14250 5530 30 0001 C CNN F 1 "GND" H 14250 5530 30 0001 C CNN
1 14250 5600 1 14250 5600
-1 0 0 -1 -1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR027 L GND #PWR026
U 1 1 4B6E9C04 U 1 1 4B6E9C04
P 2350 5600 P 2350 5600
F 0 "#PWR027" H 2350 5600 30 0001 C CNN F 0 "#PWR026" H 2350 5600 30 0001 C CNN
F 1 "GND" H 2350 5530 30 0001 C CNN F 1 "GND" H 2350 5530 30 0001 C CNN
1 2350 5600 1 2350 5600
-1 0 0 -1 -1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR028 L GND #PWR027
U 1 1 4B6E9BA6 U 1 1 4B6E9BA6
P 8300 7700 P 8300 7700
F 0 "#PWR028" H 8300 7700 30 0001 C CNN F 0 "#PWR027" H 8300 7700 30 0001 C CNN
F 1 "GND" H 8300 7630 30 0001 C CNN F 1 "GND" H 8300 7630 30 0001 C CNN
1 8300 7700 1 8300 7700
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR029 L GND #PWR028
U 1 1 4B6E9B44 U 1 1 4B6E9B44
P 2350 9300 P 2350 9300
F 0 "#PWR029" H 2350 9300 30 0001 C CNN F 0 "#PWR028" H 2350 9300 30 0001 C CNN
F 1 "GND" H 2350 9230 30 0001 C CNN F 1 "GND" H 2350 9230 30 0001 C CNN
1 2350 9300 1 2350 9300
1 0 0 -1 1 0 0 -1