Firmware: adjust comment to match Rev.F pinout
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@ -62,6 +62,9 @@
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#define SNES_CIC_PAIR_REG LPC_GPIO1
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#define SNES_CIC_PAIR_REG LPC_GPIO1
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#define SNES_CIC_PAIR_BIT 25
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#define SNES_CIC_PAIR_BIT 25
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#define FPGA_MCU_RDY_REG LPC_GPIO2
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#define FPGA_MCU_RDY_BIT 9
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#define QSORT_MAXELEM 1024
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#define QSORT_MAXELEM 1024
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#define SSP_REGS LPC_SSP0
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#define SSP_REGS LPC_SSP0
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@ -29,7 +29,7 @@
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FPGA pin mapping
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FPGA pin mapping
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================
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================
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CCLK P0.11 out
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CCLK P0.11 out
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PROG_B P1.10 out
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PROG_B P1.15 out
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INIT_B P2.9 in
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INIT_B P2.9 in
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DIN P2.8 out
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DIN P2.8 out
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DONE P0.22 in
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DONE P0.22 in
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