firmware: whitespace cleanup (incomplete)
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parent
f34318d2dc
commit
ea6e872541
14
src/main.c
14
src/main.c
@ -26,6 +26,7 @@
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#include "smc.h"
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#include "smc.h"
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#include "msu1.h"
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#include "msu1.h"
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#include "usb_hid.h"
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#define EMC0TOGGLE (3<<4)
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#define EMC0TOGGLE (3<<4)
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#define MR0R (1<<1)
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#define MR0R (1<<1)
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@ -46,7 +47,7 @@ int main(void) {
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LPC_GPIO1->FIODIR = 0;
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LPC_GPIO1->FIODIR = 0;
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LPC_GPIO0->FIODIR = BV(16);
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LPC_GPIO0->FIODIR = BV(16);
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/* connect UART3 on P0[25:26] + SSP0 on P0[15:18] SSP1 on P0[6:9] + MAT3.0 on P0[10] */
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/* connect UART3 on P0[25:26] + SSP0 on P0[15:18] + MAT3.0 on P0[10] */
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LPC_PINCON->PINSEL1 = BV(18) | BV(19) | BV(20) | BV(21) /* UART3 */
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LPC_PINCON->PINSEL1 = BV(18) | BV(19) | BV(20) | BV(21) /* UART3 */
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| BV(3) | BV(5); /* SSP0 (FPGA) except SS */
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| BV(3) | BV(5); /* SSP0 (FPGA) except SS */
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LPC_PINCON->PINSEL0 = BV(31); /* SSP0 */
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LPC_PINCON->PINSEL0 = BV(31); /* SSP0 */
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@ -70,9 +71,9 @@ int main(void) {
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led_pwm();
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led_pwm();
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sdn_init();
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sdn_init();
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printf("\n\nsd2snes mk.2\n============\nfw ver.: " VER "\ncpu clock: %d Hz\n", CONFIG_CPU_FREQUENCY);
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printf("\n\nsd2snes mk.2\n============\nfw ver.: " VER "\ncpu clock: %d Hz\n", CONFIG_CPU_FREQUENCY);
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printf("PCONP=%lx\n", LPC_SC->PCONP);
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file_init();
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file_init();
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cic_init(0);
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cic_init(0);
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/* setup timer (fpga clk) */
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/* setup timer (fpga clk) */
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LPC_TIM3->CTCR=0;
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LPC_TIM3->CTCR=0;
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LPC_TIM3->EMR=EMC0TOGGLE;
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LPC_TIM3->EMR=EMC0TOGGLE;
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@ -81,7 +82,7 @@ led_pwm();
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LPC_TIM3->TCR=1;
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LPC_TIM3->TCR=1;
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fpga_init();
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fpga_init();
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fpga_rompgm();
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fpga_rompgm();
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sram_writebyte(0, SRAM_CMD_ADDR);
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while(1) {
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while(1) {
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set_mcu_ovr(1);
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set_mcu_ovr(1);
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if(disk_state == DISK_CHANGED) {
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if(disk_state == DISK_CHANGED) {
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@ -94,8 +95,6 @@ led_pwm();
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set_mapper(0x7);
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set_mapper(0x7);
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set_mcu_ovr(0);
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set_mcu_ovr(0);
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snes_reset(0);
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snes_reset(0);
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delay_ms(15); /* allow CIC to settle */
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while(get_cic_state() == CIC_FAIL) {
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while(get_cic_state() == CIC_FAIL) {
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rdyled(0);
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rdyled(0);
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readled(0);
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readled(0);
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@ -207,6 +206,7 @@ led_pwm();
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printf("test sram\n");
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printf("test sram\n");
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while(!sram_reliable());
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while(!sram_reliable());
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printf("ok\n");
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printf("ok\n");
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//while(1) {
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//while(1) {
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// delay_ms(1000);
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// delay_ms(1000);
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// printf("Estimated SNES master clock: %ld Hz\n", get_snes_sysclk());
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// printf("Estimated SNES master clock: %ld Hz\n", get_snes_sysclk());
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@ -215,7 +215,7 @@ led_pwm();
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//sram_hexdump(SRAM_MENU_ADDR, 0x400);
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//sram_hexdump(SRAM_MENU_ADDR, 0x400);
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while(!cmd) {
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while(!cmd) {
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cmd=menu_main_loop();
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cmd=menu_main_loop();
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// cmd = 1;
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// cmd = 1;
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printf("cmd: %d\n", cmd);
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printf("cmd: %d\n", cmd);
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sleep_ms(50);
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sleep_ms(50);
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uart_putc('-');
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uart_putc('-');
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@ -223,7 +223,7 @@ led_pwm();
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case SNES_CMD_LOADROM:
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case SNES_CMD_LOADROM:
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get_selected_name(file_lfn);
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get_selected_name(file_lfn);
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set_mcu_ovr(1);
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set_mcu_ovr(1);
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// strcpy((char*)file_lfn, "/msu1/msu1vid_ikari_01/msu1vid.sfc");
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// strcpy((char*)file_lfn, "/roms/b/BS Zelda no Densetsu Kodai no Sekiban Dai 1 Hanashi (J).smc");
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printf("Selected name: %s\n", file_lfn);
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printf("Selected name: %s\n", file_lfn);
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filesize = load_rom(file_lfn, SRAM_ROM_ADDR);
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filesize = load_rom(file_lfn, SRAM_ROM_ADDR);
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if(romprops.ramsize_bytes) {
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if(romprops.ramsize_bytes) {
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