mk2 fw wip (cleanup indent+comment)
This commit is contained in:
ikari
parent
db45a5afaf
commit
f063cb31f9
@ -55,7 +55,7 @@ TARGET = $(OBJDIR)/sd2snes
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# List C source files here. (C dependencies are automatically generated.)
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SRC = main.c ff.c ccsbcs.c clock.c uart.c power.c led.c timer.c printf.c sdcard.c spi.c fileops.c rtc.c fpga.c fpga_spi.c snes.c smc.c memory.c crc16.c filetypes.c faulthandler.c sort.c
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SRC = main.c ff.c ccsbcs.c clock.c uart.c power.c led.c timer.c printf.c sdcard.c spi.c fileops.c rtc.c fpga.c fpga_spi.c snes.c smc.c memory.c filetypes.c faulthandler.c sort.c
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# List Assembler source files here.
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@ -1 +1,2 @@
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CONFIG_VERSION=0.0.1
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CONFIG_MCU_FOSC=12000000
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@ -1,6 +1,7 @@
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#ifndef _CONFIG_H
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#define _CONFIG_H
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#define VER "0.0.1"
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#define IN_AHBRAM __attribute__ ((section(".ahbram")))
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#define SDCARD_DETECT (1)
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@ -28,7 +29,7 @@
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#define SNES_RESET_REG LPC_GPIO1
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#define SNES_RESET_BIT 29
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// Rev.B: 26
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/* XXX Rev.B: 26 */
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#define QSORT_MAXELEM 1024
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70
src/crc16.c
70
src/crc16.c
@ -2,20 +2,59 @@
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* \file stdout
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* Functions and types for CRC checks.
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*
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* Generated on Tue Jun 30 23:02:59 2009,
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* Generated on Tue Sep 15 09:32:35 2009,
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* by pycrc v0.7.1, http://www.tty1.net/pycrc/
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* using the configuration:
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* Width = 16
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* Poly = 0x8005
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* XorIn = 0x0000
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* XorIn = 0xffff
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* ReflectIn = True
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* XorOut = 0x0000
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* XorOut = 0xffff
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* ReflectOut = True
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* Algorithm = bit-by-bit-fast
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* Algorithm = table-driven
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* Direct = True
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*****************************************************************************/
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#include <stdint.h>
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#include <arm/NXP/LPC17xx/LPC17xx.h>
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#include "crc16.h"
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/**
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* Static table used for the table_driven implementation.
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*****************************************************************************/
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static const crc_t crc_table[256] = {
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0x0000, 0xc0c1, 0xc181, 0x0140, 0xc301, 0x03c0, 0x0280, 0xc241,
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0xc601, 0x06c0, 0x0780, 0xc741, 0x0500, 0xc5c1, 0xc481, 0x0440,
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0xcc01, 0x0cc0, 0x0d80, 0xcd41, 0x0f00, 0xcfc1, 0xce81, 0x0e40,
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0x0a00, 0xcac1, 0xcb81, 0x0b40, 0xc901, 0x09c0, 0x0880, 0xc841,
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0xd801, 0x18c0, 0x1980, 0xd941, 0x1b00, 0xdbc1, 0xda81, 0x1a40,
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0x1e00, 0xdec1, 0xdf81, 0x1f40, 0xdd01, 0x1dc0, 0x1c80, 0xdc41,
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0x1400, 0xd4c1, 0xd581, 0x1540, 0xd701, 0x17c0, 0x1680, 0xd641,
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0xd201, 0x12c0, 0x1380, 0xd341, 0x1100, 0xd1c1, 0xd081, 0x1040,
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0xf001, 0x30c0, 0x3180, 0xf141, 0x3300, 0xf3c1, 0xf281, 0x3240,
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0x3600, 0xf6c1, 0xf781, 0x3740, 0xf501, 0x35c0, 0x3480, 0xf441,
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0x3c00, 0xfcc1, 0xfd81, 0x3d40, 0xff01, 0x3fc0, 0x3e80, 0xfe41,
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0xfa01, 0x3ac0, 0x3b80, 0xfb41, 0x3900, 0xf9c1, 0xf881, 0x3840,
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0x2800, 0xe8c1, 0xe981, 0x2940, 0xeb01, 0x2bc0, 0x2a80, 0xea41,
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0xee01, 0x2ec0, 0x2f80, 0xef41, 0x2d00, 0xedc1, 0xec81, 0x2c40,
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0xe401, 0x24c0, 0x2580, 0xe541, 0x2700, 0xe7c1, 0xe681, 0x2640,
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0x2200, 0xe2c1, 0xe381, 0x2340, 0xe101, 0x21c0, 0x2080, 0xe041,
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0xa001, 0x60c0, 0x6180, 0xa141, 0x6300, 0xa3c1, 0xa281, 0x6240,
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0x6600, 0xa6c1, 0xa781, 0x6740, 0xa501, 0x65c0, 0x6480, 0xa441,
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0x6c00, 0xacc1, 0xad81, 0x6d40, 0xaf01, 0x6fc0, 0x6e80, 0xae41,
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0xaa01, 0x6ac0, 0x6b80, 0xab41, 0x6900, 0xa9c1, 0xa881, 0x6840,
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0x7800, 0xb8c1, 0xb981, 0x7940, 0xbb01, 0x7bc0, 0x7a80, 0xba41,
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0xbe01, 0x7ec0, 0x7f80, 0xbf41, 0x7d00, 0xbdc1, 0xbc81, 0x7c40,
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0xb401, 0x74c0, 0x7580, 0xb541, 0x7700, 0xb7c1, 0xb681, 0x7640,
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0x7200, 0xb2c1, 0xb381, 0x7340, 0xb101, 0x71c0, 0x7080, 0xb041,
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0x5000, 0x90c1, 0x9181, 0x5140, 0x9301, 0x53c0, 0x5280, 0x9241,
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0x9601, 0x56c0, 0x5780, 0x9741, 0x5500, 0x95c1, 0x9481, 0x5440,
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0x9c01, 0x5cc0, 0x5d80, 0x9d41, 0x5f00, 0x9fc1, 0x9e81, 0x5e40,
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0x5a00, 0x9ac1, 0x9b81, 0x5b40, 0x9901, 0x59c0, 0x5880, 0x9841,
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0x8801, 0x48c0, 0x4980, 0x8941, 0x4b00, 0x8bc1, 0x8a81, 0x4a40,
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0x4e00, 0x8ec1, 0x8f81, 0x4f40, 0x8d01, 0x4dc0, 0x4c80, 0x8c41,
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0x4400, 0x84c1, 0x8581, 0x4540, 0x8701, 0x47c0, 0x4680, 0x8641,
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0x8201, 0x42c0, 0x4380, 0x8341, 0x4100, 0x81c1, 0x8081, 0x4040
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};
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/**
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* Update the crc value with new data.
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*
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@ -26,26 +65,13 @@
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*****************************************************************************/
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crc_t crc16_update(crc_t crc, const unsigned char *data, size_t data_len)
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{
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unsigned int i;
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uint8_t bit;
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unsigned char c;
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unsigned int tbl_idx;
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while (data_len--) {
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c = *data++;
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for (i = 0x01; i & 0xff; i <<= 1) {
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bit = (crc & 0x8000 ? 1 : 0);
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if (c & i) {
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bit ^= 1;
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}
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crc <<= 1;
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if (bit) {
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crc ^= 0x8005;
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}
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}
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crc &= 0xffff;
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tbl_idx = (crc ^ *data) & 0xff;
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crc = (crc_table[tbl_idx] ^ (crc >> 8)) & 0xffff;
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data++;
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}
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return crc & 0xffff;
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}
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21
src/ff.c
21
src/ff.c
@ -1639,6 +1639,8 @@ void get_fileinfo ( /* No return code */
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fno->fsize = LD_DWORD(dir+DIR_FileSize); /* Size */
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fno->fdate = LD_WORD(dir+DIR_WrtDate); /* Date */
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fno->ftime = LD_WORD(dir+DIR_WrtTime); /* Time */
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fno->clust = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16)
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| LD_WORD(dir+DIR_FstClusLO);
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}
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*p = 0; /* Terminate SFN str by a \0 */
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@ -2821,6 +2823,25 @@ FRESULT f_stat (
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}
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FRESULT l_openfilebycluster (
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FATFS *fs, /* Pointer to file system object */
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FIL *fp, /* Pointer to the blank file object */
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const TCHAR *path,
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DWORD clust, /* Cluster number to be opened */
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DWORD fsize /* File size to be assumed */
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)
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{
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chk_mounted(&path, &fs, 0);
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fp->flag = FA_READ;
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fp->org_clust = clust;
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fp->fsize = fsize;
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fp->fptr = 0;
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fp->dsect = 0;
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fp->fs = fs;
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return FR_OK;
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}
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#if !_FS_READONLY
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/*-----------------------------------------------------------------------*/
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5
src/ff.h
5
src/ff.h
@ -358,6 +358,7 @@ typedef struct {
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WORD ftime; /* Last modified time */
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BYTE fattrib; /* Attribute */
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TCHAR fname[13]; /* Short file name (8.3 format) */
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DWORD clust; /* start cluster */
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#if _USE_LFN
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TCHAR* lfname; /* Pointer to the LFN buffer */
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UINT lfsize; /* Size of LFN buffer in TCHAR */
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@ -395,6 +396,10 @@ typedef enum {
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/*--------------------------------------------------------------*/
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/* FatFs module application interface */
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/* Low Level functions */
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FRESULT l_openfilebycluster(FATFS *fs, FIL *fp, const TCHAR *path, DWORD clust, DWORD fsize); /* Open a file by its start cluster using supplied file size */
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/* application level functions */
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FRESULT f_mount (BYTE, FATFS*); /* Mount/Unmount a logical drive */
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FRESULT f_open (FIL*, const TCHAR*, BYTE); /* Open or create a file */
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FRESULT f_read (FIL*, void*, UINT, UINT*); /* Read data from a file */
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@ -29,7 +29,8 @@
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#include "ff.h"
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#include "fileops.h"
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/*WCHAR ff_convert(WCHAR w, UINT dir) {
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/*
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WCHAR ff_convert(WCHAR w, UINT dir) {
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return w;
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}*/
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@ -37,9 +38,9 @@ void file_init() {
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file_res=f_mount(0, &fatfs);
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}
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/*void file_open_by_filinfo(FILINFO* fno) {
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file_res = l_openfilebycluster(&fatfs, &file_handle, (UCHAR*)"", fno->clust, fno->fsize);
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}*/
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void file_open_by_filinfo(FILINFO* fno) {
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file_res = l_openfilebycluster(&fatfs, &file_handle, (TCHAR*)"", fno->clust, fno->fsize);
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}
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void file_open(uint8_t* filename, BYTE flags) {
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file_res = f_open(&file_handle, (TCHAR*)filename, flags);
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@ -32,7 +32,7 @@
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#include "ff.h"
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#include "smc.h"
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#include "fileops.h"
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#include "crc16.h"
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#include "crc.h"
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#include "memory.h"
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#include "led.h"
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#include "sort.h"
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@ -89,25 +89,22 @@ uint16_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
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for(pass = 0; pass < 2; pass++) {
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if(pass) {
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dirsize = 4*(numentries);
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// dir_tgt_next = dir_tgt + dirsize + 4; // number of entries + end marker
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next_subdir_tgt += dirsize + 4;
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if(parent_tgt) next_subdir_tgt += 4;
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if(next_subdir_tgt > dir_end) {
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dir_end = next_subdir_tgt;
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}
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printf("path=%s depth=%d ptr=%lx entries=%d parent=%lx next subdir @%lx\n", path, depth, db_tgt, numentries, parent_tgt, next_subdir_tgt /*dir_tgt_next*/);
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// _delay_ms(50);
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printf("path=%s depth=%d ptr=%lx entries=%d parent=%lx next subdir @%lx\n", path, depth, db_tgt, numentries, parent_tgt, next_subdir_tgt);
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if(mkdb) {
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printf("d=%d Saving %lx to Address %lx [end]\n", depth, 0L, next_subdir_tgt - 4);
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// _delay_ms(50);
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sram_writelong(0L, next_subdir_tgt - 4);
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}
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}
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res = f_opendir(&dir, (TCHAR*)path);
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if (res == FR_OK) {
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if(pass && parent_tgt && mkdb) {
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// write backlink to parent dir
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// switch to next bank if record does not fit in current bank
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/* write backlink to parent dir
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switch to next bank if record does not fit in current bank */
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if((db_tgt&0xffff) > ((0x10000-(sizeof(next_subdir_tgt)+sizeof(len)+4))&0xffff)) {
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printf("switch! old=%lx ", db_tgt);
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db_tgt &= 0xffff0000;
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@ -132,8 +129,6 @@ uint16_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
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break;
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}
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fn = *fno.lfname ? fno.lfname : fno.fname;
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// printf("%s\n", fn);
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// _delay_ms(100);
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if (*fn == '.') continue;
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if (fno.fattrib & AM_DIR) {
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numentries++;
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@ -143,15 +138,12 @@ uint16_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
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depth++;
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if(mkdb) {
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uint16_t pathlen = strlen(path);
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// write element pointer to current dir structure
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/* write element pointer to current dir structure */
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printf("d=%d Saving %lx to Address %lx [dir]\n", depth, db_tgt, dir_tgt);
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// _delay_ms(50);
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sram_writelong((db_tgt-SRAM_MENU_ADDR)|((uint32_t)0x80<<24), dir_tgt);
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// sram_writeblock((uint8_t*)&db_tgt, dir_tgt_save, sizeof(dir_tgt_save));
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// save element:
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// - path name
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// - pointer to sub dir structure
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/* save element:
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- path name
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- pointer to sub dir structure */
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if((db_tgt&0xffff) > ((0x10000-(sizeof(next_subdir_tgt) + sizeof(len) + pathlen + 2))&0xffff)) {
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printf("switch! old=%lx ", db_tgt);
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db_tgt &= 0xffff0000;
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@ -159,18 +151,15 @@ uint16_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
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printf("new=%lx\n", db_tgt);
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}
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printf(" Saving dir descriptor to %lx tgt=%lx, path=%s\n", db_tgt, next_subdir_tgt, path);
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// _delay_ms(100);
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sram_writelong((next_subdir_tgt-SRAM_MENU_ADDR), db_tgt);
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sram_writebyte(len+1, db_tgt+sizeof(next_subdir_tgt));
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sram_writeblock(path, db_tgt+sizeof(next_subdir_tgt)+sizeof(len), pathlen);
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sram_writeblock("/\0", db_tgt + sizeof(next_subdir_tgt) + sizeof(len) + pathlen, 2);
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// sram_writeblock((uint8_t*)&dir_tgt, db_tgt+256, sizeof(dir_tgt));
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db_tgt += sizeof(next_subdir_tgt) + sizeof(len) + pathlen + 2;
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}
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parent_tgt = this_dir_tgt;
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scan_dir(path, mkdb, next_subdir_tgt);
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dir_tgt += 4;
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// if(was_empty)dir_tgt_next += 4;
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was_empty = 0;
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depth--;
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path[len]=0;
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@ -187,17 +176,15 @@ uint16_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
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uint16_t pathlen = strlen(path);
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switch(type) {
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case TYPE_SMC:
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// XXX file_open_by_filinfo(&fno);
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// XXX if(file_res){
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// XXX printf("ZOMG NOOOO %d\n", file_res);
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// XXX _delay_ms(30);
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// XXX }
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// XXX smc_id(&romprops);
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// XXX file_close();
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// _delay_ms(30);
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// write element pointer to current dir structure
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// printf("d=%d Saving %lX to Address %lX [file]\n", depth, db_tgt, dir_tgt);
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// _delay_ms(50);
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/* file_open_by_filinfo(&fno);
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if(file_res){
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printf("ZOMG NOOOO %d\n", file_res);
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}
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smc_id(&romprops);
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file_close();
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*/
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/* write element pointer to current dir structure */
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printf("d=%d Saving %lX to Address %lX [file]\n", depth, db_tgt, dir_tgt);
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if((db_tgt&0xffff) > ((0x10000-(sizeof(romprops) + sizeof(len) + pathlen + 1))&0xffff)) {
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printf("switch! old=%lx ", db_tgt);
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db_tgt &= 0xffff0000;
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@ -205,39 +192,38 @@ uint16_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
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printf("new=%lx\n", db_tgt);
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}
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sram_writelong((db_tgt-SRAM_MENU_ADDR), dir_tgt);
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// sram_writeblock((uint8_t*)&db_tgt, dir_tgt, sizeof(db_tgt));
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dir_tgt += 4;
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// save element:
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// - SNES header information
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// - file name
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sram_writeblock((uint8_t*)&romprops, db_tgt, sizeof(romprops));
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sram_writebyte(len+1, db_tgt + sizeof(romprops));
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sram_writeblock(path, db_tgt + sizeof(romprops) + sizeof(len), pathlen + 1);
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db_tgt += sizeof(romprops) + sizeof(len) + pathlen + 1;
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/* save element:
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- index of last slash character
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- file name */
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/* sram_writeblock((uint8_t*)&romprops, db_tgt, sizeof(romprops)); */
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sram_writebyte(len+1, db_tgt);
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sram_writeblock(path, db_tgt + sizeof(len), pathlen + 1);
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db_tgt += sizeof(len) + pathlen + 1;
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break;
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case TYPE_UNKNOWN:
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default:
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break;
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}
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path[len]=0;
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// printf("%s ", path);
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// _delay_ms(30);
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/* printf("%s ", path);
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_delay_ms(30); */
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}
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} else {
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TCHAR* sfn = fno.fname;
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while(*sfn != 0) {
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crc += crc16_update(crc, (unsigned char*)sfn++, 1);
|
||||
crc += crc_xmodem_update(crc, *((unsigned char*)sfn++));
|
||||
}
|
||||
}
|
||||
}
|
||||
// printf("%s/%s\n", path, fn);
|
||||
// _delay_ms(50);
|
||||
/* printf("%s/%s\n", path, fn);
|
||||
_delay_ms(50); */
|
||||
}
|
||||
}
|
||||
} else uart_putc(0x30+res);
|
||||
}
|
||||
// printf("%x\n", crc);
|
||||
// _delay_ms(50);
|
||||
/*printf("%x\n", crc);
|
||||
_delay_ms(50); */
|
||||
sram_writelong(db_tgt, SRAM_DB_ADDR+4);
|
||||
sram_writelong(dir_end, SRAM_DB_ADDR+8);
|
||||
return crc;
|
||||
|
||||
18
src/fpga.c
18
src/fpga.c
@ -52,7 +52,8 @@
|
||||
#include "led.h"
|
||||
#include "timer.h"
|
||||
|
||||
/*DWORD get_fattime(void) {
|
||||
/*
|
||||
DWORD get_fattime(void) {
|
||||
return 0L;
|
||||
}*/
|
||||
void fpga_set_prog_b(uint8_t val) {
|
||||
@ -108,7 +109,7 @@ void fpga_pgm(uint8_t* filename) {
|
||||
|
||||
UINT bytes_read;
|
||||
|
||||
// open configware file
|
||||
/* open configware file */
|
||||
file_open(filename, FA_READ);
|
||||
if(file_res) {
|
||||
uart_putc('?');
|
||||
@ -118,7 +119,7 @@ void fpga_pgm(uint8_t* filename) {
|
||||
|
||||
for (;;) {
|
||||
bytes_read = file_read();
|
||||
if (file_res || bytes_read == 0) break; // error or eof
|
||||
if (file_res || bytes_read == 0) break; /* error or eof */
|
||||
for(int i=0; i<bytes_read; i++) {
|
||||
FPGA_SEND_BYTE_SERIAL(file_buf[i]);
|
||||
}
|
||||
@ -127,7 +128,6 @@ void fpga_pgm(uint8_t* filename) {
|
||||
} while (!fpga_get_done() && retries--);
|
||||
if(!fpga_get_done()) {
|
||||
printf("FPGA failed to configure after %d tries.\n", MAXRETRIES);
|
||||
delay_ms(50);
|
||||
led_panic();
|
||||
}
|
||||
printf("FPGA configured\n");
|
||||
@ -135,17 +135,15 @@ void fpga_pgm(uint8_t* filename) {
|
||||
}
|
||||
|
||||
void set_mcu_ovr(uint8_t val) {
|
||||
if(!val) { // shared mode
|
||||
if(!val) {
|
||||
/* shared mode */
|
||||
FPGA_SPI_SLOW();
|
||||
SET_MCU_OVR();
|
||||
// Disable SPI double speed mode -> clock = f/4
|
||||
// XXX SPSR = 0;
|
||||
printf("SPI slow\n");
|
||||
} else { // mcu only
|
||||
} else {
|
||||
/* mcu exclusive mode */
|
||||
FPGA_SPI_FAST();
|
||||
CLR_MCU_OVR();
|
||||
// Enable SPI double speed mode -> clock = f/2
|
||||
// XXX SPSR = _BV(SPI2X);
|
||||
printf("SPI fast\n");
|
||||
}
|
||||
}
|
||||
|
||||
@ -90,8 +90,8 @@ void set_mapper(uint8_t val) {
|
||||
|
||||
uint8_t fpga_test() {
|
||||
FPGA_SELECT();
|
||||
FPGA_TX_BYTE(0xF0); // TEST
|
||||
FPGA_TX_BYTE(0x00); // dummy
|
||||
FPGA_TX_BYTE(0xF0); /* TEST */
|
||||
FPGA_TX_BYTE(0x00); /* dummy */
|
||||
uint8_t result = FPGA_RX_BYTE();
|
||||
FPGA_DESELECT();
|
||||
return result;
|
||||
|
||||
83
src/main.c
83
src/main.c
@ -1,6 +1,7 @@
|
||||
#include <arm/NXP/LPC17xx/LPC17xx.h>
|
||||
#include <string.h>
|
||||
#include "config.h"
|
||||
#include "obj/autoconf.h"
|
||||
#include "clock.h"
|
||||
#include "uart.h"
|
||||
#include "bits.h"
|
||||
@ -19,6 +20,8 @@
|
||||
#include "led.h"
|
||||
#include "sort.h"
|
||||
|
||||
#include "tests.h"
|
||||
|
||||
#define EMC0TOGGLE (3<<4)
|
||||
#define MR0R (1<<1)
|
||||
|
||||
@ -56,7 +59,7 @@ int main(void) {
|
||||
sd_init();
|
||||
fpga_spi_init();
|
||||
delay_ms(10);
|
||||
printf("\n\nsd2snes mk.2\n============\ncpu clock: %d Hz\n", CONFIG_CPU_FREQUENCY);
|
||||
printf("\n\nsd2snes mk.2\n============\nfw ver.: " VER "\ncpu clock: %d Hz\n", CONFIG_CPU_FREQUENCY);
|
||||
file_init();
|
||||
/* uart_putc('S');
|
||||
for(p1=0; p1<8192; p1++) {
|
||||
@ -80,7 +83,8 @@ restart:
|
||||
rdyled(1);
|
||||
readled(0);
|
||||
writeled(0);
|
||||
set_mcu_ovr(1); // exclusive mode
|
||||
/* exclusive mode */
|
||||
set_mcu_ovr(1);
|
||||
|
||||
*fs_path=0;
|
||||
uint16_t saved_dir_id;
|
||||
@ -89,14 +93,18 @@ restart:
|
||||
uint16_t mem_dir_id = sram_readshort(SRAM_DIRID);
|
||||
uint32_t mem_magic = sram_readlong(SRAM_SCRATCHPAD);
|
||||
|
||||
|
||||
if((mem_magic != 0x12345678) || (mem_dir_id != saved_dir_id)) {
|
||||
uint16_t curr_dir_id = scan_dir(fs_path, 0, 0); // generate files footprint
|
||||
/* generate fs footprint (interesting files only) */
|
||||
uint16_t curr_dir_id = scan_dir(fs_path, 0, 0);
|
||||
printf("curr dir id = %x\n", curr_dir_id);
|
||||
if((get_db_id(&saved_dir_id) != FR_OK) // no database?
|
||||
|| saved_dir_id != curr_dir_id) { // files changed? // XXX
|
||||
/* files changed or no database found? */
|
||||
if((get_db_id(&saved_dir_id) != FR_OK)
|
||||
|| saved_dir_id != curr_dir_id) {
|
||||
/* rebuild database */
|
||||
printf("saved dir id = %x\n", saved_dir_id);
|
||||
printf("rebuilding database...");
|
||||
curr_dir_id = scan_dir(fs_path, 1, 0); // then rebuild database
|
||||
curr_dir_id = scan_dir(fs_path, 1, 0);
|
||||
sram_writeblock(&curr_dir_id, SRAM_DB_ADDR, 2);
|
||||
uint32_t endaddr, direndaddr;
|
||||
sram_readblock(&endaddr, SRAM_DB_ADDR+4, 4);
|
||||
@ -108,18 +116,12 @@ restart:
|
||||
save_sram((uint8_t*)"/sd2snes/sd2snes.db", endaddr-SRAM_DB_ADDR, SRAM_DB_ADDR);
|
||||
save_sram((uint8_t*)"/sd2snes/sd2snes.dir", direndaddr-(SRAM_DIR_ADDR), SRAM_DIR_ADDR);
|
||||
printf("done\n");
|
||||
// sram_hexdump(SRAM_DB_ADDR, 0x400);
|
||||
} else {
|
||||
printf("saved dir id = %x\n", saved_dir_id);
|
||||
printf("different card, consistent db, loading db...\n");
|
||||
load_sram((uint8_t*)"/sd2snes/sd2snes.db", SRAM_DB_ADDR);
|
||||
load_sram((uint8_t*)"/sd2snes/sd2snes.dir", SRAM_DIR_ADDR);
|
||||
}
|
||||
// save_sram((uint8_t*)"/debug.smc", 0x400000, 0);
|
||||
// uart_putc('[');
|
||||
// load_sram((uint8_t*)"/test.srm", SRAM_SAVE_ADDR);
|
||||
// uart_putc(']');
|
||||
|
||||
sram_writeshort(curr_dir_id, SRAM_DIRID);
|
||||
sram_writelong(0x12345678, SRAM_SCRATCHPAD);
|
||||
} else {
|
||||
@ -128,18 +130,18 @@ restart:
|
||||
load_sram((uint8_t*)"/sd2snes/sd2snes.dir", SRAM_DIR_ADDR);
|
||||
}
|
||||
|
||||
/* load menu */
|
||||
uart_putc('(');
|
||||
load_rom((uint8_t*)"/sd2snes/menu.bin", SRAM_MENU_ADDR);
|
||||
set_rom_mask(0x3fffff); // force mirroring off
|
||||
set_mapper(0x7); // menu mapper XXX
|
||||
/* force memory size + mapper */
|
||||
set_rom_mask(0x3fffff);
|
||||
set_mapper(0x7);
|
||||
uart_putc(')');
|
||||
uart_putcrlf();
|
||||
// sram_hexdump(0x7ffff0, 0x10);
|
||||
// sram_hexdump(0, 0x400);
|
||||
// save_sram((uint8_t*)"/sd2snes/dump", 65536, 0);
|
||||
|
||||
sram_writebyte(0, SRAM_CMD_ADDR);
|
||||
|
||||
/* shared mode */
|
||||
set_mcu_ovr(0);
|
||||
|
||||
printf("SNES GO!\n");
|
||||
@ -150,25 +152,15 @@ restart:
|
||||
while(!sram_reliable()) uart_puts("DERP");
|
||||
printf("ok\n");
|
||||
|
||||
/* uint8_t *teststring=(uint8_t*)"Wer das liest ist doof! 0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ";
|
||||
uint8_t testbuf[80];
|
||||
while(1) {
|
||||
sram_writeblock(teststring, 0xd00000, 61);
|
||||
sram_readblock(testbuf, 0xd00000, 61);
|
||||
testbuf[60]=0;
|
||||
printf("%p %s\n",testbuf, (char*)testbuf);
|
||||
} */
|
||||
|
||||
sram_hexdump(SRAM_DB_ADDR, 0x200);
|
||||
while(!cmd) {
|
||||
cmd=menu_main_loop();
|
||||
switch(cmd) {
|
||||
case SNES_CMD_LOADROM:
|
||||
get_selected_name(file_lfn);
|
||||
// snes_reset(1);
|
||||
set_mcu_ovr(1);
|
||||
printf("Selected name: %s\n", file_lfn);
|
||||
load_rom(file_lfn, SRAM_ROM_ADDR);
|
||||
// save_sram((uint8_t*)"/sd2snes/test.smc", romprops.romsize_bytes, 0);
|
||||
if(romprops.ramsize_bytes) {
|
||||
strcpy(strrchr((char*)file_lfn, (int)'.'), ".srm");
|
||||
printf("SRM file: %s\n", file_lfn);
|
||||
@ -185,7 +177,7 @@ while(1) {
|
||||
break;
|
||||
default:
|
||||
printf("unknown cmd: %d\n", cmd);
|
||||
cmd=0; // unknown cmd: stay in loop
|
||||
cmd=0; /* unknown cmd: stay in loop */
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -200,7 +192,6 @@ while(1) {
|
||||
if(!snes_reset_prev) {
|
||||
printf("RESET BUTTON DOWN\n");
|
||||
snes_reset_state=1;
|
||||
// reset reset counter
|
||||
reset_count=0;
|
||||
}
|
||||
} else {
|
||||
@ -231,37 +222,7 @@ while(1) {
|
||||
}
|
||||
snes_reset_prev = snes_reset_now;
|
||||
}
|
||||
// FPGA TEST FAIL. PANIC.
|
||||
/* fpga test fail: panic */
|
||||
led_panic();
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
void teststuff(void) {
|
||||
uint8_t i=0, data;
|
||||
uint32_t p1;
|
||||
sram_writebyte(0x5e, 0);
|
||||
sram_writebyte(0x6f, 1);
|
||||
sram_writelong(0x3451451e, 4);
|
||||
sram_hexdump(0x0, 0x10);
|
||||
sram_hexdump(0x620000, 0x200);
|
||||
|
||||
while(i<10) {
|
||||
FPGA_SELECT();
|
||||
FPGA_TX_BYTE(0xff);
|
||||
FPGA_TX_BYTE(0xff);
|
||||
data=FPGA_TXRX_BYTE(i);
|
||||
FPGA_DESELECT();
|
||||
printf("%x %x\n", i, data);
|
||||
i++;
|
||||
}
|
||||
while(1) {
|
||||
// if((data=fpga_test())!=0xa5) printf("Unexpected FPGA test token 0x%x\n", data);
|
||||
}
|
||||
|
||||
while (1) {
|
||||
p1 = LPC_GPIO1->FIOPIN;
|
||||
BITBAND(LPC_GPIO2->FIOPIN, 1) = (p1 & BV(29))>>29;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
71
src/memory.c
71
src/memory.c
@ -28,7 +28,7 @@
|
||||
#include "config.h"
|
||||
#include "uart.h"
|
||||
#include "fpga.h"
|
||||
#include "crc16.h"
|
||||
#include "crc.h"
|
||||
#include "ff.h"
|
||||
#include "fileops.h"
|
||||
#include "spi.h"
|
||||
@ -53,17 +53,17 @@ void sram_hexdump(uint32_t addr, uint32_t len) {
|
||||
void sram_writebyte(uint8_t val, uint32_t addr) {
|
||||
set_mcu_addr(addr);
|
||||
FPGA_SELECT();
|
||||
FPGA_TX_BYTE(0x91); // WRITE
|
||||
FPGA_TX_BYTE(0x91); /* WRITE */
|
||||
FPGA_TX_BYTE(val);
|
||||
FPGA_TX_BYTE(0x00); // dummy
|
||||
FPGA_TX_BYTE(0x00); /* dummy */
|
||||
FPGA_DESELECT();
|
||||
}
|
||||
|
||||
uint8_t sram_readbyte(uint32_t addr) {
|
||||
set_mcu_addr(addr);
|
||||
FPGA_SELECT();
|
||||
FPGA_TX_BYTE(0x81); // READ
|
||||
FPGA_TX_BYTE(0x00); // dummy
|
||||
FPGA_TX_BYTE(0x81); /* READ */
|
||||
FPGA_TX_BYTE(0x00); /* dummy */
|
||||
uint8_t val = FPGA_TXRX_BYTE(0x00);
|
||||
FPGA_DESELECT();
|
||||
return val;
|
||||
@ -72,22 +72,22 @@ uint8_t sram_readbyte(uint32_t addr) {
|
||||
void sram_writeshort(uint16_t val, uint32_t addr) {
|
||||
set_mcu_addr(addr);
|
||||
FPGA_SELECT();
|
||||
FPGA_TX_BYTE(0x91); // WRITE
|
||||
FPGA_TX_BYTE(val&0xff); // 7-0
|
||||
FPGA_TX_BYTE((val>>8)&0xff); // 15-8
|
||||
FPGA_TX_BYTE(0x00); // dummy
|
||||
FPGA_TX_BYTE(0x91); /* WRITE */
|
||||
FPGA_TX_BYTE(val&0xff);
|
||||
FPGA_TX_BYTE((val>>8)&0xff);
|
||||
FPGA_TX_BYTE(0x00); /* dummy */
|
||||
FPGA_DESELECT();
|
||||
}
|
||||
|
||||
void sram_writelong(uint32_t val, uint32_t addr) {
|
||||
set_mcu_addr(addr);
|
||||
FPGA_SELECT();
|
||||
FPGA_TX_BYTE(0x91); // WRITE
|
||||
FPGA_TX_BYTE(val&0xff); // 7-0
|
||||
FPGA_TX_BYTE((val>>8)&0xff); // 15-8
|
||||
FPGA_TX_BYTE((val>>16)&0xff); // 23-15
|
||||
FPGA_TX_BYTE((val>>24)&0xff); // 31-24
|
||||
FPGA_TX_BYTE(0x00); // dummy
|
||||
FPGA_TX_BYTE(0x91); /* WRITE */
|
||||
FPGA_TX_BYTE(val&0xff);
|
||||
FPGA_TX_BYTE((val>>8)&0xff);
|
||||
FPGA_TX_BYTE((val>>16)&0xff);
|
||||
FPGA_TX_BYTE((val>>24)&0xff);
|
||||
FPGA_TX_BYTE(0x00);
|
||||
FPGA_DESELECT();
|
||||
}
|
||||
|
||||
@ -96,7 +96,6 @@ uint16_t sram_readshort(uint32_t addr) {
|
||||
FPGA_SELECT();
|
||||
FPGA_TX_BYTE(0x81);
|
||||
FPGA_TX_BYTE(0x00);
|
||||
|
||||
uint32_t val = FPGA_TXRX_BYTE(0x00);
|
||||
val |= ((uint32_t)FPGA_TXRX_BYTE(0x00)<<8);
|
||||
FPGA_DESELECT();
|
||||
@ -137,8 +136,8 @@ void sram_readblock(void* buf, uint32_t addr, uint16_t size) {
|
||||
uint8_t* tgt = buf;
|
||||
set_mcu_addr(addr);
|
||||
FPGA_SELECT();
|
||||
FPGA_TX_BYTE(0x81); // READ
|
||||
FPGA_TX_BYTE(0x00); // dummy
|
||||
FPGA_TX_BYTE(0x81); /* READ */
|
||||
FPGA_TX_BYTE(0x00); /* dummy */
|
||||
while(count--) {
|
||||
*(tgt++) = FPGA_TXRX_BYTE(0x00);
|
||||
}
|
||||
@ -150,16 +149,15 @@ void sram_writeblock(void* buf, uint32_t addr, uint16_t size) {
|
||||
uint8_t* src = buf;
|
||||
set_mcu_addr(addr);
|
||||
FPGA_SELECT();
|
||||
FPGA_TX_BYTE(0x91); // WRITE
|
||||
FPGA_TX_BYTE(0x91); /* WRITE */
|
||||
while(count--) {
|
||||
FPGA_TX_BYTE(*src++);
|
||||
}
|
||||
FPGA_TX_BYTE(0x00); // dummy
|
||||
FPGA_TX_BYTE(0x00); /* dummy */
|
||||
FPGA_DESELECT();
|
||||
}
|
||||
|
||||
uint32_t load_rom(uint8_t* filename, uint32_t base_addr) {
|
||||
// uint8_t dummy;
|
||||
UINT bytes_read;
|
||||
DWORD filesize;
|
||||
UINT count=0;
|
||||
@ -176,28 +174,20 @@ uint32_t load_rom(uint8_t* filename, uint32_t base_addr) {
|
||||
f_lseek(&file_handle, romprops.offset);
|
||||
FPGA_DESELECT();
|
||||
for(;;) {
|
||||
// SPI_OFFLOAD=1;
|
||||
/* SPI_OFFLOAD=1; */
|
||||
bytes_read = file_read();
|
||||
if (file_res || !bytes_read) break;
|
||||
if(!(count++ % 32)) {
|
||||
toggle_read_led();
|
||||
// bounce_busy_led();
|
||||
/* bounce_busy_led(); */
|
||||
uart_putc('.');
|
||||
}
|
||||
FPGA_SELECT();
|
||||
FPGA_TX_BYTE(0x91); // write w/ increment
|
||||
if(!(count++ % 8)) {
|
||||
// toggle_busy_led();
|
||||
// bounce_busy_led();
|
||||
uart_putc('.');
|
||||
}
|
||||
FPGA_TX_BYTE(0x91); /* write w/ increment */
|
||||
for(int j=0; j<bytes_read; j++) {
|
||||
FPGA_TX_BYTE(file_buf[j]);
|
||||
/* SPDR = file_buf[j];
|
||||
loop_until_bit_is_set(SPSR, SPIF);
|
||||
dummy = SPDR;*/
|
||||
}
|
||||
FPGA_TX_BYTE(0x00); // dummy tx for increment+write pulse */
|
||||
FPGA_TX_BYTE(0x00); /* dummy tx for increment+write pulse */
|
||||
FPGA_DESELECT();
|
||||
}
|
||||
file_close();
|
||||
@ -239,7 +229,7 @@ uint32_t load_sram(uint8_t* filename, uint32_t base_addr) {
|
||||
for(int j=0; j<bytes_read; j++) {
|
||||
FPGA_TX_BYTE(file_buf[j]);
|
||||
}
|
||||
FPGA_TX_BYTE(0x00); // dummy tx
|
||||
FPGA_TX_BYTE(0x00); /* dummy tx */
|
||||
FPGA_DESELECT();
|
||||
}
|
||||
file_close();
|
||||
@ -259,8 +249,8 @@ void save_sram(uint8_t* filename, uint32_t sram_size, uint32_t base_addr) {
|
||||
while(count<sram_size) {
|
||||
set_mcu_addr(base_addr+count);
|
||||
FPGA_SELECT();
|
||||
FPGA_TX_BYTE(0x81); // read
|
||||
FPGA_TX_BYTE(0); // dummy
|
||||
FPGA_TX_BYTE(0x81); /* read */
|
||||
FPGA_TX_BYTE(0x00); /* dummy */
|
||||
for(int j=0; j<sizeof(file_buf); j++) {
|
||||
file_buf[j] = FPGA_TXRX_BYTE(0x00);
|
||||
count++;
|
||||
@ -291,7 +281,7 @@ uint32_t calc_sram_crc(uint32_t base_addr, uint32_t size) {
|
||||
crc_valid = 0;
|
||||
break;
|
||||
}
|
||||
crc += crc16_update(crc, &data, 1);
|
||||
crc += crc_xmodem_update(crc, data);
|
||||
}
|
||||
FPGA_DESELECT();
|
||||
return crc;
|
||||
@ -300,7 +290,6 @@ uint32_t calc_sram_crc(uint32_t base_addr, uint32_t size) {
|
||||
uint8_t sram_reliable() {
|
||||
uint16_t score=0;
|
||||
uint32_t val;
|
||||
// uint32_t val = sram_readlong(SRAM_SCRATCHPAD);
|
||||
uint8_t result = 0;
|
||||
/*while(score<SRAM_RELIABILITY_SCORE) {
|
||||
if(sram_readlong(SRAM_SCRATCHPAD)==val) {
|
||||
@ -314,13 +303,13 @@ uint8_t sram_reliable() {
|
||||
val=sram_readlong(SRAM_SCRATCHPAD);
|
||||
if(val==0x12345678) {
|
||||
score++;
|
||||
// } else {
|
||||
// dprintf("i=%d val=%08lX\n", i, val);
|
||||
/* } else {
|
||||
dprintf("i=%d val=%08lX\n", i, val); */
|
||||
}
|
||||
}
|
||||
if(score<SRAM_RELIABILITY_SCORE) {
|
||||
result = 0;
|
||||
// dprintf("score=%d\n", score);
|
||||
/* dprintf("score=%d\n", score); */
|
||||
} else {
|
||||
result = 1;
|
||||
}
|
||||
|
||||
@ -28,6 +28,7 @@
|
||||
#define MEMORY_H
|
||||
|
||||
#include <arm/NXP/LPC17xx/LPC17xx.h>
|
||||
#include "smc.h"
|
||||
|
||||
#define SRAM_ROM_ADDR (0x000000L)
|
||||
#define SRAM_SAVE_ADDR (0xE00000L)
|
||||
@ -58,6 +59,5 @@
|
||||
uint32_t calc_sram_crc(uint32_t base_addr, uint32_t size);
|
||||
uint8_t sram_reliable(void);
|
||||
|
||||
#include "smc.h"
|
||||
snes_romprops_t romprops;
|
||||
#endif
|
||||
|
||||
18
src/smc.c
18
src/smc.c
@ -74,15 +74,13 @@ uint8_t checkChksum(uint16_t cchk, uint16_t chk) {
|
||||
}
|
||||
|
||||
void smc_id(snes_romprops_t* props) {
|
||||
uint8_t score, maxscore=1, score_idx=2; // assume LoROM
|
||||
uint8_t score, maxscore=1, score_idx=2; /* assume LoROM */
|
||||
|
||||
snes_header_t* header = &(props->header);
|
||||
|
||||
for(uint8_t num = 0; num < 6; num++) {
|
||||
if(!file_readblock(header, hdr_addr[num], sizeof(snes_header_t))
|
||||
|| file_res) {
|
||||
// dprintf("uh oh... %d\n", file_res);
|
||||
// _delay_ms(30);
|
||||
score = 0;
|
||||
} else {
|
||||
score = smc_headerscore(header)/(1+(num&1));
|
||||
@ -100,8 +98,7 @@ void smc_id(snes_romprops_t* props) {
|
||||
}
|
||||
}
|
||||
}
|
||||
// dprintf("%d: offset = %lX; score = %d\n", num, hdr_addr[num], score);
|
||||
// _delay_ms(100);
|
||||
/* dprintf("%d: offset = %lX; score = %d\n", num, hdr_addr[num], score); */
|
||||
if(score>=maxscore) {
|
||||
score_idx=num;
|
||||
maxscore=score;
|
||||
@ -114,9 +111,8 @@ void smc_id(snes_romprops_t* props) {
|
||||
props->offset = 0;
|
||||
}
|
||||
|
||||
// restore the chosen one
|
||||
// dprintf("winner is %d\n", score_idx);
|
||||
// _delay_ms(30);
|
||||
/* restore the chosen one */
|
||||
/*dprintf("winner is %d\n", score_idx); */
|
||||
file_readblock(header, hdr_addr[score_idx], sizeof(snes_header_t));
|
||||
switch(header->map & 0xef) {
|
||||
case 0x20:
|
||||
@ -128,7 +124,7 @@ void smc_id(snes_romprops_t* props) {
|
||||
case 0x25:
|
||||
props->mapper_id = 2;
|
||||
break;
|
||||
default: // invalid/unsupported mapper, use header location
|
||||
default: /* invalid/unsupported mapper, use header location */
|
||||
switch(score_idx) {
|
||||
case 0:
|
||||
case 1:
|
||||
@ -152,11 +148,11 @@ void smc_id(snes_romprops_t* props) {
|
||||
props->ramsize_bytes = (uint32_t)1024 << header->ramsize;
|
||||
props->romsize_bytes = (uint32_t)1024 << header->romsize;
|
||||
props->expramsize_bytes = (uint32_t)1024 << header->expramsize;
|
||||
// dprintf("ramsize_bytes: %ld\n", props->ramsize_bytes);
|
||||
/*dprintf("ramsize_bytes: %ld\n", props->ramsize_bytes); */
|
||||
if(props->ramsize_bytes > 32768 || props->ramsize_bytes < 2048) {
|
||||
props->ramsize_bytes = 0;
|
||||
}
|
||||
// dprintf("ramsize_bytes: %ld\n", props->ramsize_bytes);
|
||||
/*dprintf("ramsize_bytes: %ld\n", props->ramsize_bytes); */
|
||||
f_lseek(&file_handle, 0);
|
||||
}
|
||||
|
||||
|
||||
46
src/smc.h
46
src/smc.h
@ -28,32 +28,32 @@
|
||||
#define SMC_H
|
||||
|
||||
typedef struct _snes_header {
|
||||
uint8_t maker[2]; // 0xB0
|
||||
uint8_t gamecode[4]; // 0xB2
|
||||
uint8_t fixed_00[7]; // 0xB6
|
||||
uint8_t expramsize; // 0xBD
|
||||
uint8_t specver; // 0xBE
|
||||
uint8_t carttype2; // 0xBF
|
||||
uint8_t name[21]; // 0xC0
|
||||
uint8_t map; // 0xD5
|
||||
uint8_t carttype; // 0xD6
|
||||
uint8_t romsize; // 0xD7
|
||||
uint8_t ramsize; // 0xD8
|
||||
uint8_t destcode; // 0xD9
|
||||
uint8_t fixed_33; // 0xDA
|
||||
uint8_t ver; // 0xDB
|
||||
uint16_t cchk; // 0xDC
|
||||
uint16_t chk; // 0xDE
|
||||
uint8_t maker[2]; /* 0xB0 */
|
||||
uint8_t gamecode[4]; /* 0xB2 */
|
||||
uint8_t fixed_00[7]; /* 0xB6 */
|
||||
uint8_t expramsize; /* 0xBD */
|
||||
uint8_t specver; /* 0xBE */
|
||||
uint8_t carttype2; /* 0xBF */
|
||||
uint8_t name[21]; /* 0xC0 */
|
||||
uint8_t map; /* 0xD5 */
|
||||
uint8_t carttype; /* 0xD6 */
|
||||
uint8_t romsize; /* 0xD7 */
|
||||
uint8_t ramsize; /* 0xD8 */
|
||||
uint8_t destcode; /* 0xD9 */
|
||||
uint8_t fixed_33; /* 0xDA */
|
||||
uint8_t ver; /* 0xDB */
|
||||
uint16_t cchk; /* 0xDC */
|
||||
uint16_t chk; /* 0xDE */
|
||||
} snes_header_t;
|
||||
|
||||
typedef struct _snes_romprops {
|
||||
uint16_t offset; // start of actual ROM image
|
||||
uint8_t mapper_id; // FPGA mapper
|
||||
uint8_t pad1; // for alignment
|
||||
uint32_t expramsize_bytes; // ExpRAM size in bytes
|
||||
uint32_t ramsize_bytes; // CartRAM size in bytes
|
||||
uint32_t romsize_bytes; // ROM size in bytes (rounded up)
|
||||
snes_header_t header; // original header from ROM image
|
||||
uint16_t offset; /* start of actual ROM image */
|
||||
uint8_t mapper_id; /* FPGA mapper */
|
||||
uint8_t pad1; /* for alignment */
|
||||
uint32_t expramsize_bytes; /* ExpRAM size in bytes */
|
||||
uint32_t ramsize_bytes; /* CartRAM size in bytes */
|
||||
uint32_t romsize_bytes; /* ROM size in bytes (rounded up) */
|
||||
snes_header_t header; /* original header from ROM image */
|
||||
} snes_romprops_t;
|
||||
|
||||
void smc_id(snes_romprops_t*);
|
||||
|
||||
@ -131,5 +131,5 @@ uint8_t menu_main_loop() {
|
||||
void get_selected_name(uint8_t* fn) {
|
||||
uint32_t addr = sram_readlong(SRAM_PARAM_ADDR);
|
||||
printf("fd addr=%lx\n", addr);
|
||||
sram_readblock(fn, addr+0x41+SRAM_MENU_ADDR, 256);
|
||||
sram_readblock(fn, addr+1+SRAM_MENU_ADDR, 256);
|
||||
}
|
||||
|
||||
13
src/sort.c
13
src/sort.c
@ -41,9 +41,7 @@ int sort_cmp_elem(const void* elem1, const void* elem2) {
|
||||
uint32_t el2 = *(uint32_t*)elem2;
|
||||
sort_getstring_for_dirent(sort_str1, el1);
|
||||
sort_getstring_for_dirent(sort_str2, el2);
|
||||
//sort_getlong_for_dirent(sort_long1, elem1);
|
||||
//sort_getlong_for_dirent(sort_long2, elem2);
|
||||
// printf("i1=%d i2=%d elem1=%lx elem2=%lx ; compare %s --- %s\n", index1, index2, elem1, elem2, sort_str1, sort_str2);
|
||||
/*printf("i1=%d i2=%d elem1=%lx elem2=%lx ; compare %s --- %s\n", index1, index2, elem1, elem2, sort_str1, sort_str2); */
|
||||
|
||||
if ((el1 & 0x80000000) && !(el2 & 0x80000000)) {
|
||||
return -1;
|
||||
@ -70,25 +68,22 @@ stat_getstring++;
|
||||
sram_readblock(ptr, addr+0x6+SRAM_MENU_ADDR, 20);
|
||||
} else {
|
||||
/* is file link, name offset 65 */
|
||||
sram_readblock(ptr, addr+0x41+SRAM_MENU_ADDR, 20);
|
||||
sram_readblock(ptr, addr+1+SRAM_MENU_ADDR, 20);
|
||||
}
|
||||
ptr[20]=0;
|
||||
}
|
||||
|
||||
void sort_heapify(uint32_t addr, unsigned int i, unsigned int heapsize)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
while(1) {
|
||||
unsigned int l = 2*i+1;
|
||||
unsigned int r = 2*i+2;
|
||||
|
||||
unsigned int largest = (l < heapsize && sort_cmp_idx(addr, i, l) < 0) ? l : i;
|
||||
|
||||
if(r < heapsize && sort_cmp_idx(addr, largest, r) < 0)
|
||||
largest = r;
|
||||
|
||||
if(largest != i)
|
||||
{
|
||||
if(largest != i) {
|
||||
uint32_t tmp = sort_get_elem(addr, i);
|
||||
sort_put_elem(addr, i, sort_get_elem(addr, largest));
|
||||
sort_put_elem(addr, largest, tmp);
|
||||
|
||||
@ -16,7 +16,7 @@
|
||||
volatile tick_t ticks;
|
||||
|
||||
void __attribute__((weak,noinline)) SysTick_Hook(void) {
|
||||
// Empty function for hooking the systick handler
|
||||
/* Empty function for hooking the systick handler */
|
||||
}
|
||||
|
||||
/* Systick interrupt handler */
|
||||
@ -30,7 +30,7 @@ void timer_init(void) {
|
||||
BITBAND(LPC_SC->PCONP, PCRIT) = 1;
|
||||
|
||||
/* clear RIT mask */
|
||||
LPC_RIT->RIMASK = 0; //xffffffff;
|
||||
LPC_RIT->RIMASK = 0; /*xffffffff;*/
|
||||
|
||||
/* PCLK = CCLK */
|
||||
BITBAND(LPC_SC->PCLKSEL1, 26) = 1;
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user