diff --git a/src/fpga_spi.c b/src/fpga_spi.c
index f085de1..7296228 100644
--- a/src/fpga_spi.c
+++ b/src/fpga_spi.c
@@ -60,7 +60,7 @@
 				tt = target (see above)
 				i = increment (see above)
 
-	E0	ssrr		set MSU-1 status register (=FPGA status byte 2)
+	E0	ssrr		set MSU-1 status register (=FPGA status [7:0])
 				ss = bits to set in status register (1=set)
 				rr = bits to reset in status register (1=reset)
 
@@ -69,15 +69,40 @@
 	E3	-		reset DAC playback pointer (0)
 	E4	hhll		set MSU read pointer
 
+	E5	tt{12}		set RTC (SRTC/SPC7110 format)
+	E6	ssrr		set/reset BS-X status register [7:0]
 	F0	-		receive test token (to see if FPGA is alive)
-	F1	-		receive status (2 bytes)
+	F1	-		receive status (16bit, MSB first), see below
 
 	F2	-		get MSU data address (32bit, MSB first)
 	F3	-		get MSU audio track no. (16bit, MSB first)
 	F4	-		get MSU volume (8bit)
 
 	FE	-		get SNES master clock frequency (32bit, MSB first)
+				measured 1x/sec
 	FF	{xx}*		echo (returns the sent data in the next byte)
+
+	FPGA status word:
+	bit	function
+   ==========================================================================
+	 15	SD DMA busy (0=idle, 1=busy)
+	 14	DAC read pointer MSB
+	 13	MSU read pointer MSB
+	 12	[TODO SD DMA CRC status (0=ok, 1=error); valid after bit 15 -> 0]
+	 11	reserved (0)
+	 10	reserved (0)
+	  9	reserved (0)
+	  8	reserved (0)
+	  7	reserved (0)
+	  6	reserved (0)
+	  5	MSU1 Audio request from SNES
+	  4	MSU1 Data request from SNES
+	  3	reserved (0)
+	  2	MSU1 Audio control status: 0=no repeat, 1=repeat
+	  1	MSU1 Audio control status: 0=pause, 1=play
+	  0	MSU1 Audio control request
+
+
 */
 
 #include <arm/NXP/LPC17xx/LPC17xx.h>
@@ -189,7 +214,7 @@ void fpga_sddma(uint8_t tgt, uint8_t partial) {
     test++;
   }
   FPGA_DESELECT();
-  if(test<10)printf("loopy: %ld %02x\n", test, status);
+  if(test<5)printf("loopy: %ld %02x\n", test, status);
   BITBAND(SD_CLKREG->FIODIR, SD_CLKPIN) = 1;
 }
 
@@ -286,3 +311,14 @@ uint32_t get_snes_sysclk() {
   FPGA_DESELECT();
   return result;
 }
+
+void set_bsx_regs(uint8_t set, uint8_t reset) {
+  FPGA_SELECT();
+  FPGA_TX_BYTE(0xe6);
+  FPGA_TX_BYTE(set);
+  FPGA_TX_BYTE(reset);
+  FPGA_TX_BYTE(0x00); /* latch reset */
+  FPGA_DESELECT();
+}
+
+
diff --git a/src/fpga_spi.h b/src/fpga_spi.h
index 50c8a02..1a3dc69 100644
--- a/src/fpga_spi.h
+++ b/src/fpga_spi.h
@@ -72,4 +72,5 @@ uint8_t get_msu_volume(void);
 uint16_t get_msu_track(void);
 uint32_t get_msu_offset(void);
 uint32_t get_snes_sysclk(void);
+void set_bsx_regs(uint8_t set, uint8_t reset);
 #endif
diff --git a/src/memory.c b/src/memory.c
index d5285a8..bd7e738 100644
--- a/src/memory.c
+++ b/src/memory.c
@@ -210,6 +210,23 @@ ticks_read+=getticks()-tickstmp;
   printf("rom header map: %02x; mapper id: %d\n", romprops.header.map, romprops.mapper_id);
 ticks_total=getticks()-ticksstart;
   printf("%u ticks in read, %u ticks in tx, %u ticks total\n", ticks_read, ticks_tx, ticks_total);
+  if(romprops.mapper_id==3) {
+    printf("attempting to load BSX BIOS /sd2snes/bsxbios.sfc...\n");
+    load_sram((uint8_t*)"/sd2snes/bsxbios.sfc", 0x800000);
+    printf("Type: %02x\n", romprops.header.destcode);
+    set_bsx_regs(0xc0, 0x3f);
+    uint16_t rombase;
+    if(romprops.header.ramsize & 1) {
+      rombase = 0xff00;
+//      set_bsx_regs(0xf6, 0x09);
+    } else {
+      rombase = 0x7f00;
+//      set_bsx_regs(0xf4, 0x0b);
+    }
+    sram_writebyte(0x33, rombase+0xda);
+    sram_writebyte(0x00, rombase+0xd4);
+    sram_writebyte(0xfc, rombase+0xd5);
+  }
   uint32_t rammask;
   uint32_t rommask;
 
diff --git a/src/smc.c b/src/smc.c
index 19b42f0..7abc95d 100644
--- a/src/smc.c
+++ b/src/smc.c
@@ -81,7 +81,7 @@ void smc_id(snes_romprops_t* props) {
   snes_header_t* header = &(props->header);
 
   for(uint8_t num = 0; num < 6; num++) {
-    if(!file_readblock(header, hdr_addr[num], sizeof(snes_header_t)) 
+    if(!file_readblock(header, hdr_addr[num], sizeof(snes_header_t))
        || file_res) {
       score = 0;
     } else {
@@ -104,7 +104,7 @@ void smc_id(snes_romprops_t* props) {
     if(score>=maxscore) {
       score_idx=num;
       maxscore=score;
-    }		
+    }
   }
 
   if(score_idx & 1) {
@@ -116,6 +116,24 @@ void smc_id(snes_romprops_t* props) {
   /* restore the chosen one */
 /*dprintf("winner is %d\n", score_idx); */
   file_readblock(header, hdr_addr[score_idx], sizeof(snes_header_t));
+
+  if(header->name[0x13] == 0x00 || header->name[0x13] == 0xff) {
+    if(header->name[0x14] == 0x00) {
+      const uint8_t n15 = header->map;
+      if(n15 == 0x00 || n15 == 0x80 || n15 == 0x84 || n15 == 0x9c
+        || n15 == 0xbc || n15 == 0xfc) {
+        if(header->fixed_33 == 0x33 || header->fixed_33 == 0xff) {
+          props->mapper_id = 0;
+/*XXX do this properly */
+          props->ramsize_bytes = 0x8000;
+          props->romsize_bytes = 0x100000;
+          props->expramsize_bytes = 0;
+          props->mapper_id = 3; /* BS-X Memory Map */
+          return;
+        }
+      }
+    }
+  }
   switch(header->map & 0xef) {
     case 0x21: /* HiROM */
       props->mapper_id = 0;
@@ -130,7 +148,7 @@ void smc_id(snes_romprops_t* props) {
       if(file_handle.fsize > 0x400200) {
         props->mapper_id = 6; /* SO96 */
       } else {
-        props->mapper_id = 3;
+        props->mapper_id = 4;
       }
       break;
     default: /* invalid/unsupported mapper, use header location */
@@ -144,7 +162,7 @@ void smc_id(snes_romprops_t* props) {
           if(file_handle.fsize > 0x800200) {
             props->mapper_id = 6; /* SO96 interleaved */
           } else if(file_handle.fsize > 0x400200) {
-            props->mapper_id = 3; /* ExLoROM */
+            props->mapper_id = 4; /* ExLoROM */
           } else {
             props->mapper_id = 1; /* LoROM */
           }