4 Commits

Author	SHA1	Message	Date
Maximilian Rehkopf	f5caf21fac	FPGA: slightly tighten timing constraints	2012-05-02 10:41:07 +02:00
ikari	e2f33c28c9	FPGA: pull-up SD clock	2012-02-27 22:12:35 +01:00
ikari	f0a2e85c65	FPGA: updated project files	2012-01-14 23:16:57 +01:00
ikari	d7ad740843	FPGA/Cx4: add missing file main.ucf	2012-01-14 02:25:34 +01:00