.text #include "memmap.i65" hiprint: sep #$20 : .as lda print_count sta print_count_tmp stz print_done rep #$30 : .xl : .al lda print_x and #$00ff lsr bcs print_bg1 ldx #!BG1_TILE_BUF ; for 2nd loop phx ldx #!BG2_TILE_BUF ; for 1st loop phx bra print_bg_cont print_bg1 ldx #!BG2_TILE_BUF+2 ; for 2nd loop phx ldx #!BG1_TILE_BUF ; for 1st loop da whoop phx bra print_bg_cont print_bg_cont sta !print_temp lda !print_y and #$00ff asl asl asl asl asl clc adc !print_temp asl ; double the offset for WRAM addressing tay ; zonday plx phy ; offset from tilemap start stx !print_temp clc adc !print_temp ; we need to transfer to WRAM and from there to VRAM via DMA during VBLANK ; because VRAM can only be accessed during VBLANK and forced blanking. sta $2181 sep #$20 : .as lda #$7f ;we really only need bit 0. full bank given for clarity sta $2183 print_loop ldx !print_src lda !print_bank pha plb phx ; source addr print_loop_inner lda !0,x asl sta @$2180 lda @print_pal asl asl adc #$00 ora #$20 sta @$2180 lda @print_done inc sta @print_done inx lda !0,x beq print_loop2 inx lda !0,x beq print_loop2 lda @print_count_tmp dec dec sta @print_count_tmp beq print_loop2 bmi print_loop2 bra print_loop_inner print_loop2 lda @print_count dec sta @print_count_tmp lda #$00 pha plb rep #$30 : .al : .xl ply ; source addr iny pla ; offset from tilemap start plx ; other tilemap addr stx !print_temp clc adc !print_temp ; tilemap+offset sta $2181 tyx sep #$20 : .as lda print_bank pha plb print_loop2_inner lda !0,x asl sta @$2180 lda @print_pal asl asl adc #$00 ora #$20 sta @$2180 lda @print_done inc sta @print_done inx lda !0,x beq print_end inx lda !0,x beq print_end lda @print_count_tmp dec dec sta @print_count_tmp beq print_end bmi print_end bra print_loop2_inner print_end lda #$00 pha plb rts loprint: rep #$30 : .xl : .al lda !print_x and #$00ff asl ;double the offset for WRAM addressing clc adc #!BG2_TILE_BUF sta !print_temp lda !print_y and #$00ff asl asl asl asl asl asl ;double the offset for WRAM addressing clc adc !print_temp ; we need to transfer to WRAM and from there to VRAM via DMA during VBLANK ; because VRAM can only be accessed during VBLANK and forced blanking. sta $2181 sep #$20 : .as lda #$7f ;we really only need bit 0. full bank given for clarity sta $2183 ldx !print_src lda !print_bank pha plb loprint_loop_inner lda !0,x beq loprint_end sta @$2180 lda #$00 adc #$00 ora #$20 sta @$2180 inx bra loprint_loop_inner loprint_end lda #$00 pha plb rts