74 lines
2.4 KiB
C
74 lines
2.4 KiB
C
/* sd2snes - SD card based universal cartridge for the SNES
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Copyright (C) 2009-2010 Maximilian Rehkopf <otakon@gmx.net>
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AVR firmware portion
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Inspired by and based on code from sd2iec, written by Ingo Korb et al.
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See sdcard.c|h, config.h.
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FAT file system access based on code by ChaN, Jim Brain, Ingo Korb,
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see ff.c|h.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; version 2 of the License only.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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fpga.h: FPGA (re)configuration
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*/
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#ifndef FPGA_H
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#define FPGA_H
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#include <arm/NXP/LPC17xx/LPC17xx.h>
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#include "bits.h"
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void fpga_set_prog_b(uint8_t val);
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void fpga_set_cclk(uint8_t val);
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int fpga_get_initb(void);
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void fpga_init(void);
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void fpga_postinit(void);
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void fpga_pgm(uint8_t* filename);
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void fpga_rompgm(void);
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void set_mcu_ovr(uint8_t val);
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uint8_t SPI_OFFLOAD;
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#define CCLKREG LPC_GPIO0
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#define PROGBREG LPC_GPIO1
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#define INITBREG LPC_GPIO2
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#define DINREG LPC_GPIO2
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#define DONEREG LPC_GPIO0
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#define CCLKBIT (11)
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#define PROGBBIT (15)
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#define INITBBIT (9)
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#define DINBIT (8)
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#define DONEBIT (22)
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#define FPGA_TEST_TOKEN (0xa5)
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// some macros for bulk transfers (faster)
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#define FPGA_SEND_BYTE_SERIAL(data) do {SET_FPGA_DIN(data>>7); CCLK();\
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SET_FPGA_DIN(data>>6); CCLK(); SET_FPGA_DIN(data>>5); CCLK();\
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SET_FPGA_DIN(data>>4); CCLK(); SET_FPGA_DIN(data>>3); CCLK();\
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SET_FPGA_DIN(data>>2); CCLK(); SET_FPGA_DIN(data>>1); CCLK();\
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SET_FPGA_DIN(data); CCLK();} while (0)
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#define SET_CCLK() do {BITBAND(LPC_GPIO0->FIOSET, 11) = 1;} while (0)
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#define CLR_CCLK() do {BITBAND(LPC_GPIO0->FIOCLR, 11) = 1;} while (0)
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#define CCLK() do {SET_CCLK(); CLR_CCLK();} while (0)
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#define SET_MCU_OVR() do {BITBAND(LPC_GPIO2->FIOSET, 8) = 1;} while (0)
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#define CLR_MCU_OVR() do {BITBAND(LPC_GPIO2->FIOCLR, 8) = 1;} while (0)
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#define SET_FPGA_DIN(data) do {LPC_GPIO2->FIOPIN1 = data;} while (0)
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#endif
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