111 lines
5.0 KiB
Verilog
111 lines
5.0 KiB
Verilog
`timescale 1 ns / 1 ns
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//////////////////////////////////////////////////////////////////////////////////
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// Company: Rehkopf
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// Engineer: Rehkopf
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//
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// Create Date: 01:13:46 05/09/2009
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// Design Name:
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// Module Name: address
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// Project Name:
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// Target Devices:
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// Tool versions:
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// Description: Address logic w/ SaveRAM masking
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//
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// Dependencies:
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//
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// Revision:
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// Additional Comments:
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//
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//////////////////////////////////////////////////////////////////////////////////
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module address(
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input CLK,
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input [2:0] MAPPER, // MCU detected mapper
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input [23:0] SNES_ADDR, // requested address from SNES
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input SNES_CS, // "CART" pin from SNES (active low)
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output [22:0] ROM_ADDR, // Address to request from SRAM0
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output ROM_SEL, // enable SRAM0 (active low)
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input MCU_OVR, // enable MCU master mode (active low)
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input MODE, // MCU(1) or SNES(0) ("bus phase")
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output IS_SAVERAM, // address/CS mapped as SRAM?
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output IS_ROM, // address mapped as ROM?
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input [23:0] MCU_ADDR, // allow address to be set externally
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input ADDR_WRITE,
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output ROM_ADDR0,
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input [23:0] SAVERAM_MASK,
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input [23:0] ROM_MASK,
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input use_msu,
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output msu_enable
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);
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wire [1:0] SRAM_BANK;
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wire [23:0] SRAM_ADDR_FULL;
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/* currently supported mappers:
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Index Mapper
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000 HiROM
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001 LoROM
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010 ExHiROM (48-64Mbit)
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110 brainfuck interleaved 96MBit Star Ocean =)
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111 menu (ROM in upper SRAM)
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*/
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/* HiROM: SRAM @ Bank 0x30-0x3f, 0xb0-0xbf
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Offset 6000-7fff */
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assign IS_ROM = ( (MAPPER == 3'b000) ? ((!SNES_ADDR[22] & SNES_ADDR[15])
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|(SNES_ADDR[22]))
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: (MAPPER == 3'b001) ? ((!SNES_ADDR[22] & SNES_ADDR[15])
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|(SNES_ADDR[22]))
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: (MAPPER == 3'b010) ? ((!SNES_ADDR[22] & SNES_ADDR[15])
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|(SNES_ADDR[22]))
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: (MAPPER == 3'b110) ? ((!SNES_ADDR[22] & SNES_ADDR[15])
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|(SNES_ADDR[22]))
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: (MAPPER == 3'b111) ? ((!SNES_ADDR[22] & SNES_ADDR[15])
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|(SNES_ADDR[22]))
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: 1'b0);
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assign IS_SAVERAM = ((MAPPER == 3'b000 || MAPPER == 3'b010 || MAPPER == 3'b110 || MAPPER == 3'b111) ? (!SNES_ADDR[22]
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& SNES_ADDR[21:20]
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& &SNES_ADDR[14:13]
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& !SNES_ADDR[15]
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& SNES_CS
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)
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/* LoROM: SRAM @ Bank 0x70-0x7d, 0xf0-0xfd
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Offset 0000-7fff TODO: 0000-ffff for
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small ROMs */
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:(MAPPER == 3'b001) ? (&SNES_ADDR[22:20]
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& (SNES_ADDR[19:16] < 4'b1110)
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& !SNES_ADDR[15]
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& !SNES_CS)
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: 1'b0);
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assign SRAM_ADDR_FULL = (MODE) ? MCU_ADDR
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: ((MAPPER == 3'b000) ?
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(IS_SAVERAM ? 24'hE00000 + ((SNES_ADDR[14:0] - 15'h6000) & SAVERAM_MASK)
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: ({1'b0, SNES_ADDR[22:0]} & ROM_MASK))
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:(MAPPER == 3'b001) ?
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(IS_SAVERAM ? 24'hE00000 + (SNES_ADDR[14:0] & SAVERAM_MASK)
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: ({2'b00, SNES_ADDR[22:16], SNES_ADDR[14:0]} & ROM_MASK))
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:(MAPPER == 3'b010) ?
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(IS_SAVERAM ? 24'hE00000 + ((SNES_ADDR[14:0] - 15'h6000) & SAVERAM_MASK)
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: ({1'b0, !SNES_ADDR[23], SNES_ADDR[21:0]} & ROM_MASK))
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:(MAPPER == 3'b110) ?
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(IS_SAVERAM ? 24'hE00000 + ((SNES_ADDR[14:0] - 15'h6000) & SAVERAM_MASK)
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: (SNES_ADDR[15] ? ({1'b0, SNES_ADDR[23:16], SNES_ADDR[14:0]})
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: ({2'b10, SNES_ADDR[23], SNES_ADDR[21:16], SNES_ADDR[14:0]})))
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:(MAPPER == 3'b111) ?
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(IS_SAVERAM ? 24'hFF0000 + ((SNES_ADDR[14:0] - 15'h6000) & SAVERAM_MASK)
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: (({1'b0, SNES_ADDR[22:0]} & ROM_MASK) + 24'hE00000))
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: 24'b0);
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assign ROM_ADDR = SRAM_ADDR_FULL[23:1];
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assign ROM_SEL = 1'b0; // (MODE) ? CS_ARRAY[SRAM_BANK] : IS_SAVERAM ? 4'b1000 : CS_ARRAY[SRAM_BANK];
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assign ROM_ADDR0 = SRAM_ADDR_FULL[0];
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//488888
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assign msu_enable = (!SNES_ADDR[22] && ((SNES_ADDR[15:0] & 16'hfff8) == 16'h2000));
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endmodule
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