100 lines
2.6 KiB
C
100 lines
2.6 KiB
C
/* sd2snes - SD card based universal cartridge for the SNES
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Copyright (C) 2009-2010 Maximilian Rehkopf <otakon@gmx.net>
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AVR firmware portion
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Inspired by and based on code from sd2iec, written by Ingo Korb et al.
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See sdcard.c|h, config.h.
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FAT file system access based on code by ChaN, Jim Brain, Ingo Korb,
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see ff.c|h.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; version 2 of the License only.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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fpga_spi.h: functions for SPI ctrl, SRAM interfacing and feature configuration
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*/
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/*
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SPI commands
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cmd param function
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=============================================
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00 bb[hh[ll]] set address to 0xbb0000, 0xbbhh00, or 0xbbhhll
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10 bbhhll set SNES input address mask to 0xbbhhll
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20 bbhhll set SRAM address mask to 0xbbhhll
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3m - set mapper to m
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0=HiROM, 1=LoROM, 2=ExHiROM, 7=Menu
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80 - read with increment
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81 - read w/o increment
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90 {xx}* write xx with increment
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91 {xx}* write xx w/o increment
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F0 - receive test token (to see if FPGA is alive)
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*/
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#include <arm/NXP/LPC17xx/LPC17xx.h>
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#include "bits.h"
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#include "fpga.h"
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#include "config.h"
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#include "uart.h"
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#include "spi.h"
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#include "fpga_spi.h"
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#include "timer.h"
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void fpga_spi_init(void) {
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spi_init(SPI_SPEED_FPGA_FAST);
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}
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void set_mcu_addr(uint32_t address) {
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FPGA_SELECT();
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FPGA_TX_BYTE(0x00);
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FPGA_TX_BYTE((address>>16)&0xff);
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FPGA_TX_BYTE((address>>8)&0xff);
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FPGA_TX_BYTE((address)&0xff);
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FPGA_DESELECT();
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}
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void set_saveram_mask(uint32_t mask) {
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FPGA_SELECT();
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FPGA_TX_BYTE(0x20);
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FPGA_TX_BYTE((mask>>16)&0xff);
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FPGA_TX_BYTE((mask>>8)&0xff);
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FPGA_TX_BYTE((mask)&0xff);
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FPGA_DESELECT();
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}
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void set_rom_mask(uint32_t mask) {
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FPGA_SELECT();
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FPGA_TX_BYTE(0x10);
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FPGA_TX_BYTE((mask>>16)&0xff);
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FPGA_TX_BYTE((mask>>8)&0xff);
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FPGA_TX_BYTE((mask)&0xff);
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FPGA_DESELECT();
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}
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void set_mapper(uint8_t val) {
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FPGA_SELECT();
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FPGA_TX_BYTE(0x30 | (val & 0x0f));
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FPGA_DESELECT();
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}
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uint8_t fpga_test() {
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FPGA_SELECT();
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FPGA_TX_BYTE(0xF0); /* TEST */
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FPGA_TX_BYTE(0x00); /* dummy */
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uint8_t result = FPGA_RX_BYTE();
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FPGA_DESELECT();
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return result;
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}
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