minor improvement in layout
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@ -50,8 +50,8 @@ The most straightforward layout is shown in figure 2.
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|///////////////////////////////|
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0 \-> |-------------------------------|
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.Df
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Figure 2. Memory layout showing typical register
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positions during execution of an EM program.
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Figure 2. Memory layout showing typical register
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positions during execution of an EM program.
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.De
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.N 1
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The base registers for the various memory pieces can be stored
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@ -140,11 +140,11 @@ lower physical address than the second element.
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Type A Type B
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.Df
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Figure 3. Two possible memory implementations.
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Numbers within the boxes are EM addresses.
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The other numbers are physical addresses.
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Figure 3. Two possible memory implementations.
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Numbers within the boxes are EM addresses.
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The other numbers are physical addresses.
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.De
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.A 0 0
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.A 1 0
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So, we have two different EM memory implementations:
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.IS
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.PS - 4
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