*** empty log message ***
This commit is contained in:
keie
5
mach/i86/as/READ_ME
Normal file
5
mach/i86/as/READ_ME
Normal file
@@ -0,0 +1,5 @@
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The mach?.c files in this directory were made for an earlier version of
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the universal assembler and are too dependent on its innards.
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I have no idea in what way they should be changed.
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Duk Bekema
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10
mach/i86/as/mach0.c
Normal file
10
mach/i86/as/mach0.c
Normal file
@@ -0,0 +1,10 @@
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#define DUK
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#define RCSID0 "$Header$"
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/*
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* INTEL 8086 options
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*/
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#define THREE_PASS /* branch and offset optimization */
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#define LISTING /* enable listing facilities */
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#define RELOCATION
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#define NOLD
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37
mach/i86/as/mach1.c
Normal file
37
mach/i86/as/mach1.c
Normal file
@@ -0,0 +1,37 @@
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#define RCSID1 "$Header$"
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/*
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* INTEL 8086 C declarations
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*/
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#define low6(z) (z & 077)
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#define fit6(z) (low6(z) == z)
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extern int mrg_1,mrg_2;
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extern expr_t exp_1,exp_2;
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#ifndef ASLD
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extern int rel_1, rel_2;
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#endif
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#ifndef extern
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extern char sr_m[8];
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#else
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char sr_m[8] = {
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-1, -1, -1, 7, -1, 6, 4, 5
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};
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#endif
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#ifndef extern
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extern char dr_m[8][8];
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#else
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char dr_m[8][8] = {
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, 0, 1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, 2, 3,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1
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};
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#endif
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28
mach/i86/as/mach2.c
Normal file
28
mach/i86/as/mach2.c
Normal file
@@ -0,0 +1,28 @@
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#define RCSID2 "$Header$"
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/*
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* INTEL 8086 tokens
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*/
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%token <y_word> R16
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%token <y_word> R8
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%token <y_word> RSEG
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%token <y_word> PREFIX
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%token <y_word> NOOP_1
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%token <y_word> NOOP_2
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%token <y_word> JOP
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%token <y_word> PUSHOP
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%token <y_word> IOOP
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%token <y_word> ADDOP
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%token <y_word> ROLOP
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%token <y_word> INCOP
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%token <y_word> NOTOP
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%token <y_word> CALLOP
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%token <y_word> CALFOP
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%token <y_word> LEAOP
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%token <y_word> ESC
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%token <y_word> INT
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%token <y_word> RET
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%token <y_word> XCHG
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%token <y_word> TEST
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%token <y_word> MOV
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176
mach/i86/as/mach3.c
Normal file
176
mach/i86/as/mach3.c
Normal file
@@ -0,0 +1,176 @@
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#define RCSID3 "$Header$"
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/*
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* INTEL 8086 keywords
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*/
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0, R16, 0, "ax",
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0, R16, 1, "cx",
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0, R16, 2, "dx",
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0, R16, 3, "bx",
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0, R16, 4, "sp",
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0, R16, 5, "bp",
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0, R16, 6, "si",
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0, R16, 7, "di",
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0, R8, 0, "al",
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0, R8, 1, "cl",
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0, R8, 2, "dl",
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0, R8, 3, "bl",
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0, R8, 4, "ah",
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0, R8, 5, "ch",
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0, R8, 6, "dh",
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0, R8, 7, "bh",
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0, RSEG, 0, "es",
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0, RSEG, 1, "cs",
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0, RSEG, 2, "ss",
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0, RSEG, 3, "ds",
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0, PREFIX, 046, "eseg",
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0, PREFIX, 056, "cseg",
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0, PREFIX, 066, "sseg",
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0, PREFIX, 076, "dseg",
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0, PREFIX, 0360, "lock",
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0, PREFIX, 0362, "rep",
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0, PREFIX, 0362, "repne",
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0, PREFIX, 0362, "repnz",
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0, PREFIX, 0363, "repe",
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0, PREFIX, 0363, "repz",
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0, NOOP_1, 047, "daa",
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0, NOOP_1, 057, "das",
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0, NOOP_1, 067, "aaa",
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0, NOOP_1, 077, "aas",
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0, NOOP_1, 0220, "nop",
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0, NOOP_1, 0230, "cbw",
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0, NOOP_1, 0231, "cwd",
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0, NOOP_1, 0233, "wait",
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0, NOOP_1, 0234, "pushf",
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0, NOOP_1, 0235, "popf",
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0, NOOP_1, 0236, "sahf",
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0, NOOP_1, 0237, "lahf",
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0, NOOP_1, 0244, "movsb",
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0, NOOP_1, 0245, "movs",
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0, NOOP_1, 0246, "cmpsb",
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0, NOOP_1, 0247, "cmps",
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0, NOOP_1, 0252, "stosb",
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0, NOOP_1, 0253, "stos",
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0, NOOP_1, 0254, "lodsb",
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0, NOOP_1, 0255, "lods",
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0, NOOP_1, 0256, "scasb",
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0, NOOP_1, 0257, "scas",
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0, NOOP_1, 0316, "into",
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0, NOOP_1, 0317, "iret",
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0, NOOP_1, 0327, "xlat",
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0, NOOP_1, 0364, "hlt",
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0, NOOP_1, 0365, "cmc",
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0, NOOP_1, 0370, "clc",
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0, NOOP_1, 0371, "stc",
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0, NOOP_1, 0372, "cli",
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0, NOOP_1, 0373, "sti",
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0, NOOP_1, 0374, "cld",
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0, NOOP_1, 0375, "std",
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0, NOOP_2, 0324+012<<8, "aam",
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0, NOOP_2, 0325+012<<8, "aad",
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0, JOP, 0340, "loopne",
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0, JOP, 0340, "loopnz",
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0, JOP, 0341, "loope",
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0, JOP, 0341, "loopz",
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0, JOP, 0342, "loop",
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0, JOP, 0343, "jcxz",
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0, JOP, 0160, "jo",
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0, JOP, 0161, "jno",
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0, JOP, 0162, "jb",
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0, JOP, 0162, "jnae",
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0, JOP, 0163, "jae",
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0, JOP, 0163, "jnb",
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0, JOP, 0164, "je",
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0, JOP, 0164, "jz",
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0, JOP, 0165, "jne",
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0, JOP, 0165, "jnz",
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0, JOP, 0166, "jbe",
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0, JOP, 0166, "jna",
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0, JOP, 0167, "ja",
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0, JOP, 0167, "jnbe",
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0, JOP, 0170, "js",
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0, JOP, 0171, "jns",
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0, JOP, 0172, "jp",
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0, JOP, 0172, "jpe",
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0, JOP, 0173, "jnp",
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0, JOP, 0173, "jpo",
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0, JOP, 0174, "jl",
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0, JOP, 0174, "jnge",
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0, JOP, 0175, "jge",
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0, JOP, 0175, "jnl",
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0, JOP, 0176, "jle",
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0, JOP, 0176, "jng",
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0, JOP, 0177, "jg",
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0, JOP, 0177, "jnle",
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0, PUSHOP, 0, "push",
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0, PUSHOP, 1, "pop",
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0, IOOP, 0344, "inb",
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0, IOOP, 0345, "in",
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0, IOOP, 0346, "outb",
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0, IOOP, 0347, "out",
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0, ADDOP, 000, "addb",
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0, ADDOP, 001, "add",
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0, ADDOP, 010, "orb",
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0, ADDOP, 011, "or",
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0, ADDOP, 020, "adcb",
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0, ADDOP, 021, "adc",
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0, ADDOP, 030, "sbbb",
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0, ADDOP, 031, "sbb",
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0, ADDOP, 040, "andb",
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0, ADDOP, 041, "and",
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0, ADDOP, 050, "subb",
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0, ADDOP, 051, "sub",
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0, ADDOP, 060, "xorb",
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0, ADDOP, 061, "xor",
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0, ADDOP, 070, "cmpb",
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0, ADDOP, 071, "cmp",
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0, ROLOP, 000, "rolb",
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0, ROLOP, 001, "rol",
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0, ROLOP, 010, "rorb",
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0, ROLOP, 011, "ror",
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0, ROLOP, 020, "rclb",
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0, ROLOP, 021, "rcl",
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0, ROLOP, 030, "rcrb",
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0, ROLOP, 031, "rcr",
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0, ROLOP, 040, "salb",
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0, ROLOP, 040, "shlb",
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0, ROLOP, 041, "sal",
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0, ROLOP, 041, "shl",
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0, ROLOP, 050, "shrb",
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0, ROLOP, 051, "shr",
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0, ROLOP, 070, "sarb",
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0, ROLOP, 071, "sar",
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0, INCOP, 000, "incb",
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0, INCOP, 001, "inc",
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0, INCOP, 010, "decb",
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0, INCOP, 011, "dec",
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0, NOTOP, 020, "notb",
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0, NOTOP, 021, "not",
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0, NOTOP, 030, "negb",
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0, NOTOP, 031, "neg",
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0, NOTOP, 040, "mulb",
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0, NOTOP, 041, "mul",
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0, NOTOP, 050, "imulb",
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0, NOTOP, 051, "imul",
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0, NOTOP, 060, "divb",
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0, NOTOP, 061, "div",
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0, NOTOP, 070, "idivb",
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0, NOTOP, 071, "idiv",
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0, CALLOP, 020+(0350<<8), "call",
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||||
0, CALLOP, 040+(0351<<8), "jmp",
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0, CALFOP, 030+(0232<<8), "callf",
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0, CALFOP, 050+(0352<<8), "jmpf",
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||||
0, LEAOP, 0215, "lea",
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||||
0, LEAOP, 0304, "les",
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||||
0, LEAOP, 0305, "lds",
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||||
0, ESC, 0, "esc",
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||||
0, INT, 0, "int",
|
||||
0, RET, 0303, "ret",
|
||||
0, RET, 0313, "retf",
|
||||
0, XCHG, 0, "xchgb",
|
||||
0, XCHG, 1, "xchg",
|
||||
0, TEST, 0, "testb",
|
||||
0, TEST, 1, "test",
|
||||
0, MOV, 0, "movb",
|
||||
0, MOV, 1, "mov",
|
||||
132
mach/i86/as/mach4.c
Normal file
132
mach/i86/as/mach4.c
Normal file
@@ -0,0 +1,132 @@
|
||||
#define RCSID4 "$Header$"
|
||||
|
||||
/*
|
||||
* (c) copyright 1983 by the Vrije Universiteit, Amsterdam, The Netherlands.
|
||||
*
|
||||
* This product is part of the Amsterdam Compiler Kit.
|
||||
*
|
||||
* Permission to use, sell, duplicate or disclose this software must be
|
||||
* obtained in writing. Requests for such permissions may be sent to
|
||||
*
|
||||
* Dr. Andrew S. Tanenbaum
|
||||
* Wiskundig Seminarium
|
||||
* Vrije Universiteit
|
||||
* Postbox 7161
|
||||
* 1007 MC Amsterdam
|
||||
* The Netherlands
|
||||
*
|
||||
*/
|
||||
|
||||
operation
|
||||
: prefix oper
|
||||
;
|
||||
prefix : /* empty */
|
||||
| prefix PREFIX
|
||||
{ emit1($2);}
|
||||
;
|
||||
oper : NOOP_1
|
||||
{ emit1($1);}
|
||||
| NOOP_2
|
||||
{ emit2($1);}
|
||||
| JOP expr
|
||||
{ branch($1,$2);}
|
||||
| PUSHOP ea_1
|
||||
{ pushop($1);}
|
||||
| IOOP expr
|
||||
{ emit1($1);
|
||||
#ifdef RELOCATION
|
||||
newrelo($2.typ, RELO1);
|
||||
#endif
|
||||
emit1($2.val);
|
||||
}
|
||||
| IOOP R16
|
||||
{ if ($2!=2) serror("register error");
|
||||
emit1($1+010);
|
||||
}
|
||||
| ADDOP ea_ea
|
||||
{ addop($1);}
|
||||
| ROLOP ea_ea
|
||||
{ rolop($1);}
|
||||
| INCOP ea_1
|
||||
{ incop($1);}
|
||||
| NOTOP ea_1
|
||||
{ regsize($1); emit1(0366|($1&1)); ea_1($1&070);}
|
||||
| CALLOP ea_1
|
||||
{ callop($1&0xFFFF);}
|
||||
| CALFOP expr ':' expr
|
||||
{ emit1($1>>8);
|
||||
#ifdef RELOCATION
|
||||
newrelo($4.typ, RELO2);
|
||||
#endif
|
||||
emit2($4.val);
|
||||
#ifdef RELOCATION
|
||||
newrelo($2.typ, RELO2);
|
||||
#endif
|
||||
emit2($2.val);
|
||||
}
|
||||
| CALFOP mem
|
||||
{ emit1(0377); ea_2($1&0xFF);}
|
||||
| LEAOP R16 ',' mem
|
||||
{ emit1($1); ea_2($2<<3);}
|
||||
| ESC absexp ',' mem
|
||||
{ fit(fit6($2));
|
||||
emit1(0330 | $2>>3);
|
||||
ea_2(($2&7)<<3);
|
||||
}
|
||||
| INT absexp
|
||||
{ if ($2==3)
|
||||
emit1(0314);
|
||||
else {
|
||||
emit1(0315); emit1($2);
|
||||
}
|
||||
}
|
||||
| RET
|
||||
{ emit1($1);}
|
||||
| RET expr
|
||||
{ emit1($1-1);
|
||||
#ifdef RELOCATION
|
||||
newrelo($2.typ, RELO2);
|
||||
#endif
|
||||
emit2($2.val);
|
||||
}
|
||||
| XCHG ea_ea
|
||||
{ xchg($1);}
|
||||
| TEST ea_ea
|
||||
{ test($1);}
|
||||
| MOV ea_ea
|
||||
{ mov($1);}
|
||||
mem : '(' expr ')'
|
||||
{ mrg_2 = 6; exp_2 = $2;
|
||||
RELOMOVE(rel_2, relonami);
|
||||
}
|
||||
| bases
|
||||
{ exp_2.val = 0; exp_2.typ = S_ABS; indexed();}
|
||||
| expr bases
|
||||
{ exp_2 = $1; indexed();
|
||||
RELOMOVE(rel_2, relonami);
|
||||
}
|
||||
;
|
||||
bases : '(' R16 ')'
|
||||
{ mrg_2 = sr_m[$2];}
|
||||
| '(' R16 ')' '(' R16 ')'
|
||||
{ mrg_2 = dr_m[$2][$5];}
|
||||
;
|
||||
ea_2 : mem
|
||||
| R8
|
||||
{ mrg_2 = $1 | 0300;}
|
||||
| R16
|
||||
{ mrg_2 = $1 | 0310;}
|
||||
| RSEG
|
||||
{ mrg_2 = $1 | 020;}
|
||||
| expr
|
||||
{ mrg_2 = 040; exp_2 = $1;
|
||||
RELOMOVE(rel_2, relonami);
|
||||
}
|
||||
;
|
||||
ea_1 : ea_2
|
||||
{ mrg_1 = mrg_2; exp_1 = exp_2;
|
||||
RELOMOVE(rel_1, rel_2);
|
||||
}
|
||||
;
|
||||
ea_ea : ea_1 ',' ea_2
|
||||
;
|
||||
266
mach/i86/as/mach5.c
Normal file
266
mach/i86/as/mach5.c
Normal file
@@ -0,0 +1,266 @@
|
||||
#define RCSID5 "$Header$"
|
||||
|
||||
/*
|
||||
* INTEL 8086 special routines
|
||||
*/
|
||||
|
||||
ea_1(param) {
|
||||
|
||||
if ((mrg_1 & 070) || (param & ~070))
|
||||
serror("bad operand");
|
||||
emit1(mrg_1 | param);
|
||||
switch(mrg_1 >> 6) {
|
||||
case 0:
|
||||
if (mrg_1 == 6) {
|
||||
#ifdef RELOCATION
|
||||
RELOMOVE(relonami, rel_1);
|
||||
newrelo(exp_1.typ, RELO2);
|
||||
#endif
|
||||
emit2(exp_1.val);
|
||||
}
|
||||
break;
|
||||
case 1:
|
||||
#ifdef RELOCATION
|
||||
RELOMOVE(relonami, rel_1);
|
||||
newrelo(exp_1.typ, RELO1);
|
||||
#endif
|
||||
emit1(exp_1.val);
|
||||
break;
|
||||
case 2:
|
||||
#ifdef RELOCATION
|
||||
RELOMOVE(relonami, rel_1);
|
||||
newrelo(exp_1.typ, RELO2);
|
||||
#endif
|
||||
emit2(exp_1.val);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
ea_2(param) {
|
||||
|
||||
mrg_1 = mrg_2;
|
||||
exp_1 = exp_2;
|
||||
RELOMOVE(rel_1, rel_2);
|
||||
ea_1(param);
|
||||
}
|
||||
|
||||
reverse() {
|
||||
register m, r; expr_t e;
|
||||
|
||||
m = mrg_1; mrg_1 = mrg_2; mrg_2 = m;
|
||||
e = exp_1; exp_1 = exp_2; exp_2 = e;
|
||||
#ifndef ASLD
|
||||
r = rel_1; rel_1 = rel_2; rel_2 = r;
|
||||
#endif
|
||||
}
|
||||
|
||||
badsyntax() {
|
||||
|
||||
serror("bad operands");
|
||||
}
|
||||
|
||||
regsize(sz) register sz; {
|
||||
register bit;
|
||||
|
||||
sz <<= 3;
|
||||
bit = 010;
|
||||
sz &= bit;
|
||||
if ((mrg_1 >= 0300 && (mrg_1 & bit) != sz) ||
|
||||
(mrg_2 >= 0300 && (mrg_2 & bit) != sz))
|
||||
serror("register error");
|
||||
mrg_1 &= ~bit;
|
||||
mrg_2 &= ~bit;
|
||||
}
|
||||
|
||||
indexed() {
|
||||
|
||||
if (mrg_2 & ~7)
|
||||
serror("register error");
|
||||
if (exp_2.typ != S_ABS || fitb(exp_2.val) == 0)
|
||||
mrg_2 |= 0200;
|
||||
else if (exp_2.val != 0 || mrg_2 == 6)
|
||||
mrg_2 |= 0100;
|
||||
}
|
||||
|
||||
branch(opc,exp) register opc; expr_t exp; {
|
||||
register sm,dist;
|
||||
int saving;
|
||||
|
||||
dist = exp.val - (DOTVAL + 2);
|
||||
if (pass == PASS_2 && dist > 0 && !(exp.typ & S_DOT))
|
||||
dist -= DOTGAIN;
|
||||
sm = fitb(dist);
|
||||
if ((exp.typ & ~S_DOT) != DOTTYP)
|
||||
sm = 0;
|
||||
if ((opc & 0370) == 0340) {
|
||||
fit(sm);
|
||||
sm = 1;
|
||||
} else {
|
||||
saving = opc == 0353 ? 1 : 3;
|
||||
if ((sm = small(sm,saving)) == 0) {
|
||||
if (opc != 0353) {
|
||||
emit1(opc^1);
|
||||
emit1(3);
|
||||
dist -= 2;
|
||||
}
|
||||
opc = 0351;
|
||||
dist--;
|
||||
}
|
||||
}
|
||||
emit1(opc);
|
||||
if (sm == 0) {
|
||||
#ifdef RELOCATION
|
||||
newrelo(exp.typ, RELPC | RELO2);
|
||||
#endif
|
||||
emit2(dist);
|
||||
} else
|
||||
emit1(dist);
|
||||
}
|
||||
|
||||
pushop(opc) register opc; {
|
||||
|
||||
regsize(1);
|
||||
if (mrg_1 & 020) {
|
||||
if ( (mrg_1&3) == 1 && opc==1 ) badsyntax() ;
|
||||
emit1(6 | opc | (mrg_1&3)<<3);
|
||||
} else if (mrg_1 >= 0300) {
|
||||
emit1(0120 | opc<<3 | (mrg_1&7));
|
||||
} else if (opc == 0) {
|
||||
emit1(0377); ea_1(6<<3);
|
||||
} else {
|
||||
emit1(0217); ea_1(0<<3);
|
||||
}
|
||||
}
|
||||
|
||||
addop(opc) register opc; {
|
||||
|
||||
regsize(opc);
|
||||
if (mrg_2 >= 0300) {
|
||||
emit1(opc); ea_1((mrg_2&7)<<3);
|
||||
} else if ((mrg_2 & 040) && mrg_1 == 0300) {
|
||||
emit1(opc | 4); emitx((opc&1)+1,exp_2.val);
|
||||
} else if (mrg_2 & 040) {
|
||||
if ((opc&1) == 0) {
|
||||
emit1(0200);
|
||||
} else if (exp_2.typ != S_ABS || fitb(exp_2.val) == 0 ||
|
||||
opc==011 || opc==041 || opc==061 ) {
|
||||
emit1(0201);
|
||||
} else {
|
||||
emit1(0203); opc &= ~1;
|
||||
}
|
||||
ea_1(opc & 070); emitx((opc&1)+1,exp_2.val);
|
||||
} else if (mrg_1 >= 0300) {
|
||||
emit1(opc | 2); ea_2((mrg_1&7)<<3);
|
||||
} else
|
||||
badsyntax();
|
||||
}
|
||||
|
||||
rolop(opc) register opc; {
|
||||
register cmrg;
|
||||
|
||||
cmrg = mrg_2;
|
||||
mrg_2 = mrg_1;
|
||||
regsize(opc);
|
||||
if (cmrg == 0301) {
|
||||
emit1(0322 | (opc&1)); ea_1(opc&070);
|
||||
} else if ((cmrg & 040) && exp_2.val == 1) {
|
||||
emit1(0320 | (opc&1)); ea_1(opc&070);
|
||||
} else
|
||||
badsyntax();
|
||||
}
|
||||
|
||||
incop(opc) register opc; {
|
||||
|
||||
regsize(opc);
|
||||
if ((opc&1) && mrg_1>=0300) {
|
||||
emit1(0100 | (opc&010) | (mrg_1&7));
|
||||
} else {
|
||||
emit1(0376 | (opc&1));
|
||||
ea_1(opc & 010);
|
||||
}
|
||||
}
|
||||
|
||||
callop(opc) register opc; {
|
||||
|
||||
regsize(1);
|
||||
if (mrg_1 & 040) {
|
||||
if (opc == (040+(0351<<8))) {
|
||||
branch(0353,exp_1);
|
||||
} else {
|
||||
exp_1.val -= (DOTVAL+3);
|
||||
emit1(opc>>8);
|
||||
#ifdef RELOCATION
|
||||
RELOMOVE(relonami, rel_1);
|
||||
newrelo(exp_1.typ, RELPC | RELO2);
|
||||
#endif
|
||||
emit2(exp_1.val);
|
||||
}
|
||||
} else {
|
||||
emit1(0377); ea_1(opc&070);
|
||||
}
|
||||
}
|
||||
|
||||
xchg(opc) register opc; {
|
||||
|
||||
regsize(opc);
|
||||
if (mrg_2 == 0300 || mrg_1 < 0300)
|
||||
reverse();
|
||||
if (opc == 1 && mrg_1 == 0300 && mrg_2 >= 0300) {
|
||||
emit1(0220 | (mrg_2&7));
|
||||
} else if (mrg_1 >= 0300) {
|
||||
emit1(0206 | opc); ea_2((mrg_1&7)<<3);
|
||||
} else
|
||||
badsyntax();
|
||||
}
|
||||
|
||||
test(opc) register opc; {
|
||||
|
||||
regsize(opc);
|
||||
if ((mrg_1 & 040) || mrg_2 >= 0300)
|
||||
reverse();
|
||||
if ((mrg_2 & 040) && mrg_1 == 0300) {
|
||||
emit1(0250 | opc); emitx((opc&1)+1,exp_2.val);
|
||||
} else if (mrg_2 & 040) {
|
||||
emit1(0366 | opc); ea_1(0<<3); emitx((opc&1)+1,exp_2.val);
|
||||
} else if (mrg_1 >= 0300) {
|
||||
emit1(0204 | opc); ea_2((mrg_1&7)<<3);
|
||||
} else
|
||||
badsyntax();
|
||||
}
|
||||
|
||||
mov(opc) register opc; {
|
||||
|
||||
regsize(opc);
|
||||
if (mrg_1 & 020) {
|
||||
emit1(0216); ea_2((mrg_1&3)<<3);
|
||||
} else if (mrg_2 & 020) {
|
||||
emit1(0214); ea_1((mrg_2&3)<<3);
|
||||
} else if (mrg_2 & 040) {
|
||||
if (mrg_1 >= 0300) {
|
||||
emit1(0260 | opc<<3 | (mrg_1&7));
|
||||
emitx((opc&1)+1,exp_2.val);
|
||||
} else {
|
||||
emit1(0306 | opc); ea_1(0<<3);
|
||||
emitx((opc&1)+1,exp_2.val);
|
||||
}
|
||||
} else if (mrg_2 == 0300 && mrg_1 == 6) {
|
||||
emit1(0242 | opc);
|
||||
#ifdef RELOCATION
|
||||
RELOMOVE(relonami, rel_1);
|
||||
newrelo(exp_1.typ, RELO2);
|
||||
#endif
|
||||
emit2(exp_1.val);
|
||||
} else if (mrg_1 == 0300 && mrg_2 == 6) {
|
||||
emit1(0240 | opc);
|
||||
#ifdef RELOCATION
|
||||
RELOMOVE(relonami, rel_1);
|
||||
newrelo(exp_1.typ, RELO2);
|
||||
#endif
|
||||
emit2(exp_2.val);
|
||||
} else if (mrg_2 >= 0300) {
|
||||
emit1(0210 | opc); ea_1((mrg_2&7)<<3);
|
||||
} else if (mrg_1 >= 0300) {
|
||||
emit1(0212 | opc); ea_2((mrg_1&7)<<3);
|
||||
} else
|
||||
badsyntax();
|
||||
}
|
||||
Reference in New Issue
Block a user