mirror of
https://github.com/thead-yocto-mirror/meta-openembedded
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133 lines
3.8 KiB
Diff
133 lines
3.8 KiB
Diff
Backport from FSF mainline:
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gcc/
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* config/arm/thumb2.md (*thumb2_addsi3_compare0): New.
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(*thumb2_addsi3_compare0_scratch): New.
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* config/arm/constraints.md (Pv): New.
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* config/arm/arm.md (*addsi3_compare0): Remove FIXME comment. Use
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for ARM mode only.
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(*addsi3_compare0_scratch): Likewise.
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2010-07-26 Julian Brown <julian@codesourcery.com>
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Merge from Sourcery G++ 4.4:
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2010-05-25 Julian Brown <julian@codesourcery.com>
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=== modified file 'gcc/config/arm/arm.md'
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--- old/gcc/config/arm/arm.md 2010-08-12 13:35:39 +0000
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+++ new/gcc/config/arm/arm.md 2010-08-12 16:47:21 +0000
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@@ -701,7 +701,6 @@
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""
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)
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-;; ??? Make Thumb-2 variants which prefer low regs
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(define_insn "*addsi3_compare0"
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[(set (reg:CC_NOOV CC_REGNUM)
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(compare:CC_NOOV
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@@ -710,7 +709,7 @@
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(const_int 0)))
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(set (match_operand:SI 0 "s_register_operand" "=r,r")
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(plus:SI (match_dup 1) (match_dup 2)))]
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- "TARGET_32BIT"
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+ "TARGET_ARM"
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"@
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add%.\\t%0, %1, %2
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sub%.\\t%0, %1, #%n2"
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@@ -723,7 +722,7 @@
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(plus:SI (match_operand:SI 0 "s_register_operand" "r, r")
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(match_operand:SI 1 "arm_add_operand" "rI,L"))
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(const_int 0)))]
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- "TARGET_32BIT"
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+ "TARGET_ARM"
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"@
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cmn%?\\t%0, %1
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cmp%?\\t%0, #%n1"
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=== modified file 'gcc/config/arm/constraints.md'
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--- old/gcc/config/arm/constraints.md 2010-07-29 16:58:56 +0000
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+++ new/gcc/config/arm/constraints.md 2010-08-12 16:47:21 +0000
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@@ -31,7 +31,7 @@
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;; The following multi-letter normal constraints have been used:
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;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv, Dy, Di
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;; in Thumb-1 state: Pa, Pb
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-;; in Thumb-2 state: Ps, Pt
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+;; in Thumb-2 state: Ps, Pt, Pv
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;; The following memory constraints have been used:
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;; in ARM/Thumb-2 state: Q, Ut, Uv, Uy, Un, Um, Us
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@@ -158,6 +158,11 @@
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(and (match_code "const_int")
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(match_test "TARGET_THUMB2 && ival >= -7 && ival <= 7")))
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+(define_constraint "Pv"
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+ "@internal In Thumb-2 state a constant in the range -255 to 0"
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+ (and (match_code "const_int")
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+ (match_test "TARGET_THUMB2 && ival >= -255 && ival <= 0")))
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+
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(define_constraint "G"
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"In ARM/Thumb-2 state a valid FPA immediate constant."
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(and (match_code "const_double")
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=== modified file 'gcc/config/arm/thumb2.md'
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--- old/gcc/config/arm/thumb2.md 2010-08-05 16:34:46 +0000
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+++ new/gcc/config/arm/thumb2.md 2010-08-12 16:47:21 +0000
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@@ -1241,6 +1241,56 @@
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(set_attr "length" "2")]
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)
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+(define_insn "*thumb2_addsi3_compare0"
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+ [(set (reg:CC_NOOV CC_REGNUM)
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+ (compare:CC_NOOV
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+ (plus:SI (match_operand:SI 1 "s_register_operand" "l, 0, r")
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+ (match_operand:SI 2 "arm_add_operand" "lPt,Ps,rIL"))
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+ (const_int 0)))
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+ (set (match_operand:SI 0 "s_register_operand" "=l,l,r")
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+ (plus:SI (match_dup 1) (match_dup 2)))]
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+ "TARGET_THUMB2"
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+ "*
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+ HOST_WIDE_INT val;
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+
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+ if (GET_CODE (operands[2]) == CONST_INT)
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+ val = INTVAL (operands[2]);
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+ else
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+ val = 0;
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+
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+ if (val < 0 && const_ok_for_arm (ARM_SIGN_EXTEND (-val)))
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+ return \"subs\\t%0, %1, #%n2\";
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+ else
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+ return \"adds\\t%0, %1, %2\";
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+ "
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+ [(set_attr "conds" "set")
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+ (set_attr "length" "2,2,4")]
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+)
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+
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+(define_insn "*thumb2_addsi3_compare0_scratch"
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+ [(set (reg:CC_NOOV CC_REGNUM)
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+ (compare:CC_NOOV
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+ (plus:SI (match_operand:SI 0 "s_register_operand" "l, r")
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+ (match_operand:SI 1 "arm_add_operand" "lPv,rIL"))
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+ (const_int 0)))]
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+ "TARGET_THUMB2"
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+ "*
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+ HOST_WIDE_INT val;
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+
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+ if (GET_CODE (operands[1]) == CONST_INT)
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+ val = INTVAL (operands[1]);
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+ else
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+ val = 0;
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+
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+ if (val < 0 && const_ok_for_arm (ARM_SIGN_EXTEND (-val)))
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+ return \"cmp\\t%0, #%n1\";
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+ else
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+ return \"cmn\\t%0, %1\";
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+ "
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+ [(set_attr "conds" "set")
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+ (set_attr "length" "2,4")]
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+)
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+
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;; 16-bit encodings of "muls" and "mul<c>". We only use these when
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;; optimizing for size since "muls" is slow on all known
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;; implementations and since "mul<c>" will be generated by
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