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bf6cd17cef
Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
62 lines
1.7 KiB
Diff
62 lines
1.7 KiB
Diff
2011-03-10 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
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LP:730440
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PR target/47668
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gcc/
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* config/arm/arm.md (arm_movtas_ze): Use 'L' instead of 'c'.
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gcc/testsuite/
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* gcc.target/arm/pr47688.c: New.
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=== modified file 'gcc/config/arm/arm.md'
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--- old/gcc/config/arm/arm.md 2011-03-01 14:32:39 +0000
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+++ new/gcc/config/arm/arm.md 2011-03-11 14:26:34 +0000
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@@ -11133,13 +11133,15 @@
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[(set_attr "conds" "clob")]
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)
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+;; We only care about the lower 16 bits of the constant
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+;; being inserted into the upper 16 bits of the register.
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(define_insn "*arm_movtas_ze"
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[(set (zero_extract:SI (match_operand:SI 0 "s_register_operand" "+r")
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(const_int 16)
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(const_int 16))
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(match_operand:SI 1 "const_int_operand" ""))]
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"arm_arch_thumb2"
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- "movt%?\t%0, %c1"
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+ "movt%?\t%0, %L1"
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[(set_attr "predicable" "yes")
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(set_attr "length" "4")]
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)
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=== added file 'gcc/testsuite/gcc.target/arm/pr47688.c'
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--- old/gcc/testsuite/gcc.target/arm/pr47688.c 1970-01-01 00:00:00 +0000
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+++ new/gcc/testsuite/gcc.target/arm/pr47688.c 2011-03-11 14:26:34 +0000
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@@ -0,0 +1,26 @@
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+/* { dg-options "-mthumb -O2" } */
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+/* { dg-require-effective-target arm_thumb2_ok } */
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+/* { dg-final { scan-assembler-not "-32768" } } */
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+
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+typedef union
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+{
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+ unsigned long int u_32_value;
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+ struct
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+ {
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+ unsigned short int u_16_value_0;
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+ unsigned short int u_16_value_1;
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+ } u_16_values;
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+} my_union;
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+
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+
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+unsigned long int Test(const unsigned short int wXe)
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+{
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+ my_union dwCalcVal;
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+
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+ dwCalcVal.u_16_values.u_16_value_0=wXe;
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+ dwCalcVal.u_16_values.u_16_value_1=0x8000u;
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+
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+ dwCalcVal.u_32_value /=3;
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+
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+ return (dwCalcVal.u_32_value);
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+}
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