Files
meta-qt5/recipes-qt/qt5/qtscript_git.bb
Julien Brianceau \(jbriance\) c16b932be3 qt5: Update LGPL-Exception in LICENSE list
* Since 5.5, Qt modules (except qtimageformats) have moved from "Digia"
  to "The Qt Company" in their LGPL_Exception file
* qtwebkit-examples doesn't include a LGPL Exception file, so remove
  it from LICENSE list

Signed-off-by: Julien Brianceau <jbriance@cisco.com>
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
2015-08-31 20:49:35 +02:00

29 lines
1.7 KiB
BlitzBasic

require qt5.inc
require qt5-git.inc
# There are no LGPLv3-only licensed files in this component.
# Note that some files are LGPL-2.1 only without The-Qt-Company-Qt-LGPL-Exception-1.1.
LICENSE = "GFDL-1.3 & BSD & (LGPL-2.1 & The-Qt-Company-Qt-LGPL-Exception-1.1 | LGPL-3.0)"
LIC_FILES_CHKSUM = " \
file://LICENSE.LGPLv21;md5=58a180e1cf84c756c29f782b3a485c29 \
file://LICENSE.LGPLv3;md5=c4fe8c6de4eef597feec6e90ed62e962 \
file://LGPL_EXCEPTION.txt;md5=9625233da42f9e0ce9d63651a9d97654 \
file://LICENSE.FDL;md5=6d9f2a9af4c8b8c3c769f6cc1b6aaf7e \
"
# qemuarm build fails with:
# /OE/build/oe-core/tmp-glibc/work/armv5te-oe-linux-gnueabi/qtscript/5.4.1+gitAUTOINC+822df36f25-r0/git/src/3rdparty/javascriptcore/JavaScriptCore/assembler/AssemblerBuffer.h: In member function 'void QTJSC::AssemblerBuffer::putInt64Unchecked(int64_t)':
#/OE/build/oe-core/tmp-glibc/work/armv5te-oe-linux-gnueabi/qtscript/5.4.1+gitAUTOINC+822df36f25-r0/git/src/3rdparty/javascriptcore/JavaScriptCore/assembler/AssemblerBuffer.h:106:58: warning: cast from 'char*' to 'int64_t* {aka long long int*}' increases required alignment of target type [-Wcast-align]
# *reinterpret_cast<int64_t*>(&m_buffer[m_size]) = value;
# ^
#{standard input}: Assembler messages:
#{standard input}:22: Error: selected processor does not support Thumb mode `stmdb sp!,{r1-r3}'
#{standard input}:23: Error: selected processor does not support Thumb mode `stmdb sp!,{r4-r8,lr}'
#{standard input}:30: Error: lo register required -- `ldmia sp!,{r4-r8,lr}'
#{standard input}:43: Error: lo register required -- `ldmia sp!,{r4-r8,lr}'
ARM_INSTRUCTION_SET = "arm"
DEPENDS += "qtbase"
SRCREV = "2724355d3a1029168e19162e1d1b10dd3f98dc89"