From 9710130a4e0fa04d5cc8735f93239d634b76f2ab Mon Sep 17 00:00:00 2001 From: Andreas Cord-Landwehr Date: Sat, 7 Jan 2023 10:31:20 +0100 Subject: [PATCH] visionfive2: add initial u-boot support Regarding uEnv, note that this is simply a fork of the version from the Debian based SDK image, only appended by setting the bootargs. --- ...1-riscv-fix-build-with-binutils-2.38.patch | 46 +++++++++++++++++++ .../u-boot-starfive/uEnv-visionfive2.txt | 14 ++++++ .../u-boot/u-boot-starfive_v2021.04.bb | 15 +++++- 3 files changed, 74 insertions(+), 1 deletion(-) create mode 100644 recipes-bsp/u-boot/u-boot-starfive/0001-riscv-fix-build-with-binutils-2.38.patch create mode 100644 recipes-bsp/u-boot/u-boot-starfive/uEnv-visionfive2.txt diff --git a/recipes-bsp/u-boot/u-boot-starfive/0001-riscv-fix-build-with-binutils-2.38.patch b/recipes-bsp/u-boot/u-boot-starfive/0001-riscv-fix-build-with-binutils-2.38.patch new file mode 100644 index 0000000..60211b2 --- /dev/null +++ b/recipes-bsp/u-boot/u-boot-starfive/0001-riscv-fix-build-with-binutils-2.38.patch @@ -0,0 +1,46 @@ +From 796732e49c919d74cab4978e517f02219daba9c4 Mon Sep 17 00:00:00 2001 +From: Andreas Cord-Landwehr +Date: Sat, 7 Jan 2023 10:58:48 +0100 +Subject: [PATCH] riscv: fix build with binutils 2.38 + +Original patch: +https://lore.kernel.org/all/YhCvlHomlT2js3uO@ubuntu01/T/ + +From version 2.38, binutils default to ISA spec version 20191213. This +means that the csr read/write (csrr*/csrw*) instructions and fence.i +instruction has separated from the `I` extension, become two standalone +extensions: Zicsr and Zifencei. + +The fix is to specify those extensions explicitely in -march. However as +older binutils version do not support this, we first need to detect +that. + +Signed-off-by: Andreas Cord-Landwehr +--- + arch/riscv/Makefile | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile +index 0b80eb8d86..cd1bc49e7c 100644 +--- a/arch/riscv/Makefile ++++ b/arch/riscv/Makefile +@@ -26,6 +26,16 @@ endif + + ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) \ + -mcmodel=$(CMODEL) ++RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_C) ++ ++# Newer binutils versions default to ISA spec version 20191213 which moves some ++# instructions from the I extension to the Zicsr and Zifencei extensions. ++toolchain-need-zicsr-zifencei := $(call cc-option-yn, -mabi=$(ABI) -march=$(RISCV_MARCH)_zicsr_zifencei) ++ifeq ($(toolchain-need-zicsr-zifencei),y) ++ RISCV_MARCH := $(RISCV_MARCH)_zicsr_zifencei ++endif ++ ++ARCH_FLAGS = -march=$(RISCV_MARCH) -mabi=$(ABI) -mcmodel=$(CMODEL) + + PLATFORM_CPPFLAGS += $(ARCH_FLAGS) + CFLAGS_EFI += $(ARCH_FLAGS) +-- +2.37.2 + diff --git a/recipes-bsp/u-boot/u-boot-starfive/uEnv-visionfive2.txt b/recipes-bsp/u-boot/u-boot-starfive/uEnv-visionfive2.txt new file mode 100644 index 0000000..42c5b50 --- /dev/null +++ b/recipes-bsp/u-boot/u-boot-starfive/uEnv-visionfive2.txt @@ -0,0 +1,14 @@ +fdt_high=0xffffffffffffffff +initrd_high=0xffffffffffffffff +kernel_addr_r=0x44000000 +kernel_comp_addr_r=0x90000000 +kernel_comp_size=0x10000000 +fdt_addr_r=0x48000000 +ramdisk_addr_r=0x48100000 +# Move distro to first boot to speed up booting +boot_targets=distro mmc0 dhcp +# Fix wrong fdtfile name +fdtfile=starfive/jh7110-visionfive-v2.dtb +# Fix missing bootcmd +bootcmd=run bootcmd_distro +bootargs=root=/dev/mmcblk1p2 rw console=tty0 console=ttyS0,115200 earlycon rootwait stmmaceth=chain_mode:1 selinux=0 diff --git a/recipes-bsp/u-boot/u-boot-starfive_v2021.04.bb b/recipes-bsp/u-boot/u-boot-starfive_v2021.04.bb index 289d297..c0bb7cf 100644 --- a/recipes-bsp/u-boot/u-boot-starfive_v2021.04.bb +++ b/recipes-bsp/u-boot/u-boot-starfive_v2021.04.bb @@ -6,8 +6,10 @@ LIC_FILES_CHKSUM = "file://Licenses/README;md5=5a7450c57ffe5ae63fd732446b988025" FILESEXTRAPATHS:prepend := "${THISDIR}/files:" BRANCH:visionfive = "JH7100_VisionFive_OH_dev" +BRANCH:visionfive2 = "JH7110_VisionFive2_devel" BRANCH:beaglev-starlight-jh7100 = "Fedora_JH7100_2021.04" + SRC_URI = "git://github.com/starfive-tech/u-boot.git;protocol=https;branch=${BRANCH} \ file://tftp-mmc-boot.txt \ " @@ -21,10 +23,17 @@ SRC_URI:append:visionfive = " \ file://fix-riscv-isa.patch \ file://uEnv-visionfive.txt \ " +SRC_URI:append:visionfive2 = " \ + file://0001-riscv-fix-build-with-binutils-2.38.patch \ + file://uEnv-visionfive2.txt \ +" SRCREV = "7b70e1d44ba9702a519ca936cabf19070309123a" SRCREV:visionfive = "ccecef294d355e9d05edf0bb6058002a0fe08908" +# tag VF2_v2.6.0 +SRCREV:visionfive2 = "66a72185a813c36b8975fd7ded9d74d6a5525db7" + DEPENDS:append = " u-boot-tools-native" # Overwrite this for your server @@ -40,7 +49,11 @@ do_deploy:append:visionfive() { install -m 644 ${WORKDIR}/uEnv-visionfive.txt ${DEPLOYDIR}/uEnv.txt } -COMPATIBLE_MACHINE = "(beaglev-starlight-jh7100|visionfive)" +do_deploy:append:visionfive2() { + install -m 644 ${WORKDIR}/uEnv-visionfive2.txt ${DEPLOYDIR}/uEnv.txt +} + +COMPATIBLE_MACHINE = "(beaglev-starlight-jh7100|visionfive|visionfive2)" TOOLCHAIN = "gcc"