mirror of
https://github.com/thead-yocto-mirror/meta-riscv
synced 2026-09-16 12:14:20 +02:00
26 lines
760 B
BlitzBasic
26 lines
760 B
BlitzBasic
SUMMARY = "RISC-V Spike ISA Simulator"
|
|
DESCRIPTION = "RISC-V Spike ISA Simulator"
|
|
LICENSE = "GPLv2+"
|
|
|
|
LIC_FILES_CHKSUM = "file://${COREBASE}/meta/COPYING.GPLv2;md5=751419260aa954499f7abaabaa882bbe"
|
|
|
|
SRCREV = "d48f107dba6a96fb827cb47fdf290261feadeb35"
|
|
SRC_URI = "git://github.com/riscv/riscv-isa-sim.git \
|
|
file://spike-makefile.patch"
|
|
|
|
DEPENDS = "riscv-fesvr dtc-native"
|
|
RDEPENDS_nativesdk-riscv-spike = "nativesdk-riscv-fesvr"
|
|
|
|
inherit autotools cross-canadian
|
|
|
|
S = "${WORKDIR}/git"
|
|
|
|
do_configure_prepend () {
|
|
touch ${S}/softfloat/softfloat.ac
|
|
if [ ! -e ${S}/acinclude.m4 ]; then
|
|
cp ${S}/aclocal.m4 ${S}/acinclude.m4
|
|
fi
|
|
}
|
|
BBCLASSEXTEND = "native nativesdk"
|
|
COMPATIBLE_HOST_class-target = "(riscv64|riscv32).*-linux"
|