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https://github.com/thead-yocto-mirror/meta-riscv
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32 lines
1.5 KiB
BlitzBasic
32 lines
1.5 KiB
BlitzBasic
require recipes-kernel/linux/linux-riscv-common.inc
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LINUX_VERSION ?= "4.19"
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BRANCH = "riscv-linux-4.19"
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SRCREV = "998246b5d00db61bb6449aa81a1df145e5aadf6b"
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SRC_URI = " \
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git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux.git;branch=${BRANCH} \
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file://pci.cfg \
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"
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# qemu uses in-tree defconfig
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# freedom-u540 uses out-of-tree defconfig
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SRC_URI_append_freedom-u540 = " file://defconfig"
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SRC_URI_append_qemuriscv32 = " file://32bit.cfg"
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SRC_URI_append_freedom-u540 = " \
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file://0001-risc-v-Fix-issue-ignoring-CONFIG_CMDLINE_OVERRIDE.patch \
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file://0001-spi-sifive-support-SiFive-SPI-controller-in-Quad-Mod.patch \
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file://0002-spi-nor-add-support-for-is25wp-32-64-128-256.patch \
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file://0003-serial-sifive-initial-driver-from-Paul-Walmsley.patch \
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file://0004-gemgxl-mgmt-implement-clock-switch-for-GEM-tx_clk.patch \
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file://0005-u54-prci-driver-for-core-U54-clocks.patch \
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file://0006-u54-prci-driver-for-core-U54-clocks.patch \
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file://0008-pwm-sifive-add-a-driver-for-SiFive-SoC-PWM.patch \
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file://0007-gpio-sifive-support-GPIO-on-SiFive-SoCs.patch \
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file://0009-RISC-V-Networking-fix-Hack.patch \
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file://0010-pcie-microsemi-added-support-for-the-Vera-board-root.patch \
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"
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