From aca5943dcc8707dddf35d012e066ae4eec1ac518 Mon Sep 17 00:00:00 2001 From: Han Gao Date: Wed, 6 Mar 2024 22:53:16 +0800 Subject: [PATCH] sync: gpu_bxm_4_64-kernel: Linux_SDK_V1.4.2 Signed-off-by: Han Gao --- drivers/gpu/drm/img-rogue/rgxfwutils.c | 2 +- drivers/gpu/drm/img-rogue/rgxinit.c | 23 +++++++++++++++++++ drivers/gpu/drm/img-rogue/rgxpower.c | 2 +- drivers/gpu/drm/img-rogue/sysconfig.c | 31 ++++++++++++++++++++++++++ drivers/gpu/drm/img-rogue/thead_sys.c | 18 +++++++++++++-- 5 files changed, 72 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/img-rogue/rgxfwutils.c b/drivers/gpu/drm/img-rogue/rgxfwutils.c index 2e98cd205..c26bb50fd 100644 --- a/drivers/gpu/drm/img-rogue/rgxfwutils.c +++ b/drivers/gpu/drm/img-rogue/rgxfwutils.c @@ -4937,7 +4937,7 @@ PVRSRV_ERROR RGXPollForGPCommandCompletion(PVRSRV_DEVICE_NODE *psDevNode, if (eError != PVRSRV_OK) { - PVR_DPF((PVR_DBG_ERROR, "%s: Failed! Error(%s) CPU linear address(%p) Expected value(%u)", + PVR_DPF((PVR_DBG_WARNING, "%s: Failed! Error(%s) CPU linear address(%p) Expected value(%u)", __func__, PVRSRVGetErrorString(eError), pui32LinMemAddr, ui32Value)); } diff --git a/drivers/gpu/drm/img-rogue/rgxinit.c b/drivers/gpu/drm/img-rogue/rgxinit.c index dd572a5c6..f01431c2e 100644 --- a/drivers/gpu/drm/img-rogue/rgxinit.c +++ b/drivers/gpu/drm/img-rogue/rgxinit.c @@ -560,8 +560,31 @@ static void RGX_MISRHandler_CheckFWActivePowerState(void *psDevice) PVRSRV_DEVICE_NODE *psDeviceNode = psDevice; PVRSRV_RGXDEV_INFO *psDevInfo = psDeviceNode->pvDevice; const RGXFWIF_SYSDATA *psFwSysData = psDevInfo->psRGXFWIfFwSysData; +#if defined(SUPPORT_LINUX_DVFS) + IMG_DVFS_DEVICE *psDVFSDevice = &psDeviceNode->psDevConfig->sDVFS.sDVFSDevice; + static IMG_BOOL bSuspendDevfreq = IMG_TRUE; +#endif PVRSRV_ERROR eError = PVRSRV_OK; +#if defined(SUPPORT_LINUX_DVFS) + if (psFwSysData->ePowState == RGXFWIF_POW_ON) + { + if (bSuspendDevfreq) + { + devfreq_resume_device(psDVFSDevice->psDevFreq); + bSuspendDevfreq = IMG_FALSE; + } + } + else + { + if (!bSuspendDevfreq) + { + devfreq_suspend_device(psDVFSDevice->psDevFreq); + bSuspendDevfreq = IMG_TRUE; + } + } +#endif + if (psFwSysData->ePowState == RGXFWIF_POW_ON || psFwSysData->ePowState == RGXFWIF_POW_IDLE) { RGX_MISR_ProcessKCCBDeferredList(psDeviceNode); diff --git a/drivers/gpu/drm/img-rogue/rgxpower.c b/drivers/gpu/drm/img-rogue/rgxpower.c index 1a2a09ed4..6cb9ae0ec 100644 --- a/drivers/gpu/drm/img-rogue/rgxpower.c +++ b/drivers/gpu/drm/img-rogue/rgxpower.c @@ -1398,7 +1398,7 @@ _RGXActivePowerRequest_PowerLock_failed: RGXForcedIdleRequest */ -#define RGX_FORCED_IDLE_RETRY_COUNT 10 +#define RGX_FORCED_IDLE_RETRY_COUNT 20 PVRSRV_ERROR RGXForcedIdleRequest(IMG_HANDLE hDevHandle, IMG_BOOL bDeviceOffPermitted) { diff --git a/drivers/gpu/drm/img-rogue/sysconfig.c b/drivers/gpu/drm/img-rogue/sysconfig.c index a3123341d..bd623d5d6 100644 --- a/drivers/gpu/drm/img-rogue/sysconfig.c +++ b/drivers/gpu/drm/img-rogue/sysconfig.c @@ -41,6 +41,7 @@ IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ /**************************************************************************/ +#include #include #include "interrupt_support.h" #include "pvrsrv_device.h" @@ -82,6 +83,25 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define UMA_DEFAULT_HEAP PVRSRV_PHYS_HEAP_GPU_LOCAL +#if defined(SUPPORT_LINUX_DVFS) +static struct clk *thead_gpu_core_clk = NULL; + +static void SetFrequency(IMG_UINT32 ui32Frequency) +{ + if (!thead_gpu_core_clk) + { + PVR_DPF((PVR_DBG_ERROR, "thead_gpu_core_clk is NULL")); + return; + } + clk_set_rate(thead_gpu_core_clk, ui32Frequency); +} + +static void SetVoltage(IMG_UINT32 ui32Voltage) +{ + +} +#endif + /* CPU to Device physical address translation */ @@ -364,6 +384,17 @@ PVRSRV_ERROR SysDevInit(void *pvOSDevice, PVRSRV_DEVICE_CONFIG **ppsDevConfig) psDevConfig->hDevData = psRGXData; psDevConfig->hSysData = mfg; +#if defined(SUPPORT_LINUX_DVFS) + thead_gpu_core_clk = mfg->gpu_cclk; + psDevConfig->sDVFS.sDVFSDeviceCfg.pasOPPTable = NULL; + psDevConfig->sDVFS.sDVFSDeviceCfg.bIdleReq = IMG_TRUE; + psDevConfig->sDVFS.sDVFSDeviceCfg.pfnSetFrequency = SetFrequency; + psDevConfig->sDVFS.sDVFSDeviceCfg.pfnSetVoltage = SetVoltage; + psDevConfig->sDVFS.sDVFSDeviceCfg.ui32PollMs = 50; + psDevConfig->sDVFS.sDVFSGovernorCfg.ui32UpThreshold = 50; + psDevConfig->sDVFS.sDVFSGovernorCfg.ui32DownDifferential = 10; +#endif + /* Setup other system specific stuff */ #if defined(SUPPORT_ION) IonInit(NULL); diff --git a/drivers/gpu/drm/img-rogue/thead_sys.c b/drivers/gpu/drm/img-rogue/thead_sys.c index f8446b845..cd07a93c1 100644 --- a/drivers/gpu/drm/img-rogue/thead_sys.c +++ b/drivers/gpu/drm/img-rogue/thead_sys.c @@ -62,7 +62,8 @@ int thead_mfg_enable(struct gpu_plat_if *mfg) int ret; int val; ret = pm_runtime_get_sync(mfg->dev); - if (ret) + /* don't check ret > 0 here for pm status maybe ACTIVE */ + if (ret < 0) return ret; thead_debug("23thead_mfg_enable aclk\n"); @@ -82,6 +83,19 @@ int thead_mfg_enable(struct gpu_plat_if *mfg) } } + regmap_read(mfg->vosys_regmap, 0x0, &val); + if (val) + { + regmap_update_bits(mfg->vosys_regmap, 0x0, 3, 0); + regmap_read(mfg->vosys_regmap, 0x0, &val); + if (val) { + pr_info("[GPU_RST]" "val is %x\r\n", val); + clk_disable_unprepare(mfg->gpu_cclk); + clk_disable_unprepare(mfg->gpu_aclk); + goto err_pm_runtime_put; + } + udelay(1); + } /* rst gpu clkgen */ regmap_update_bits(mfg->vosys_regmap, 0x0, 2, 2); regmap_read(mfg->vosys_regmap, 0x0, &val); @@ -148,7 +162,7 @@ struct gpu_plat_if *dt_hw_init(struct device *dev) } mfg->gpu_aclk = devm_clk_get(dev, "aclk"); - if (IS_ERR(mfg->gpu_cclk)) { + if (IS_ERR(mfg->gpu_aclk)) { dev_err(dev, "devm_clk_get aclk failed !!!\n"); pm_runtime_disable(dev); return ERR_PTR(PTR_ERR(mfg->gpu_aclk));