From ada47f394b2ba9ecea101133345a0cba639b790a Mon Sep 17 00:00:00 2001 From: thead_admin Date: Sun, 5 Mar 2023 22:36:24 +0800 Subject: [PATCH] Linux_SDK_V1.1.2 --- arch/riscv/Kconfig | 1 + arch/riscv/boot/dts/thead/Makefile | 4 +- arch/riscv/boot/dts/thead/fire-crash.dts | 295 ++- arch/riscv/boot/dts/thead/fire-emu-crash.dts | 2 +- .../boot/dts/thead/fire-emu-gpu-dpu-dsi0.dts | 107 ++ .../boot/dts/thead/fire-emu-soc-base.dts | 89 + .../boot/dts/thead/fire-emu-soc-c910x4.dts | 19 + .../boot/dts/thead/fire-emu-vi-dsp-vo.dts | 57 + .../boot/dts/thead/fire-emu-vi-vp-vo.dts | 119 ++ arch/riscv/boot/dts/thead/fire-emu.dts | 1617 ++--------------- arch/riscv/boot/dts/thead/fire.dtsi | 294 ++- arch/riscv/boot/dts/thead/light-a-product.dts | 4 +- .../boot/dts/thead/light-a-val-audio-hdmi.dts | 89 + arch/riscv/boot/dts/thead/light-a-val.dts | 7 +- .../boot/dts/thead/light-ant-discrete.dts | 2 +- arch/riscv/boot/dts/thead/light-ant-ref.dts | 15 +- arch/riscv/boot/dts/thead/light-b-product.dts | 5 +- arch/riscv/boot/dts/thead/light-crash.dts | 2 +- .../boot/dts/thead/light-lpi4a-ddr2G.dts | 20 + arch/riscv/boot/dts/thead/light-lpi4a-ref.dts | 1516 ++++++++++++++++ arch/riscv/boot/dts/thead/light-lpi4a.dts | 27 + arch/riscv/boot/dts/thead/light.dtsi | 42 + arch/riscv/configs/defconfig | 1 - arch/riscv/configs/fire_defconfig | 2 +- arch/riscv/configs/fire_emu_defconfig | 3 +- arch/riscv/configs/ice_defconfig | 1 - arch/riscv/configs/light-android_defconfig | 1 - arch/riscv/configs/light_defconfig | 2 +- arch/riscv/configs/light_emu_defconfig | 1 - arch/riscv/configs/vector_0_7_defconfig | 1 - arch/riscv/kernel/machine_kexec.c | 5 +- arch/riscv/kernel/perf_callchain.c | 4 +- arch/riscv/kernel/probes/kprobes.c | 18 + drivers/gpu/drm/panel/Kconfig | 9 + drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-himax8394.c | 429 +++++ drivers/irqchip/irq-riscv-intc.c | 2 + drivers/net/phy/realtek.c | 1 + drivers/phy/synopsys/phy-dw-mipi-dphy.c | 2 +- drivers/usb/dwc3/dwc3-thead.c | 29 + .../pinctrl/light-fm-aon-pinctrl.h | 32 + sound/soc/thead/light-i2s.c | 44 +- sound/soc/thead/light-i2s.h | 6 + 43 files changed, 3105 insertions(+), 1822 deletions(-) create mode 100644 arch/riscv/boot/dts/thead/fire-emu-gpu-dpu-dsi0.dts create mode 100644 arch/riscv/boot/dts/thead/fire-emu-soc-base.dts create mode 100644 arch/riscv/boot/dts/thead/fire-emu-soc-c910x4.dts create mode 100644 arch/riscv/boot/dts/thead/fire-emu-vi-dsp-vo.dts create mode 100644 arch/riscv/boot/dts/thead/fire-emu-vi-vp-vo.dts create mode 100644 arch/riscv/boot/dts/thead/light-a-val-audio-hdmi.dts create mode 100644 arch/riscv/boot/dts/thead/light-lpi4a-ddr2G.dts create mode 100644 arch/riscv/boot/dts/thead/light-lpi4a-ref.dts create mode 100644 arch/riscv/boot/dts/thead/light-lpi4a.dts create mode 100644 drivers/gpu/drm/panel/panel-himax8394.c diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 9337dbc0c..94ca69844 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -32,6 +32,7 @@ config RISCV select ARCH_HAS_SYNC_DMA_FOR_DEVICE select ARCH_HAS_DMA_WRITE_COMBINE select ARCH_HAS_DMA_MMAP_PGPROT + select ARCH_KEEP_MEMBLOCK select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT select ARCH_USE_QUEUED_RWLOCKS diff --git a/arch/riscv/boot/dts/thead/Makefile b/arch/riscv/boot/dts/thead/Makefile index a1bc568ee..898f5682c 100644 --- a/arch/riscv/boot/dts/thead/Makefile +++ b/arch/riscv/boot/dts/thead/Makefile @@ -4,7 +4,7 @@ dtb-$(CONFIG_SOC_THEAD) += light-fm-emu.dtb light_mpw.dtb dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-npu-fce.dtb dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-gpu.dtb dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-dsp.dtb -dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-audio.dtb +dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-audio.dtb light-a-val-audio-hdmi.dtb dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-hdmi.dtb dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-dsi0-hdmi.dtb dtb-$(CONFIG_SOC_THEAD) += light-a-val.dtb light-a-val-sv.dtb @@ -27,6 +27,7 @@ dtb-$(CONFIG_SOC_THEAD) += light-a-val-full.dtb dtb-$(CONFIG_SOC_THEAD) += light-ant-ref.dtb dtb-$(CONFIG_SOC_THEAD) += light-ant-discrete.dtb dtb-$(CONFIG_SOC_THEAD) += light-beagle.dtb +dtb-$(CONFIG_SOC_THEAD) += light-lpi4a.dtb light-lpi4a-ddr2G.dtb dtb-$(CONFIG_SOC_THEAD) += light-a-ref.dtb light-a-ref-dsi0.dtb light-a-ref-dsi0-hdmi.dtb dtb-$(CONFIG_SOC_THEAD) += light-b-ref.dtb dtb-$(CONFIG_SOC_THEAD) += light-a-val-crash.dtb light-b-product-crash.dtb light-ant-ref-crash.dtb light-ant-discrete-crash.dtb @@ -35,3 +36,4 @@ dtb-$(CONFIG_SOC_THEAD) += light-b-power.dtb dtb-$(CONFIG_SOC_THEAD) += light-a-val-android.dtb dtb-$(CONFIG_SOC_THEAD) += fire-emu.dtb fire-emu-crash.dtb +dtb-$(CONFIG_SOC_THEAD) += fire-emu-soc-base.dtb fire-emu-soc-c910x4.dtb fire-emu-gpu-dpu-dsi0.dtb fire-emu-vi-dsp-vo.dtb fire-emu-vi-vp-vo.dtb diff --git a/arch/riscv/boot/dts/thead/fire-crash.dts b/arch/riscv/boot/dts/thead/fire-crash.dts index dfb275d08..e67492628 100644 --- a/arch/riscv/boot/dts/thead/fire-crash.dts +++ b/arch/riscv/boot/dts/thead/fire-crash.dts @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2021 Alibaba Group Holding Limited. + * Copyright (C) 2021-2022 Alibaba Group Holding Limited. */ /dts-v1/; @@ -9,8 +9,9 @@ #include #include #include "light-vi-devices.dtsi" + / { - model = "T-HEAD Fire emu board"; + model = "T-HEAD fire fpga board"; compatible = "thead,fire-emu", "thead,fire"; chosen { @@ -120,10 +121,6 @@ is_default_region; }; - iopmp_fce: IOPMP_FCE { - is_default_region; - }; - iopmp0_dpu: IOPMP0_DPU { bypass_en; }; @@ -192,23 +189,6 @@ status = "okay"; }; - reg_vref_1v8: regulator-adc-verf { - compatible = "regulator-fixed"; - regulator-name = "vref-1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - status = "okay"; - }; - - reg_tp_pwr_en: regulator-pwr-en { - compatible = "regulator-fixed"; - regulator-name = "PWR_EN"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - gpio = <&gpio1_porta 12 1>; - enable-active-high; - regulator-always-on; - }; wcn_wifi: wireless-wlan { compatible = "wlan-platdata"; @@ -217,33 +197,33 @@ keep_wifi_power_on; pinctrl-names = "default"; wifi_chip_type = "rtl8723ds"; - WIFI,poweren_gpio = <&gpio2_porta 29 0>; - WIFI,reset_n = <&gpio2_porta 24 0>; - status = "okay"; + WIFI,poweren_gpio = <&gpio2_porta 26 0>; + WIFI,reset_n = <&gpio2_porta 28 0>; + status = "disabled"; }; wcn_bt: wireless-bluetooth { compatible = "bluetooth-platdata"; pinctrl-names = "default", "rts_gpio"; - BT,power_gpio = <&gpio2_porta 25 0>; - status = "okay"; + BT,power_gpio = <&gpio2_porta 29 0>; + status = "disabled"; }; - gpio-keys { + gpio_keys: gpio_keys{ compatible = "gpio-keys"; - pinctrl-0 = <&pinctrl_volume>; pinctrl-names = "default"; + status = "disabled"; key-volumedown { label = "Volume Down Key"; - linux,code = ; - debounce-interval = <1>; - gpios = <&ao_gpio_porta 11 0x1>; + linux,code = ; + debounce-interval = <2>; + gpios = <&ao_gpio_porta 4 GPIO_ACTIVE_LOW>; }; key-volumeup { label = "Volume Up Key"; - linux,code = ; - debounce-interval = <1>; - gpios = <&ao_gpio_porta 10 0x1>; + linux,code = ; + debounce-interval = <2>; + gpios = <&ao_gpio_porta 5 GPIO_ACTIVE_LOW>; }; }; @@ -251,20 +231,27 @@ compatible = "thead,light-aon"; mbox-names = "aon"; mboxes = <&mbox_910t 1 0>; - status = "okay"; + status = "disabled"; pd: light-aon-pd { compatible = "thead,light-aon-pd"; #power-domain-cells = <1>; + status = "disabled"; + }; + + aon_reg_dialog: light-dialog-reg { + compatible = "thead,light-dialog-pmic"; + status = "disabled"; }; c910_cpufreq { compatible = "thead,light-mpw-cpufreq"; - status = "okay"; + status = "disabled"; }; test: light-aon-test { compatible = "thead,light-aon-test"; + status = "disabled"; }; }; }; @@ -278,60 +265,73 @@ reg = <0x0 0x1a000000 0 0x4000000>; no-map; }; + dsp0_mem: memory@20000000 { /**0x2000_0000~0x2040_0000 4M**/ + reg = <0x0 0x20000000 0x0 0x00280000 /* DSP FW code&data section 2.5M*/ + 0x0 0x20280000 0x0 0x00001000 /* DSP communication area 4K*/ + 0x0 0x20281000 0x0 0x00007000 /* Panic/log page 28K */ + 0x0 0x20288000 0x0 0x00178000>; /* DSP shared memory 1.5M-32K*/ + no-map; + }; + dsp1_mem: memory@20400000 { /**0x2040_0000~0x2080_0000 4M**/ + reg = <0x0 0x20400000 0x0 0x00280000 /* DSP FW code&data section */ + 0x0 0x20680000 0x0 0x00001000 /* DSP communication area */ + 0x0 0x20681000 0x0 0x00007000 /* Panic/log page*/ + 0x0 0x20688000 0x0 0x00178000>; /* DSP shared memory */ + no-map; + }; + vi_mem: framebuffer@0f800000 { + reg = <0x0 0x0F800000 0x0 0x05400000 /* vi_mem_pool_region[0] 84 MB (default) */ + 0x0 0x14C00000 0x0 0x01D00000 /* vi_mem_pool_region[1] 29 MB */ + 0x0 0x16900000 0x0 0x03200000>; /* vi_mem_pool_region[2] 50 MB */ + no-map; + }; + facelib_mem: memory@22000000 { + reg = <0x0 0x22000000 0x0 0x10000000>; + no-map; + }; - dsp0_mem: memory@20000000 { /**0x2000_0000~0x2040_0000 4M**/ - reg = <0x0 0x20000000 0x0 0x00280000 /* DSP FW code&data section 2.5M*/ - 0x0 0x20280000 0x0 0x00001000 /* DSP communication area 4K*/ - 0x0 0x20281000 0x0 0x00007000 /* Panic/log page 28K */ - 0x0 0x20288000 0x0 0x00178000>; /* DSP shared memory 1.5M-32K*/ - no-map; - }; - dsp1_mem: memory@20400000 { /**0x2040_0000~0x2080_0000 4M**/ - reg = <0x0 0x20400000 0x0 0x00280000 /* DSP FW code&data section */ - 0x0 0x20680000 0x0 0x00001000 /* DSP communication area */ - 0x0 0x20681000 0x0 0x00007000 /* Panic/log page*/ - 0x0 0x20688000 0x0 0x00178000>; /* DSP shared memory */ - no-map; - }; - vi_mem: framebuffer@10000000 { - reg = <0x0 0x10000000 0x0 0x02C00000 /* vi_mem_pool_region[0] 44 MB (default) */ - 0x0 0x12C00000 0x0 0x01D00000 /* vi_mem_pool_region[1] 29 MB */ - 0x0 0x14900000 0x0 0x01E00000>; /* vi_mem_pool_region[2] 30 MB */ - no-map; - }; - facelib_mem: memory@17000000 { - reg = <0x0 0x17000000 0 0x02000000>; - no-map; - }; }; -&adc { - vref-supply = <®_vref_1v8>; - status = "okay"; +&clk { + status = "disabled"; }; &i2c0 { - clock-frequency = <100000>; + clock-frequency = <400000>; status = "okay"; + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + pagesize = <32>; + }; + + codec: wm8960@1a { + #sound-dai-cells = <0>; + compatible = "wlf,wm8960"; + reg = <0x1a>; + wlf,shared-lrclk; + wlf,hp-cfg = <3 2 3>; + wlf,gpio-cfg = <1 3>; + }; + touch@5d { #gpio-cells = <2>; compatible = "goodix,gt911"; + status = "disabled"; reg = <0x5d>; interrupt-parent = <&gpio1_porta>; interrupts = <8 0>; irq-gpios = <&gpio1_porta 8 0>; reset-gpios = <&gpio1_porta 7 0>; - AVDD28-supply = <®_tp_pwr_en>; - touchscreen-size-x = <720>; + touchscreen-size-x = <800>; touchscreen-size-y = <1280>; }; - }; &audio_i2c0 { clock-frequency = <100000>; - status = "okay"; + status = "disabled"; es8156_audio_codec: es8156@8 { #sound-dai-cells = <0>; @@ -344,25 +344,29 @@ compatible = "MicArray_0"; reg = <0x40>; }; - - audio_aw87519_pa@58 { - compatible = "awinic,aw87519_pa"; - reg = <0x58>; - reset-gpio = <&ao_gpio4_porta 9 0x1>; - status = "okay"; - }; }; &i2c1 { - clock-frequency = <100000>; - status = "okay"; + clock-frequency = <400000>; + status = "disabled"; + touch1@5d { + #gpio-cells = <2>; + compatible = "goodix,gt911"; + reg = <0x5d>; + interrupt-parent = <&gpio1_porta>; + interrupts = <12 0>; + irq-gpios = <&gpio1_porta 12 0>; + reset-gpios = <&gpio1_porta 11 0>; + touchscreen-size-x = <800>; + touchscreen-size-y = <1280>; + }; }; &spi0 { num-cs = <1>; cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0 rx-sample-delay-ns = <10>; - status = "disabled"; + status = "okay"; spi_norflash@0 { #address-cells = <1>; @@ -371,6 +375,7 @@ reg = <0>; spi-max-frequency = <50000000>; w25q,fast-read; + status = "disabled"; }; spidev@1 { @@ -382,12 +387,6 @@ }; }; -&uart0 { - clocks = <&dummy_clock_uart_sclk>; - clock-names = "baudclk"; - clock-frequency = <100000000>; -}; - &qspi0 { num-cs = <1>; cs-gpios = <&gpio2_porta 3 0>; @@ -411,17 +410,23 @@ }; &qspi1 { - compatible = "snps,dw-apb-ssi"; num-cs = <1>; cs-gpios = <&gpio0_porta 1 0>; status = "disabled"; - spidev@0 { - compatible = "spidev"; - #address-cells = <0x1>; - #size-cells = <0x1>; - reg = <0x0>; - spi-max-frequency = <50000000>; + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-nand"; + spi-max-frequency = <66000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + reg = <0>; + + partition@0 { + label = "ubi2"; + reg = <0x00000000 0x08000000>; + }; }; }; @@ -447,14 +452,6 @@ }; }; -&gmac1 { - phy-mode = "rgmii-id"; - rx-clk-delay = <0x00>; /* for RGMII */ - tx-clk-delay = <0x00>; /* for RGMII */ - phy-handle = <&phy_88E1111_1>; - status = "okay"; -}; - &emmc { max-frequency = <198000000>; non-removable; @@ -489,7 +486,7 @@ cap-sd-highspeed; keep-power-in-suspend; wakeup-source; - status = "okay"; + status = "disabled"; }; &padctrl0_apsys { /* right-pinctrl */ @@ -541,6 +538,7 @@ pinctrl_pwm: pwmgrp { thead,pins = < FM_GPIO3_2 0x1 0x208 /* pwm0 */ + FM_GPIO3_3 0x1 0x208 /* pwm1 */ >; }; }; @@ -593,57 +591,41 @@ }; }; -&padctrl_aosys { - light-aon-padctrl { - /* - * Pin Configuration Node: - * Format: - */ - - pinctrl_audiopa1: audiopa1_grp { - thead,pins = < - FM_AUDIO_PA1 0x3 0x72 - >; - }; - - pinctrl_audiopa2: audiopa2_grp { - thead,pins = < - FM_AUDIO_PA2 0x0 0x72 - >; - }; - - pinctrl_volume: volume_grp { - thead,pins = < - FM_AOGPIO_11 0x0 0x208 - FM_AOGPIO_10 0x3 0x208 - >; - }; +&i2c2 { + clock-frequency = <400000>; + status = "okay"; + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + pagesize = <32>; }; }; -&i2c0 { - clock-frequency = <400000>; - status = "okay"; -}; - -&i2c1 { - clock-frequency = <400000>; - status = "okay"; -}; - -&i2c2 { - clock-frequency = <400000>; - status = "okay"; -}; - &i2c3 { - clock-frequency = <400000>; + clock-frequency = <400000>; status = "okay"; + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + pagesize = <32>; + }; }; &i2c4 { - clock-frequency = <400000>; + clock-frequency = <400000>; status = "okay"; + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + pagesize = <32>; + }; + + pcal6408ahk_a: gpio@20 { + compatible = "nxp,pcal9554b"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; }; &isp0 { @@ -691,6 +673,7 @@ }; &vi_pre { + //vi_pre_irq_en = <1>; status = "disabled"; }; @@ -700,18 +683,20 @@ &xtensa_dsp0 { status = "disabled"; + memory-region = <&dsp0_mem>; }; -&xtensa_dsp1 { - status = "disabled"; +&xtensa_dsp1{ + status = "disabled"; + memory-region = <&dsp1_mem>; }; &vvcam_flash_led0{ - status = "disabled"; -}; - - -&vvcam_sensor0 { + flash_led_name = "aw36413_aw36515"; + floodlight_i2c_bus = /bits/ 8 <2>; + floodlight_en_pin = <&gpio1_porta 25 0>; + //projection_i2c_bus = /bits/ 8 <2>; + flash_led_touch_pin = <&gpio1_porta 27 0>; //flash led touch pin status = "disabled"; }; @@ -851,19 +836,19 @@ }; &light_i2s { - status = "okay"; + status = "disabled"; }; &i2s0 { - status = "okay"; + status = "disabled"; }; &i2s1 { - status = "okay"; + status = "disabled"; }; &i2s3 { - status = "okay"; + status = "disabled"; }; &khvhost { diff --git a/arch/riscv/boot/dts/thead/fire-emu-crash.dts b/arch/riscv/boot/dts/thead/fire-emu-crash.dts index 36e087f77..260d8a6b1 100644 --- a/arch/riscv/boot/dts/thead/fire-emu-crash.dts +++ b/arch/riscv/boot/dts/thead/fire-emu-crash.dts @@ -8,7 +8,7 @@ &aon { aon_reg_dialog: light-dialog-reg { compatible = "thead,light-dialog-pmic"; - status = "okay"; + status = "disabled"; dvdd_cpu_reg: appcpu_dvdd { regulator-name = "appcpu_dvdd"; diff --git a/arch/riscv/boot/dts/thead/fire-emu-gpu-dpu-dsi0.dts b/arch/riscv/boot/dts/thead/fire-emu-gpu-dpu-dsi0.dts new file mode 100644 index 000000000..938e46fe0 --- /dev/null +++ b/arch/riscv/boot/dts/thead/fire-emu-gpu-dpu-dsi0.dts @@ -0,0 +1,107 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2021-2022 Alibaba Group Holding Limited. + */ + +/dts-v1/; + +#include "fire-emu.dts" + +&gpu { + status = "okay"; +}; + +&vosys_reg { + status = "okay"; +}; + +&display_subsystem { + status = "okay"; +}; + +&dpu_enc0 { + status = "okay"; + + ports { + /* output */ + port@1 { + reg = <1>; + + enc0_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + }; +}; + +&dpu { + status = "okay"; +}; + + +&dsi0 { + status = "okay"; +}; + +&dhost_0 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi0_in: endpoint { + remote-endpoint = <&enc0_out>; + }; + }; + + port@1 { + reg = <1>; + + dsi0_out: endpoint { + remote-endpoint = <&panel0_in>; + }; + }; + }; + + panel0@0 { + compatible = "hlt,hpk070h275"; + reg = <0>; + + port { + panel0_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + }; +}; + +&aon { + status = "okay"; +}; + +&mbox_910t { + status = "okay"; +}; + +&mbox_910t_client1 { + status = "okay"; +}; + +&mbox_910t_client2 { + status = "okay"; +}; + +&dmac1 { + status = "okay"; +}; + +&lightsound { + status = "okay"; +}; + +&dmac2 { + status = "disabled"; +}; + diff --git a/arch/riscv/boot/dts/thead/fire-emu-soc-base.dts b/arch/riscv/boot/dts/thead/fire-emu-soc-base.dts new file mode 100644 index 000000000..df6eeebee --- /dev/null +++ b/arch/riscv/boot/dts/thead/fire-emu-soc-base.dts @@ -0,0 +1,89 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2021-2022 Alibaba Group Holding Limited. + */ + +/dts-v1/; + +#include "fire-emu.dts" + +&sdhci0 { + status = "okay"; +}; + +&usb3_drd { + status = "okay"; +}; + +&usb { + status = "okay"; +}; + +&spi0 { + num-cs = <1>; + cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0 + rx-sample-delay-ns = <10>; + status = "okay"; + + spi_norflash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "winbond,w25q64jwm", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + w25q,fast-read; + status = "okay"; + }; + + spidev@1 { + compatible = "spidev"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x1>; + spi-max-frequency = <50000000>; + }; +}; + +&qspi0 { + num-cs = <1>; + cs-gpios = <&gpio2_porta 3 0>; + rx-sample-dly = <4>; + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-nand"; + spi-max-frequency = <100000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + reg = <0>; + + partition@0 { + label = "ubi1"; + reg = <0x00000000 0x08000000>; + }; + }; +}; + +&qspi1 { + num-cs = <1>; + cs-gpios = <&gpio0_porta 1 0>; + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-nand"; + spi-max-frequency = <66000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + reg = <0>; + + partition@0 { + label = "ubi2"; + reg = <0x00000000 0x08000000>; + }; + }; +}; + diff --git a/arch/riscv/boot/dts/thead/fire-emu-soc-c910x4.dts b/arch/riscv/boot/dts/thead/fire-emu-soc-c910x4.dts new file mode 100644 index 000000000..e7d225925 --- /dev/null +++ b/arch/riscv/boot/dts/thead/fire-emu-soc-c910x4.dts @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2021-2022 Alibaba Group Holding Limited. + */ + +#include "fire-emu.dts" + +&c910_1 { + status = "okay"; +}; + +&c910_2 { + status = "okay"; +}; + +&c910_3 { + status = "okay"; +}; + diff --git a/arch/riscv/boot/dts/thead/fire-emu-vi-dsp-vo.dts b/arch/riscv/boot/dts/thead/fire-emu-vi-dsp-vo.dts new file mode 100644 index 000000000..c5cee401c --- /dev/null +++ b/arch/riscv/boot/dts/thead/fire-emu-vi-dsp-vo.dts @@ -0,0 +1,57 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2021-2022 Alibaba Group Holding Limited. + */ + +/dts-v1/; + +#include "fire-emu.dts" + +&c910_1 { + status = "okay"; +}; + +&vi_pre { + status = "okay"; +}; + +&dewarp { + status = "okay"; +}; + +&xtensa_dsp { + status = "okay"; +}; + +&xtensa_dsp0 { + status = "okay"; +}; + +&xtensa_dsp1 { + status = "okay"; +}; + +&vosys_reg { + status = "okay"; +}; + +&display_subsystem { + status = "okay"; +}; + +&dpu { + status = "okay"; +}; + +&hdmi_tx { + status = "okay"; +}; + +&dsi0 { + status = "okay"; +}; + +&dpu_enc0 { + status = "okay"; +}; + diff --git a/arch/riscv/boot/dts/thead/fire-emu-vi-vp-vo.dts b/arch/riscv/boot/dts/thead/fire-emu-vi-vp-vo.dts new file mode 100644 index 000000000..b6e753740 --- /dev/null +++ b/arch/riscv/boot/dts/thead/fire-emu-vi-vp-vo.dts @@ -0,0 +1,119 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2021-2022 Alibaba Group Holding Limited. + */ + +/dts-v1/; + +#include "fire-emu.dts" + +&c910_1 { + status = "okay"; +}; + +&vi_pre { + status = "okay"; +}; + +&dewarp { + status = "okay"; +}; + +&venc { + status = "okay"; +}; + +&vdec { + status = "okay"; +}; + +&g2d { + status = "okay"; +}; + +&vosys_reg { + status = "okay"; +}; + +&display_subsystem { + status = "okay"; +}; + +&dpu_enc0 { + status = "okay"; + + ports { + /* output */ + port@1 { + reg = <1>; + + enc0_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + }; +}; + +&dsi0 { + status = "okay"; +}; + +&dhost_0 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi0_in: endpoint { + remote-endpoint = <&enc0_out>; + }; + }; + + port@1 { + reg = <1>; + + dsi0_out: endpoint { + remote-endpoint = <&panel0_in>; + }; + }; + }; + + panel0@0 { + compatible = "hlt,hpk070h275"; + reg = <0>; + + port { + panel0_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + }; +}; + +&dpu_enc1 { + ports { + /delete-node/ port@0; + }; +}; + +&disp1_out { + remote-endpoint = <&hdmi_tx_in>; +}; + +&dpu { + status = "okay"; +}; + +&hdmi_tx { + status = "okay"; + + port@0 { + /* input */ + hdmi_tx_in: endpoint { + remote-endpoint = <&disp1_out>; + }; + }; +}; + diff --git a/arch/riscv/boot/dts/thead/fire-emu.dts b/arch/riscv/boot/dts/thead/fire-emu.dts index 57b3d20c2..b253add80 100644 --- a/arch/riscv/boot/dts/thead/fire-emu.dts +++ b/arch/riscv/boot/dts/thead/fire-emu.dts @@ -190,69 +190,6 @@ status = "okay"; }; - reg_vref_1v8: regulator-adc-verf { - compatible = "regulator-fixed"; - regulator-name = "vref-1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - status = "okay"; - }; - - reg_tp_pwr_en: regulator-pwr-en { - compatible = "regulator-fixed"; - regulator-name = "PWR_EN"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - gpio = <&pcal6408ahk_a 3 1>; - enable-active-high; - regulator-always-on; - }; - - reg_tp1_pwr_en: regulator-tp1-pwr-en { - compatible = "regulator-fixed"; - regulator-name = "PWR_EN"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - gpio = <&pcal6408ahk_a 6 1>; - enable-active-high; - regulator-always-on; - }; - - lcd0_1v8: regulator-lcd0-vdd18 { - compatible = "regulator-fixed"; - regulator-name = "lcd0_en"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - gpio = <&pcal6408ahk_a 2 0>; - enable-active-high; - }; - - lcd0_5v7: regulator-lcd0-vspn57 { - compatible = "regulator-fixed"; - regulator-name = "lcd0_bias_en"; - regulator-min-microvolt = <5700000>; - regulator-max-microvolt = <5700000>; - gpio = <&pcal6408ahk_a 4 0>; - enable-active-high; - }; - - lcd1_1v8: regulator-lcd1-vdd18 { - compatible = "regulator-fixed"; - regulator-name = "lcd1_en"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - gpio = <&pcal6408ahk_a 5 0>; - enable-active-high; - }; - - lcd1_5v7: regulator-lcd1-vspn57 { - compatible = "regulator-fixed"; - regulator-name = "lcd1_bias_en"; - regulator-min-microvolt = <5700000>; - regulator-max-microvolt = <5700000>; - gpio = <&pcal6408ahk_a 7 0>; - enable-active-high; - }; wcn_wifi: wireless-wlan { compatible = "wlan-platdata"; @@ -275,7 +212,6 @@ gpio_keys: gpio_keys{ compatible = "gpio-keys"; - pinctrl-0 = <&pinctrl_volume>; pinctrl-names = "default"; status = "disabled"; key-volumedown { @@ -292,168 +228,21 @@ }; }; - aon { + aon: light-aon { compatible = "thead,light-aon"; mbox-names = "aon"; mboxes = <&mbox_910t 1 0>; - status = "okay"; + status = "disabled"; pd: light-aon-pd { compatible = "thead,light-aon-pd"; #power-domain-cells = <1>; + status = "disabled"; }; aon_reg_dialog: light-dialog-reg { compatible = "thead,light-dialog-pmic"; status = "disabled"; - - dvdd_cpu_reg: appcpu_dvdd { - regulator-name = "appcpu_dvdd"; - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1570000>; - regulator-boot-on; - regulator-always-on; - }; - - dvddm_cpu_reg: appcpu_dvddm { - regulator-name = "appcpu_dvddm"; - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1570000>; - regulator-boot-on; - regulator-always-on; - }; - soc_dvdd18_aon_reg: soc_dvdd18_aon { - regulator-name = "soc_dvdd18_aon"; - regulator-boot-on; - regulator-always-on; - }; - - soc_avdd33_usb3_reg: soc_avdd33_usb3 { - regulator-name = "soc_avdd33_usb3"; - regulator-boot-on; - regulator-always-on; - }; - - soc_dvdd08_aon_reg: soc_dvdd08_aon { - regulator-name = "soc_dvdd08_aon"; - regulator-boot-on; - regulator-always-on; - }; - - soc_dvdd08_ddr_reg: soc_dvdd08_ddr { - regulator-name = "soc_dvdd08_ddr"; - regulator-boot-on; - regulator-always-on; - }; - - soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 { - regulator-name = "soc_vdd_ddr_1v8"; - regulator-boot-on; - regulator-always-on; - }; - - soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 { - regulator-name = "soc_vdd_ddr_1v1"; - regulator-boot-on; - regulator-always-on; - }; - - soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 { - regulator-name = "soc_vdd_ddr_0v6"; - regulator-boot-on; - regulator-always-on; - }; - - soc_dvdd18_ap_reg: soc_dvdd18_ap { - regulator-name = "soc_dvdd18_ap"; - regulator-boot-on; - regulator-always-on; - }; - - soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi { - regulator-name = "soc_avdd08_mipi_hdmi"; - regulator-boot-on; - regulator-always-on; - }; - - soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi { - regulator-name = "soc_avdd18_mipi_hdmi"; - regulator-boot-on; - regulator-always-on; - }; - - soc_vdd33_emmc_reg: soc_vdd33_emmc { - regulator-name = "soc_vdd33_emmc"; - regulator-boot-on; - regulator-always-on; - }; - - soc_vdd18_emmc_reg: soc_vdd18_emmc { - regulator-name = "soc_vdd18_emmc"; - regulator-boot-on; - regulator-always-on; - }; - soc_dovdd18_scan_reg: soc_dovdd18_scan { - regulator-name = "soc_dovdd18_scan"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <3600000>; - }; - soc_vext_2v8_reg: soc_vext_2v8 { - regulator-name = "soc_vext_2v8"; - regulator-boot-on; - regulator-always-on; - }; - soc_dvdd12_scan_reg: soc_dvdd12_scan { - regulator-name = "soc_dvdd12_scan"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <3600000>; - }; - soc_avdd28_scan_en_reg: soc_avdd28_scan_en { - regulator-name = "soc_avdd28_scan_en"; - }; - soc_avdd28_rgb_reg: soc_avdd28_rgb { - regulator-name = "soc_avdd28_rgb"; - regulator-min-microvolt = <2200000>; - regulator-max-microvolt = <3475000>; - regulator-boot-on; - regulator-always-on; - }; - soc_dovdd18_rgb_reg: soc_dovdd18_rgb { - regulator-name = "soc_dovdd18_rgb"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3600000>; - regulator-boot-on; - regulator-always-on; - }; - soc_dvdd12_rgb_reg: soc_dvdd12_rgb { - regulator-name = "soc_dvdd12_rgb"; - regulator-min-microvolt = <400000>; - regulator-max-microvolt = <1675000>; - regulator-boot-on; - regulator-always-on; - }; - soc_avdd25_ir_reg: soc_avdd25_ir { - regulator-name = "soc_avdd25_ir"; - regulator-min-microvolt = <2200000>; - regulator-max-microvolt = <3475000>; - regulator-boot-on; - regulator-always-on; - }; - soc_dovdd18_ir_reg: soc_dovdd18_ir { - regulator-name = "soc_dovdd18_ir"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3600000>; - regulator-boot-on; - regulator-always-on; - }; - soc_dvdd12_ir_reg: soc_dvdd12_ir { - regulator-name = "soc_dvdd12_ir"; - regulator-min-microvolt = <400000>; - regulator-max-microvolt = <1675000>; - regulator-boot-on; - regulator-always-on; - }; - }; c910_cpufreq { @@ -463,6 +252,7 @@ test: light-aon-test { compatible = "thead,light-aon-test"; + status = "disabled"; }; }; }; @@ -511,11 +301,6 @@ status = "disabled"; }; -&adc { - vref-supply = <®_vref_1v8>; - status = "okay"; -}; - &i2c0 { clock-frequency = <400000>; status = "okay"; @@ -538,20 +323,20 @@ touch@5d { #gpio-cells = <2>; compatible = "goodix,gt911"; + status = "disabled"; reg = <0x5d>; interrupt-parent = <&gpio1_porta>; interrupts = <8 0>; irq-gpios = <&gpio1_porta 8 0>; reset-gpios = <&gpio1_porta 7 0>; - AVDD28-supply = <®_tp_pwr_en>; - touchscreen-size-x = <720>; + touchscreen-size-x = <800>; touchscreen-size-y = <1280>; }; }; &audio_i2c0 { clock-frequency = <100000>; - status = "okay"; + status = "disabled"; es8156_audio_codec: es8156@8 { #sound-dai-cells = <0>; @@ -568,7 +353,7 @@ &i2c1 { clock-frequency = <400000>; - status = "okay"; + status = "disabled"; touch1@5d { #gpio-cells = <2>; compatible = "goodix,gt911"; @@ -577,8 +362,7 @@ interrupts = <12 0>; irq-gpios = <&gpio1_porta 12 0>; reset-gpios = <&gpio1_porta 11 0>; - AVDD28-supply = <®_tp1_pwr_en>; - touchscreen-size-x = <720>; + touchscreen-size-x = <800>; touchscreen-size-y = <1280>; }; }; @@ -608,57 +392,16 @@ }; }; -&uart0 { - clock-frequency = <100000000>; -}; - &qspi0 { - num-cs = <1>; - cs-gpios = <&gpio2_porta 3 0>; - rx-sample-dly = <4>; status = "disabled"; - - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spi-nand"; - spi-max-frequency = <100000000>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - reg = <0>; - - partition@0 { - label = "ubi1"; - reg = <0x00000000 0x08000000>; - }; - }; }; &qspi1 { - num-cs = <1>; - cs-gpios = <&gpio0_porta 1 0>; status = "disabled"; - - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spi-nand"; - spi-max-frequency = <66000000>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - reg = <0>; - - partition@0 { - label = "ubi2"; - reg = <0x00000000 0x08000000>; - }; - }; }; - &gmac0 { - phy-mode = "rgmii-id"; - rx-clk-delay = <0x00>; /* for RGMII */ - tx-clk-delay = <0x00>; /* for RGMII */ + max-speed = <100>; + phy-mode = "mii"; phy-handle = <&phy_88E1111_0>; status = "okay"; @@ -668,27 +411,16 @@ compatible = "snps,dwmac-mdio"; phy_88E1111_0: ethernet-phy@0 { - reg = <0x1>; + reg = <0x0>; }; - phy_88E1111_1: ethernet-phy@1 { - reg = <0x2>; - }; }; }; -&gmac1 { - phy-mode = "rgmii-id"; - rx-clk-delay = <0x00>; /* for RGMII */ - tx-clk-delay = <0x00>; /* for RGMII */ - phy-handle = <&phy_88E1111_1>; - status = "okay"; -}; - &emmc { max-frequency = <198000000>; non-removable; - mmc-hs400-1_8v; + /*mmc-hs400-1_8v;*/ io_fixed_1v8; is_emmc; no-sdio; @@ -703,7 +435,7 @@ bus-width = <4>; pull_up; wprtn_ignore; - status = "okay"; + status = "disabled"; }; &sdhci1 { @@ -824,34 +556,6 @@ }; }; -&padctrl_aosys { - light-aon-padctrl { - /* - * Pin Configuration Node: - * Format: - */ - - pinctrl_audiopa1: audiopa1_grp { - thead,pins = < - FM_AUDIO_PA1 0x3 0x72 - >; - }; - - pinctrl_audiopa2: audiopa2_grp { - thead,pins = < - FM_AUDIO_PA2 0x0 0x72 - >; - }; - - pinctrl_volume: volume_grp { - thead,pins = < - FM_CPU_JTG_TDI 0x3 0x208 - FM_CPU_JTG_TDO 0x3 0x208 - >; - }; - }; -}; - &i2c2 { clock-frequency = <400000>; status = "okay"; @@ -890,65 +594,65 @@ }; &isp0 { - status = "okay"; + status = "disabled"; }; &isp1 { - status = "okay"; + status = "disabled"; }; &isp_ry0 { - status = "okay"; + status = "disabled"; }; &dewarp { - status = "okay"; + status = "disabled"; }; &dec400_isp0 { - status = "okay"; + status = "disabled"; }; &dec400_isp1 { - status = "okay"; + status = "disabled"; }; &dec400_isp2 { - status = "okay"; + status = "disabled"; }; &bm_visys { - status = "okay"; + status = "disabled"; }; &bm_csi0 { - status = "okay"; + status = "disabled"; }; &bm_csi1 { - status = "okay"; + status = "disabled"; }; &bm_csi2 { - status = "okay"; + status = "disabled"; }; &vi_pre { //vi_pre_irq_en = <1>; - status = "okay"; + status = "disabled"; }; &xtensa_dsp { - status = "okay"; + status = "disabled"; }; &xtensa_dsp0 { - status = "okay"; + status = "disabled"; memory-region = <&dsp0_mem>; }; &xtensa_dsp1{ - status = "okay"; + status = "disabled"; memory-region = <&dsp1_mem>; }; @@ -958,1141 +662,9 @@ floodlight_en_pin = <&gpio1_porta 25 0>; //projection_i2c_bus = /bits/ 8 <2>; flash_led_touch_pin = <&gpio1_porta 27 0>; //flash led touch pin - status = "okay"; -}; - -&vvcam_sensor0 { - sensor_name = "SC2310"; - sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB"; - sensor_regulator_voltage_uV = <1800000 1200000 2800000>; - sensor_regulator_timing_us = <70 50 20>; - sensor_rst = <&gpio1_porta 16 0>; - sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready - DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>; - DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>; - AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>; - i2c_reg_width = /bits/ 8 <2>; - i2c_data_width = /bits/ 8 <1>; - i2c_addr = /bits/ 8 <0x30>; - i2c_bus = /bits/ 8 <3>; - status = "okay"; -}; - -&vvcam_sensor1 { - sensor_name = "OV5693"; - i2c_bus = /bits/ 8 <3>; - i2c_reg_width = /bits/ 8 <1>; - i2c_data_width = /bits/ 8 <1>; status = "disabled"; }; -&vvcam_sensor2 { - sensor_name = "GC5035"; - sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN"; - sensor_regulator_timing_us = <100 50 0>; - sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin - sensor_rst = <&gpio1_porta 29 0>; - sensor_pdn_delay_us = <60>; //powerdown pin / shutdown pin actived till I2C ready - DOVDD18_SCAN-supply = <&soc_dovdd18_scan_reg>; - DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>; - AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>; - i2c_addr = /bits/ 8 <0x37>; - i2c_bus = /bits/ 8 <4>; - i2c_reg_width = /bits/ 8 <1>; - i2c_data_width = /bits/ 8 <1>; - status = "okay"; -}; - -&vvcam_sensor3 { - sensor_name = "SC2310"; - sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN"; - sensor_regulator_timing_us = <70 50 20>; - sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin - sensor_rst = <&gpio1_porta 29 0>; - sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready - DOVDD18_SCAN-supply = <&soc_dovdd18_scan_reg>; - DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>; - AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>; - i2c_bus = /bits/ 8 <4>; - status = "okay"; -}; - -&vvcam_sensor4 { - sensor_name = "SC132GS"; - sensor_regulators = "DOVDD18_IR", "DVDD12_IR", "AVDD25_IR"; - sensor_regulator_timing_us = <70 1000 2000>; - i2c_addr = /bits/ 8 <0x31>; - sensor_rst = <&gpio1_porta 24 0>; - sensor_pdn_delay_us = <2000>; //powerdown pin / shutdown pin actived till I2C ready - DOVDD18_IR-supply = <&soc_dovdd18_ir_reg>; - DVDD12_IR-supply = <&soc_dvdd12_ir_reg>; - AVDD25_IR-supply = <&soc_avdd25_ir_reg>; - i2c_reg_width = /bits/ 8 <2>; - i2c_data_width = /bits/ 8 <1>; - i2c_bus = /bits/ 8 <2>; - status = "okay"; -}; - -&vvcam_sensor5 { - sensor_name = "OV12870"; - sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB"; - sensor_regulator_voltage_uV = <1800000 1200000 2800000>; - sensor_regulator_timing_us = <100 50 0>; - sensor_rst = <&gpio1_porta 16 0>; - sensor_pdn_delay_us = <60>; //powerdown pin / shutdown pin actived till I2C ready - DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>; - DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>; - AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>; - i2c_addr = /bits/ 8 <0x10>; - i2c_reg_width = /bits/ 8 <2>; - i2c_data_width = /bits/ 8 <1>; - i2c_bus = /bits/ 8 <3>; - status = "okay"; -}; - -&vvcam_sensor6 { - sensor_name = "GC02M1B"; - sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB"; - sensor_regulator_voltage_uV = <1800000 1675000 2800000>; - sensor_regulator_timing_us = <70 50 20>; - sensor_rst = <&gpio1_porta 16 0>; - sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready - DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>; - DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>; - AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>; - i2c_reg_width = /bits/ 8 <1>; - i2c_data_width = /bits/ 8 <1>; - i2c_addr = /bits/ 8 <0x37>; - i2c_bus = /bits/ 8 <3>; - status = "okay"; -}; - -&video0{ - vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2] - channel0 { - sensor0 { - subdev_name = "vivcam"; - idx = <2>; //<2>=vivcam2 : gc5035 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <3>; - path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER// - }; - sensor1 { - subdev_name = "vivcam"; - idx = <3>; //<3>=vivcam3 : sc2310 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <0>; - path_type = "ISP_MI_PATH_MP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - }; - channel1 { - sensor0 { - subdev_name = "vivcam"; - idx = <2>; //<2>=vivcam2 : gc5035 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <3>; - path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER// - }; - sensor1 { - subdev_name = "vivcam"; - idx = <3>; //<3>=vivcam3 : sc2310 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <0>; - path_type = "ISP_MI_PATH_SP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - }; - channel2 { - sensor0 { - subdev_name = "vivcam"; - idx = <2>; //<2>=vivcam2 : gc5035 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <3>; - path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER// - }; - sensor1 { - subdev_name = "vivcam"; - idx = <3>; //<3>=vivcam3 : sc2310 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <0>; - path_type = "ISP_MI_PATH_SP2_BP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - }; -}; - - -&video1{ - vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2] - channel0 { - sensor0 { - subdev_name = "vivcam"; - idx = <2>; //<2>=vivcam2 : gc5035 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <3>; - path_type = "SENSOR_1296x972_RAW10_LINER"; - }; - sensor1 { - subdev_name = "vivcam"; - idx = <3>; //<3>=vivcam3 : sc2310 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <0>; - path_type = "ISP_MI_PATH_MP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dw { - subdev_name = "dw"; - idx = <0>; - path_type = "DW_DWE_VSE0"; - dw_dst_depth = <2>; - }; - }; - channel1 { - sensor0 { - subdev_name = "vivcam"; - idx = <2>; //<2>=vivcam2 : gc5035 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <3>; - path_type = "SENSOR_1296x972_RAW10_LINER"; - }; - sensor1 { - subdev_name = "vivcam"; - idx = <3>; //<3>=vivcam3 : sc2310 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <0>; - path_type = "ISP_MI_PATH_MP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dw { - subdev_name = "dw"; - idx = <0>; - path_type = "DW_DWE_VSE1"; - dw_dst_depth = <2>; - }; - }; - channel2 { - sensor0 { - subdev_name = "vivcam"; - idx = <2>; //<2>=vivcam2 : gc5035 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <3>; - path_type = "SENSOR_1296x972_RAW10_LINER"; - }; - sensor1 { - subdev_name = "vivcam"; - idx = <3>; //<3>=vivcam3 : sc2310 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <0>; - path_type = "ISP_MI_PATH_MP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dw { - subdev_name = "dw"; - idx = <0>; - path_type = "DW_DWE_VSE2"; - dw_dst_depth = <2>; - }; - }; -}; - -&video2{ - vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0] - channel0 { - sensor0 { - subdev_name = "vivcam"; - idx = <0>; //sc2310 - csi_idx = <0>; //<0>=CSI2 - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - sensor1 { - subdev_name = "vivcam"; - idx = <6>; //gc02m1b - csi_idx = <0>; //<0>=CSI2 - mode_idx = <0>; - path_type = "SENSOR_1600x1200_RAW10_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <1>; - path_type = "ISP_MI_PATH_MP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <16>; - frame_count = <3>; - }; - }; - }; - channel1 { - sensor0 { - subdev_name = "vivcam"; - idx = <0>; //sc2310 - csi_idx = <0>; //<0>=CSI2 - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - sensor1 { - subdev_name = "vivcam"; - idx = <6>; //gc02m1b - csi_idx = <0>; //<0>=CSI2 - mode_idx = <0>; - path_type = "SENSOR_1600x1200_RAW10_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <1>; - path_type = "ISP_MI_PATH_SP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <16>; - frame_count = <3>; - }; - }; - }; - channel2 { - sensor0 { - subdev_name = "vivcam"; - idx = <0>; //sc2310 - csi_idx = <0>; //<0>=CSI2 - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - sensor1 { - subdev_name = "vivcam"; - idx = <6>; //gc02m1b - csi_idx = <0>; //<0>=CSI2 - mode_idx = <0>; - path_type = "SENSOR_1600x1200_RAW10_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <1>; - path_type = "ISP_MI_PATH_SP2_BP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <16>; - frame_count = <3>; - }; - }; - }; -}; - -&video3{ - vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0] - channel0 { - sensor0 { - subdev_name = "vivcam"; - idx = <0>; //sc2310 - csi_idx = <0>; //<0>=CSI2 - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - sensor1 { - subdev_name = "vivcam"; - idx = <6>; //gc02m1b - csi_idx = <0>; //<0>=CSI2 - mode_idx = <0>; - path_type = "SENSOR_1600x1200_RAW10_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <1>; - path_type = "ISP_MI_PATH_MP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dw { - subdev_name = "dw"; - idx = <0>; - path_type = "DW_DWE_VSE0"; - dw_dst_depth = <2>; - }; - }; - channel1 { - sensor0 { - subdev_name = "vivcam"; - idx = <0>; //sc2310 - csi_idx = <0>; //<0>=CSI2 - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - sensor1 { - subdev_name = "vivcam"; - idx = <6>; //gc02m1b - csi_idx = <0>; //<0>=CSI2 - mode_idx = <0>; - path_type = "SENSOR_1600x1200_RAW10_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <1>; - path_type = "ISP_MI_PATH_MP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dw { - subdev_name = "dw"; - idx = <0>; - path_type = "DW_DWE_VSE1"; - dw_dst_depth = <2>; - }; - }; - channel2 { - sensor0 { - subdev_name = "vivcam"; - idx = <0>; //sc2310 - csi_idx = <0>; //<0>=CSI2 - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - sensor1 { - subdev_name = "vivcam"; - idx = <6>; //gc02m1b - csi_idx = <0>; //<0>=CSI2 - mode_idx = <0>; - path_type = "SENSOR_1600x1200_RAW10_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <1>; - path_type = "ISP_MI_PATH_MP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dw { - subdev_name = "dw"; - idx = <0>; - path_type = "DW_DWE_VSE2"; - dw_dst_depth = <2>; - }; - }; -}; - -&video4{ - vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0] - channel0 { - sensor0 { - subdev_name = "vivcam"; - idx = <0>; //sc2310 - csi_idx = <0>; //<0>=CSI2 - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - sensor1 { - subdev_name = "vivcam"; - idx = <6>; //gc02m1b - csi_idx = <0>; //<0>=CSI2 - mode_idx = <0>; - path_type = "SENSOR_1600x1200_RAW10_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <1>; - path_type = "ISP_MI_PATH_PP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dsp { - subdev_name = "dsp"; - idx = <0>; - path_type = "DSP_PATH_ISP_RY"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - ry { - subdev_name = "ry"; - idx = <0>; - path_type = "ISP_RY_MI_PATH_MP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - }; - channel1 { - sensor0 { - subdev_name = "vivcam"; - idx = <0>; //sc2310 - csi_idx = <0>; //<0>=CSI2 - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - sensor1 { - subdev_name = "vivcam"; - idx = <6>; //gc02m1b - csi_idx = <0>; //<0>=CSI2 - mode_idx = <0>; - path_type = "SENSOR_1600x1200_RAW10_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <1>; - path_type = "ISP_MI_PATH_PP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dsp { - subdev_name = "dsp"; - idx = <0>; - path_type = "DSP_PATH_ISP_RY"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - ry { - subdev_name = "ry"; - idx = <0>; - path_type = "ISP_RY_MI_PATH_SP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - }; - channel2 { - sensor0 { - subdev_name = "vivcam"; - idx = <0>; //sc2310 - csi_idx = <0>; //<0>=CSI2 - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - sensor1 { - subdev_name = "vivcam"; - idx = <6>; //gc02m1b - csi_idx = <0>; //<0>=CSI2 - mode_idx = <0>; - path_type = "SENSOR_1600x1200_RAW10_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <1>; - path_type = "ISP_MI_PATH_PP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dsp { - subdev_name = "dsp"; - idx = <0>; - path_type = "DSP_PATH_ISP_RY"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - ry { - subdev_name = "ry"; - idx = <0>; - path_type = "ISP_RY_MI_PATH_SP2_BP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - }; -}; - -&video5{ - vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0] - channel0 { - sensor0 { - subdev_name = "vivcam"; - idx = <0>; //sc2310 - csi_idx = <0>; //<0>=CSI2 - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - sensor1 { - subdev_name = "vivcam"; - idx = <6>; //gc02m1b - csi_idx = <0>; //<0>=CSI2 - mode_idx = <0>; - path_type = "SENSOR_1600x1200_RAW10_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <1>; - path_type = "ISP_MI_PATH_PP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dsp { - subdev_name = "dsp"; - idx = <0>; - path_type = "DSP_PATH_ISP_RY"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - ry { - subdev_name = "ry"; - idx = <0>; - path_type = "ISP_RY_MI_PATH_MP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dw { - subdev_name = "dw"; - idx = <0>; - path_type = "DW_DWE_VSE0"; - dw_dst_depth = <2>; - }; - }; - channel1 { - sensor0 { - subdev_name = "vivcam"; - idx = <0>; //sc2310 - csi_idx = <0>; //<0>=CSI2 - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - sensor1 { - subdev_name = "vivcam"; - idx = <6>; //gc02m1b - csi_idx = <0>; //<0>=CSI2 - mode_idx = <0>; - path_type = "SENSOR_1600x1200_RAW10_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <1>; - path_type = "ISP_MI_PATH_PP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dsp { - subdev_name = "dsp"; - idx = <0>; - path_type = "DSP_PATH_ISP_RY"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - ry { - subdev_name = "ry"; - idx = <0>; - path_type = "ISP_RY_MI_PATH_MP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dw { - subdev_name = "dw"; - idx = <0>; - path_type = "DW_DWE_VSE1"; - dw_dst_depth = <2>; - }; - }; - channel2 { - sensor0 { - subdev_name = "vivcam"; - idx = <0>; //sc2310 - csi_idx = <0>; //<0>=CSI2 - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - sensor1 { - subdev_name = "vivcam"; - idx = <6>; //gc02m1b - csi_idx = <0>; //<0>=CSI2 - mode_idx = <0>; - path_type = "SENSOR_1600x1200_RAW10_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <1>; - path_type = "ISP_MI_PATH_PP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dsp { - subdev_name = "dsp"; - idx = <0>; - path_type = "DSP_PATH_ISP_RY"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - ry { - subdev_name = "ry"; - idx = <0>; - path_type = "ISP_RY_MI_PATH_MP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dw { - subdev_name = "dw"; - idx = <0>; - path_type = "DW_DWE_VSE2"; - dw_dst_depth = <2>; - }; - }; -}; - -&video6{ - vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1] - channel0 { - sensor0 { - subdev_name = "vivcam"; - idx = <4>; //sc132gs - csi_idx = <2>; //<2>=CSI2X2_A - flash_led_idx = <0>; - mode_idx = <0>; - path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER"; - }; - dsp{ - output { - max_width = <1080>; - max_height = <1280>; - bit_per_pixel = <16>; - frame_count = <3>; - }; - }; - }; - channel1 { - sensor0 { - subdev_name = "vivcam"; - idx = <4>; //sc132gs - csi_idx = <2>; //<2>=CSI2X2_A - flash_led_idx = <0>; - mode_idx = <0>; - path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER"; - }; - dsp{ - output { - max_width = <1080>; - max_height = <1280>; - bit_per_pixel = <16>; - frame_count = <3>; - }; - }; - }; -}; - -&video7{ - channel0 { - sensor0 { - subdev_name = "vivcam"; - idx = <2>; //<2>=vivcam2 : gc5035 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <3>; - path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER// - }; - sensor1 { - subdev_name = "vivcam"; - idx = <3>; //<3>=vivcam3 : sc2310 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <0>; - path_type = "ISP_MI_PATH_PP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dsp { - subdev_name = "dsp"; - idx = <1>; - path_type = "DSP_PATH_ISP_RY"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - ry { - subdev_name = "ry"; - idx = <0>; - path_type = "ISP_RY_MI_PATH_MP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dw { - subdev_name = "dw"; - idx = <0>; - path_type = "DW_DWE_VSE0"; - dw_dst_depth = <2>; - }; - }; - channel1 { - sensor0 { - subdev_name = "vivcam"; - idx = <2>; //<2>=vivcam2 : gc5035 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <3>; - path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER// - }; - sensor1 { - subdev_name = "vivcam"; - idx = <3>; //<3>=vivcam3 : sc2310 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <0>; - path_type = "ISP_MI_PATH_PP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dsp { - subdev_name = "dsp"; - idx = <1>; - path_type = "DSP_PATH_ISP_RY"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - ry { - subdev_name = "ry"; - idx = <0>; - path_type = "ISP_RY_MI_PATH_MP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dw { - subdev_name = "dw"; - idx = <0>; - path_type = "DW_DWE_VSE1"; - dw_dst_depth = <2>; - }; - }; - channel2 { - sensor0 { - subdev_name = "vivcam"; - idx = <2>; //<2>=vivcam2 : gc5035 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <3>; - path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER// - }; - sensor1 { - subdev_name = "vivcam"; - idx = <3>; //<3>=vivcam3 : sc2310 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <0>; - path_type = "ISP_MI_PATH_PP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dsp { - subdev_name = "dsp"; - idx = <1>; - path_type = "DSP_PATH_ISP_RY"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - ry { - subdev_name = "ry"; - idx = <0>; - path_type = "ISP_RY_MI_PATH_MP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - dw { - subdev_name = "dw"; - idx = <0>; - path_type = "DW_DWE_VSE2"; - dw_dst_depth = <2>; - }; - }; -}; - - -&video8{ - vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1] - channel0 { - sensor0 { - subdev_name = "vivcam"; - idx = <2>; //<2>=vivcam2 : gc5035 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <3>; - path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER// - }; - sensor1 { - subdev_name = "vivcam"; - idx = <3>; //<3>=vivcam3 : sc2310 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - }; - dsp { - subdev_name = "dsp"; - idx = <0>; - path_type = "DSP_PATH_VIPRE_DDR"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - }; -}; - -&video9{ - channel0 { - sensor0 { - subdev_name = "vivcam"; - idx = <4>; //sc132gs - csi_idx = <2>; //<2>=CSI2X2_A - mode_idx = <0>; - path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER"; - }; - dsp{ - output { - max_width = <1080>; - max_height = <1280>; - bit_per_pixel = <16>; - frame_count = <3>; - }; - }; - }; -}; - - -&video10{ - channel0 { - sensor0 { - subdev_name = "vivcam"; - idx = <2>; //<2>=vivcam2 : gc5035 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <1>; - path_type = "SENSOR_1080P_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER// - skip_init = <1>; - }; - sensor1 { - subdev_name = "vivcam"; - idx = <3>; //<3>=vivcam3 : sc2310 - csi_idx = <1>; //<1>=CSI2X2_B - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - skip_init = <1>; - }; - }; -}; - -&video11{ - channel0 { - channel_id = <0>; - status = "okay"; - sensor0 { - subdev_name = "vivcam"; - idx = <4>; //sc132gs - csi_idx = <2>; //<2>=CSI2X2_A - flash_led_idx = <0>; - mode_idx = <0>; - path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER"; - }; - isp { - subdev_name = "isp"; - idx = <0>; - path_type = "ISP_MI_PATH_MP"; - output { - max_width = <1920>; - max_height = <1088>; - bit_per_pixel = <12>; - frame_count = <3>; - }; - }; - }; -}; - -&video12{ // TUNINGTOOL - channel0 { // CSI2 - sensor0 { - subdev_name = "vivcam"; - idx = <0>; //sc2310 - csi_idx = <0>; //<0>=CSI2 - mode_idx = <1>; - path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER"; - skip_init = <1>; - }; - sensor1 { - subdev_name = "vivcam"; - idx = <6>; //gc02m1b - csi_idx = <0>; //<0>=CSI2 - mode_idx = <0>; - path_type = "SENSOR_1600x1200_RAW10_LINER"; - skip_init = <1>; - }; - }; -}; - &trng { status = "disabled"; }; @@ -2102,15 +674,15 @@ }; &vdec { - status = "okay"; + status = "disabled"; }; &venc { - status = "okay"; + status = "disabled"; }; &isp_venc_shake { - status = "okay"; + status = "disabled"; }; &vidmem { @@ -2119,7 +691,7 @@ }; &gpu { - status = "okay"; + status = "disabled"; }; &cpus { @@ -2140,6 +712,7 @@ >; }; c910_1: cpu@1 { + status = "disabled"; operating-points = < /* kHz uV */ 300000 650000 @@ -2156,7 +729,7 @@ >; }; c910_2: cpu@2 { - + status = "disabled"; operating-points = < /* kHz uV */ 300000 650000 @@ -2173,7 +746,7 @@ >; }; c910_3: cpu@3 { - + status = "disabled"; operating-points = < /* kHz uV */ 300000 650000 @@ -2190,3 +763,121 @@ >; }; }; + +&thermal_zones { + cpu-thermal-zone { + status = "disabled"; + }; +}; + +&dummy_clock_apb { + clock-frequency = <50000000>; +}; + +&uart0 { + clocks = <&dummy_clock_apb>; +}; +&uart1 { + clocks = <&dummy_clock_apb>; +}; +&uart2 { + clocks = <&dummy_clock_apb>; +}; +&uart3 { + clocks = <&dummy_clock_apb>; +}; +&uart4 { + clocks = <&dummy_clock_apb>; +}; +&uart5 { + clocks = <&dummy_clock_apb>; +}; + +&usb3_drd { + status = "disabled"; +}; + +&usb { + status = "disabled"; +}; + +&dspsys_reg { + status = "disabled"; +}; + +&audio_ioctrl { + status = "disabled"; +}; + +&audio_cpr { + status = "disabled"; +}; + +&timer0 { + clock-frequency = <50000000>; +}; + +&timer1 { + clock-frequency = <50000000>; +}; + +&timer2 { + clock-frequency = <50000000>; +}; + +&timer3 { + clock-frequency = <50000000>; +}; + +&g2d { + status = "disabled"; +}; + +&vosys_reg { + status = "disabled"; +}; + +&dmac2 { + status = "disabled"; +}; + +&sdhci1 { + status = "disabled"; +}; + +&pvt { + status = "disabled"; +}; + +&audio_i2c0 { + status = "disabled"; +}; + +&csia_reg { + status = "disabled"; +}; + +&visys_clk_gate { /* VI_SYSREG_R */ + status = "disabled"; +}; + +&vpsys_clk_gate { /* VP_SYSREG_R */ + status = "disabled"; +}; + +&vosys_clk_gate { /* VO_SYSREG_R */ + status = "disabled"; +}; + +&dspsys_clk_gate { + status = "disabled"; +}; + +&watchdog0 { + status = "disabled"; +}; + +&watchdog1 { + status = "disabled"; +}; + diff --git a/arch/riscv/boot/dts/thead/fire.dtsi b/arch/riscv/boot/dts/thead/fire.dtsi index 0417752b4..55020f1dd 100644 --- a/arch/riscv/boot/dts/thead/fire.dtsi +++ b/arch/riscv/boot/dts/thead/fire.dtsi @@ -23,7 +23,6 @@ aliases { ethernet0 = &gmac0; - ethernet1 = &gmac1; gpio0 = &gpio0; gpio1 = &gpio1; gpio2 = &gpio2; @@ -93,7 +92,7 @@ }; }; - thermal-zones { + thermal_zones: thermal-zones { cpu-thermal-zone { polling-delay-passive = <250>; polling-delay = <2000>; @@ -166,8 +165,6 @@ <&clk CPU_PLL0_FOUTPOSTDIV>; clock-names = "c910_cclk", "c910_cclk_i0", "cpu_pll1_foutpostdiv", "cpu_pll0_foutpostdiv"; - dvdd-supply = <&dvdd_cpu_reg>; - dvddm-supply = <&dvddm_cpu_reg>; cpu0_intc: interrupt-controller { #interrupt-cells = <1>; @@ -178,7 +175,7 @@ c910_1: cpu@1 { device_type = "cpu"; reg = <1>; - status = "okay"; + status = "disabled"; compatible = "riscv"; riscv,isa = "rv64imafdcvsu"; mmu-type = "riscv,sv39"; @@ -212,8 +209,6 @@ <&clk CPU_PLL0_FOUTPOSTDIV>; clock-names = "c910_cclk", "c910_cclk_i0", "cpu_pll1_foutpostdiv", "cpu_pll0_foutpostdiv"; - dvdd-supply = <&dvdd_cpu_reg>; - dvddm-supply = <&dvddm_cpu_reg>; cpu1_intc: interrupt-controller { #interrupt-cells = <1>; @@ -224,7 +219,7 @@ c910_2: cpu@2 { device_type = "cpu"; reg = <2>; - status = "okay"; + status = "disabled"; compatible = "riscv"; riscv,isa = "rv64imafdcvsu"; mmu-type = "riscv,sv39"; @@ -258,8 +253,6 @@ <&clk CPU_PLL0_FOUTPOSTDIV>; clock-names = "c910_cclk", "c910_cclk_i0", "cpu_pll1_foutpostdiv", "cpu_pll0_foutpostdiv"; - dvdd-supply = <&dvdd_cpu_reg>; - dvddm-supply = <&dvddm_cpu_reg>; cpu2_intc: interrupt-controller { #interrupt-cells = <1>; @@ -270,7 +263,7 @@ c910_3: cpu@3 { device_type = "cpu"; reg = <3>; - status = "okay"; + status = "disabled"; compatible = "riscv"; riscv,isa = "rv64imafdcvsu"; mmu-type = "riscv,sv39"; @@ -304,8 +297,6 @@ <&clk CPU_PLL0_FOUTPOSTDIV>; clock-names = "c910_cclk", "c910_cclk_i0", "cpu_pll1_foutpostdiv", "cpu_pll0_foutpostdiv"; - dvdd-supply = <&dvdd_cpu_reg>; - dvddm-supply = <&dvddm_cpu_reg>; cpu3_intc: interrupt-controller { #interrupt-cells = <1>; @@ -315,7 +306,7 @@ }; }; - display-subsystem { + display_subsystem: display-subsystem { compatible = "verisilicon,display-subsystem"; ports = <&dpu_disp0>, <&dpu_disp1>; status = "disabled"; @@ -421,7 +412,7 @@ dummy_clock_apb: apb-clock@0 { compatible = "fixed-clock"; reg = <0>; /* Not address, just for index */ - clock-frequency = <62500000>; + clock-frequency = <50000000>; clock-output-names = "dummy_clock_apb"; #clock-cells = <0>; }; @@ -469,7 +460,7 @@ dummy_clock_dphy_ref: dphy-ref-clock@7 { compatible = "fixed-clock"; reg = <7>; /* Not address, just for index */ - clock-frequency = <24000000>; + clock-frequency = <40000000>; clock-output-names = "dummy_clock_dphy_ref"; #clock-cells = <0>; }; @@ -477,7 +468,7 @@ dummy_clock_dphy_cfg: dphy-cfg-clock@8 { compatible = "fixed-clock"; reg = <8>; /* Not address, just for index */ - clock-frequency = <24000000>; + clock-frequency = <40000000>; clock-output-names = "dummy_clock_dphy_cfg"; #clock-cells = <0>; }; @@ -485,7 +476,7 @@ dummy_clock_dpu_pixel0: dpu-pixel-clock@9 { compatible = "fixed-clock"; reg = <9>; - clock-frequency = <72000000>; + clock-frequency = <25200000>; clock-output-names = "dummy_clock_dpu_pixel0"; #clock-cells = <0>; }; @@ -493,7 +484,7 @@ dummy_clock_dpu_pixel1: dpu-pixel-clock@10 { compatible = "fixed-clock"; reg = <10>; - clock-frequency = <74250000>; + clock-frequency = <25200000>; clock-output-names = "dummy_clock_dpu_pixel1"; #clock-cells = <0>; }; @@ -525,7 +516,7 @@ dummy_clock_eip: eip-clock@14 { compatible = "fixed-clock"; reg = <14>; /* Not address, just for index */ - clock-frequency = <400000000>; + clock-frequency = <30000000>; clock-output-names = "dummy_clock_eip"; #clock-cells = <0>; }; @@ -533,7 +524,7 @@ dummy_clock_spi: spi-clock@15 { compatible = "fixed-clock"; reg = <15>; /* Not address, just for index */ - clock-frequency = <396000000>; + clock-frequency = <50000000>; clock-output-names = "dummy_clock_spi"; #clock-cells = <0>; }; @@ -541,7 +532,7 @@ dummy_clock_qspi: spi-clock@16 { compatible = "fixed-clock"; reg = <15>; /* Not address, just for index */ - clock-frequency = <792000000>; + clock-frequency = <50000000>; clock-output-names = "dummy_clock_qspi"; #clock-cells = <0>; }; @@ -549,7 +540,7 @@ dummy_gmac_ahb: gmac-ahb-clock@16 { compatible = "fixed-clock"; reg = <16>; - clock-frequency = <250000000>; + clock-frequency = <50000000>; clock-output-names = "dummy_gmac_ahb"; #clock-cells = <0>; }; @@ -557,7 +548,7 @@ dummy_clock_gmac: gmac-clock@17 { compatible = "fixed-clock"; reg = <17>; - clock-frequency = <500000000>; + clock-frequency = <50000000>; clock-output-names = "dummy_clock_gmac"; #clock-cells = <0>; }; @@ -565,7 +556,7 @@ dummy_clock_sdhci: sdhci-clock@18 { compatible = "fixed-clock"; reg = <18>; /* Not address, just for index */ - clock-frequency = <198000000>; + clock-frequency = <50000000>; clock-output-names = "dummy_clock_sdhci"; #clock-cells = <0>; }; @@ -573,16 +564,16 @@ dummy_clock_aonsys_clk: aonsys-clk-clock@19 { compatible = "fixed-clock"; reg = <19>; /* Not address, just for index */ - clock-frequency = <73728000>; + clock-frequency = <24000000>; clock-output-names = "dummy_clock_aonsys_clk"; #clock-cells = <0>; }; - dummy_clock_uart_sclk: uart-sclk-clock@20 { + dummy_clock_uart: uart-sclk-clock@20 { compatible = "fixed-clock"; reg = <20>; /* Not address, just for index */ - clock-frequency = <100000000>; - clock-output-names = "dummy_clock_uart_sclk"; + clock-frequency = <50000000>; + clock-output-names = "dummy_clock_uart"; #clock-cells = <0>; }; @@ -592,6 +583,20 @@ clock-frequency = <24000000>; #clock-cells = <0>; }; + + dummy_clock_vipre: vipre-dummy-clock@22 { + compatible = "fixed-clock"; + reg = <22>; + clock-frequency = <13000000>; + #clock-cells = <0>; + }; + + dummy_clock_vpsys: vpsys-dummy-clock@23 { + compatible = "fixed-clock"; + reg = <23>; + clock-frequency = <24000000>; + #clock-cells = <0>; + }; }; iso7816: iso7816-card@fff7f30000 { @@ -644,9 +649,6 @@ reg = <0xb0 6>; }; - gmac1_mac_address: mac-address@184 { - reg = <0xb8 6>; - }; }; misc_sysreg: misc_sysreg@ffec02c000 { @@ -797,9 +799,8 @@ compatible = "thead,pwm-light"; reg = <0xff 0xec01c000 0x0 0x4000>; #pwm-cells = <2>; - clocks = <&clk CLKGEN_PWM_PCLK>, - <&clk CLKGEN_PWM_CCLK>; - clock-names = "pclk", "cclk"; + clocks = <&dummy_clock_apb>; + clock-names = "pwm"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm>; }; @@ -809,7 +810,7 @@ reg = <0xff 0xefc32000 0x0 0x14>; clocks = <&dummy_clock_apb>; clock-names = "timer"; - clock-frequency = <62500000>; + clock-frequency = <50000000>; interrupts = <16>; interrupt-parent = <&intc>; status = "okay"; @@ -820,7 +821,7 @@ reg = <0xff 0xefc32014 0x0 0x14>; clocks = <&dummy_clock_apb>; clock-names = "timer"; - clock-frequency = <62500000>; + clock-frequency = <50000000>; interrupts = <17>; interrupt-parent = <&intc>; status = "okay"; @@ -831,7 +832,7 @@ reg = <0xff 0xefc32028 0x0 0x14>; clocks = <&dummy_clock_apb>; clock-names = "timer"; - clock-frequency = <62500000>; + clock-frequency = <50000000>; interrupts = <18>; interrupt-parent = <&intc>; status = "disabled"; @@ -842,7 +843,7 @@ reg = <0xff 0xefc3203c 0x0 0x14>; clocks = <&dummy_clock_apb>; clock-names = "timer"; - clock-frequency = <62500000>; + clock-frequency = <50000000>; interrupts = <19>; interrupt-parent = <&intc>; status = "disabled"; @@ -851,7 +852,7 @@ padctrl_aosys: padctrl-aosys@fffff4a000 { compatible = "thead,light-fm-aon-pinctrl"; reg = <0xff 0xfff4a000 0x0 0x2000>; - status = "okay"; + status = "disabled"; }; timer4: timer@ffffc33000 { @@ -859,7 +860,7 @@ reg = <0xff 0xffc33000 0x0 0x14>; clocks = <&dummy_clock_apb>; clock-names = "timer"; - clock-frequency = <62500000>; + clock-frequency = <50000000>; interrupts = <20>; interrupt-parent = <&intc>; status = "disabled"; @@ -870,7 +871,7 @@ reg = <0xff 0xffc33014 0x0 0x14>; clocks = <&dummy_clock_apb>; clock-names = "timer"; - clock-frequency = <62500000>; + clock-frequency = <50000000>; interrupts = <21>; interrupt-parent = <&intc>; status = "disabled"; @@ -881,7 +882,7 @@ reg = <0xff 0xffc33028 0x0 0x14>; clocks = <&dummy_clock_apb>; clock-names = "timer"; - clock-frequency = <62500000>; + clock-frequency = <50000000>; interrupts = <22>; interrupt-parent = <&intc>; status = "disabled"; @@ -892,7 +893,7 @@ reg = <0xff 0xffc3303c 0x0 0x14>; clocks = <&dummy_clock_apb>; clock-names = "timer"; - clock-frequency = <62500000>; + clock-frequency = <50000000>; interrupts = <23>; interrupt-parent = <&intc>; status = "disabled"; @@ -903,7 +904,7 @@ reg = <0xff 0xe7014000 0x0 0x4000>; interrupt-parent = <&intc>; interrupts = <36>; - clocks = <&clk CLKGEN_UART0_SCLK>; + clocks = <&dummy_clock_uart>; clock-names = "baudclk"; reg-shift = <2>; reg-io-width = <4>; @@ -916,7 +917,7 @@ reg = <0xff 0xe7f00000 0x0 0x4000>; interrupt-parent = <&intc>; interrupts = <37>; - clocks = <&clk CLKGEN_UART1_SCLK>; + clocks = <&dummy_clock_uart>; clock-names = "baudclk"; reg-shift = <2>; reg-io-width = <4>; @@ -929,7 +930,7 @@ reg = <0xff 0xec010000 0x0 0x4000>; interrupt-parent = <&intc>; interrupts = <38>; - clocks = <&clk CLKGEN_UART2_SCLK>; + clocks = <&dummy_clock_uart>; clock-names = "baudclk"; reg-shift = <2>; reg-io-width = <4>; @@ -942,7 +943,7 @@ reg = <0xff 0xe7f04000 0x0 0x4000>; interrupt-parent = <&intc>; interrupts = <39>; - clocks = <&clk CLKGEN_UART3_SCLK>; + clocks = <&dummy_clock_uart>; clock-names = "baudclk"; reg-shift = <2>; reg-io-width = <4>; @@ -955,7 +956,7 @@ reg = <0xff 0xf7f08000 0x0 0x4000>; interrupt-parent = <&intc>; interrupts = <40>; - clocks = <&clk CLKGEN_UART4_SCLK>; + clocks = <&dummy_clock_uart>; clock-names = "baudclk"; reg-shift = <2>; reg-io-width = <4>; @@ -968,7 +969,7 @@ reg = <0xff 0xf7f0c000 0x0 0x4000>; interrupt-parent = <&intc>; interrupts = <41>; - clocks = <&clk CLKGEN_UART5_SCLK>; + clocks = <&dummy_clock_uart>; clock-names = "baudclk"; reg-shift = <2>; reg-io-width = <4>; @@ -1030,9 +1031,9 @@ interrupt-parent = <&intc>; interrupts = <101>; interrupt-names = "irq_2d"; - clocks = <&vpsys_clk_gate LIGHT_VPSYS_G2D_PCLK>, - <&vpsys_clk_gate LIGHT_VPSYS_G2D_ACLK>, - <&vpsys_clk_gate LIGHT_VPSYS_G2D_CCLK>; + clocks = <&dummy_clock_vpsys>, + <&dummy_clock_vpsys>, + <&dummy_clock_vpsys>; clock-names = "pclk", "aclk", "cclk"; status = "okay"; }; @@ -1046,11 +1047,11 @@ compatible = "thead,light-mipi-dphy"; regmap = <&dsi0>; vosys-regmap = <&vosys_reg>; - clocks = <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI0_REFCLK>, - <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI0_CFG_CLK>, - <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI0_PCLK>, - <&clk OSC_24M>, - <&clk OSC_24M>; + clocks = <&dummy_clock_dphy_ref>, + <&dummy_clock_dphy_cfg>, + <&dummy_clock_dphy_ref>, + <&dummy_clock_dpu_pixel0>, + <&dummy_clock_dphy_cfg>; clock-names = "refclk", "cfgclk", "pclk", "prefclk", "pcfgclk"; #phy-cells = <0>; }; @@ -1060,8 +1061,8 @@ regmap = <&dsi0>; interrupt-parent = <&intc>; interrupts = <129>; - clocks = <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI0_PCLK>, - <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI0_PIXCLK>; + clocks = <&dummy_clock_dphy_cfg>, + <&dummy_clock_dpu_pixel0>; clock-names = "pclk", "pixclk"; phys = <&dphy_0>; phy-names = "dphy"; @@ -1079,11 +1080,11 @@ compatible = "thead,light-mipi-dphy"; regmap = <&dsi1>; vosys-regmap = <&vosys_reg>; - clocks = <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI1_REFCLK>, - <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI1_CFG_CLK>, - <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI1_PCLK>, - <&clk OSC_24M>, - <&clk OSC_24M>; + clocks = <&dummy_clock_dphy_ref>, + <&dummy_clock_dphy_cfg>, + <&dummy_clock_dphy_ref>, + <&dummy_clock_dpu_pixel1>, + <&dummy_clock_dphy_cfg>; clock-names = "refclk", "cfgclk", "pclk", "prefclk", "pcfgclk"; #phy-cells = <0>; }; @@ -1093,8 +1094,8 @@ regmap = <&dsi1>; interrupt-parent = <&intc>; interrupts = <129>; - clocks = <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI1_PCLK>, - <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI1_PIXCLK>; + clocks = <&dummy_clock_dphy_cfg>, + <&dummy_clock_dpu_pixel1>; clock-names = "pclk", "pixclk"; phys = <&dphy_1>; phy-names = "dphy"; @@ -1114,11 +1115,11 @@ reg = <0xff 0xef540000 0x0 0x40000>; interrupt-parent = <&intc>; interrupts = <111>; - clocks = <&vosys_clk_gate LIGHT_CLKGEN_HDMI_PCLK>, - <&vosys_clk_gate LIGHT_CLKGEN_HDMI_SFR_CLK>, - <&vosys_clk_gate LIGHT_CLKGEN_HDMI_CEC_CLK>, - <&vosys_clk_gate LIGHT_CLKGEN_HDMI_PIXCLK>, - <&vosys_clk_gate LIGHT_CLKGEN_HDMI_I2S_CLK>; + clocks = <&dummy_clock_dpu_pixel0>, + <&dummy_clock_dpu_pixel0>, + <&dummy_clock_dpu_pixel0>, + <&dummy_clock_dpu_pixel0>, + <&dummy_clock_dpu_pixel0>; clock-names = "iahb", "isfr", "cec", "pixclk", "i2s"; reg-io-width = <4>; phy_version = <301>; @@ -1135,19 +1136,19 @@ <0xff 0xef630010 0x0 0x60>; interrupt-parent = <&intc>; interrupts = <93>; - clocks = <&vosys_clk_gate LIGHT_CLKGEN_DPU_CCLK>, - <&vosys_clk_gate LIGHT_CLKGEN_DPU_PIXCLK0>, - <&vosys_clk_gate LIGHT_CLKGEN_DPU_PIXCLK1>, - <&vosys_clk_gate LIGHT_CLKGEN_DPU_ACLK>, - <&vosys_clk_gate LIGHT_CLKGEN_DPU_HCLK>, - <&clk DPU0_PLL_DIV_CLK>, - <&clk DPU1_PLL_DIV_CLK>, - <&clk DPU0_PLL_FOUTPOSTDIV>, - <&clk DPU1_PLL_FOUTPOSTDIV>; + clocks = <&dummy_clock_dpu_pixel0>, + <&dummy_clock_dpu_pixel0>, + <&dummy_clock_dpu_pixel0>, + <&dummy_clock_dpu_pixel0>, + <&dummy_clock_dpu_pixel0>, + <&dummy_clock_dpu_pixel0>, + <&dummy_clock_dpu_pixel0>, + <&dummy_clock_dpu_pixel0>, + <&dummy_clock_dpu_pixel0>; clock-names = "core_clk", "pix_clk0", "pix_clk1", - "axi_clk", "cfg_clk", "pixclk0", - "pixclk1", "dpu0_pll_foutpostdiv", - "dpu1_pll_foutpostdiv"; + "axi_clk", "cfg_clk", "pixclk0", + "pixclk1", "dpu0_pll_foutpostdiv", + "dpu1_pll_foutpostdiv"; status = "disabled"; dpu_disp0: port@0 { @@ -1172,7 +1173,7 @@ reg = <0xff 0xefc30000 0x0 0x1000>; interrupt-parent = <&intc>; interrupts = <24>; - clocks = <&clk CLKGEN_WDT0_PCLK>; + clocks = <&dummy_clock_apb>; clock-names = "tclk"; resets = <&rst LIGHT_RESET_WDT0>; status = "okay"; @@ -1183,7 +1184,7 @@ reg = <0xff 0xefc31000 0x0 0x1000>; interrupt-parent = <&intc>; interrupts = <25>; - clocks = <&clk CLKGEN_WDT1_PCLK>; + clocks = <&dummy_clock_apb>; clock-names = "tclk"; resets = <&rst LIGHT_RESET_WDT1>; status = "okay"; @@ -1221,7 +1222,7 @@ dma-mask = <0xf 0xffffffff>; snps,usb3_lpm_capable; snps,usb_sofitpsync; - status = "okay"; + status = "disabled"; }; }; @@ -1323,7 +1324,7 @@ interrupt-parent = <&intc>; interrupts = <66>; interrupt-names = "macirq"; - clocks = <&clk CLKGEN_GMAC0_CCLK>; + clocks = <&dummy_clock_gmac>; clock-names = "gmac_pll_clk"; snps,pbl = <32>; snps,fixed-burst; @@ -1332,25 +1333,6 @@ nvmem-cell-names = "mac-address"; }; - gmac1: ethernet@ffe7060000 { - compatible = "thead,light-dwmac"; - reg = <0xff 0xe7060000 0x0 0x2000 - 0xff 0xec00401c 0x0 0x4 - 0xff 0xec004020 0x0 0x4 - 0xff 0xec004000 0x0 0x1c>; - reg-names = "gmac", "phy_if_reg", "txclk_dir_reg", "clk_mgr_reg"; - interrupt-parent = <&intc>; - interrupts = <67>; - interrupt-names = "macirq"; - clocks = <&clk CLKGEN_GMAC1_CCLK>; - clock-names = "gmac_pll_clk"; - snps,pbl = <32>; - snps,fixed-burst; - snps,axi-config = <&stmmac_axi_setup>; - nvmem-cells = <&gmac1_mac_address>; - nvmem-cell-names = "mac-address"; - }; - emmc: sdhci@ffe7080000 { compatible = "snps,dwcmshc-sdhci"; reg = <0xff 0xe7080000 0x0 0x10000 @@ -1397,11 +1379,11 @@ interrupts = <102>; interrupt-names = "gpuirq"; vosys-regmap = <&vosys_reg>; - power-domains = <&pd LIGHT_AON_GPU_PD>; - clocks = <&vosys_clk_gate LIGHT_CLKGEN_GPU_CORE_CLK>, - <&vosys_clk_gate LIGHT_CLKGEN_GPU_CFG_ACLK>; - clock-names = "cclk", "aclk"; - gpu_clk_rate = <18000000>; + //power-domains = <&pd LIGHT_AON_GPU_PD>; + clocks = <&dummy_clock_gpu>, + <&dummy_clock_gpu>; + clock-names = "cclk", "aclk"; + gpu_clk_rate = <18000000>; dma-mask = <0xf 0xffffffff>; status = "disabled"; }; @@ -1411,10 +1393,10 @@ reg = <0xff 0xecc00000 0x0 0x8000>; interrupt-parent = <&intc>; interrupts = <131>; - power-domains = <&pd LIGHT_AON_VDEC_PD>; - clocks = <&vpsys_clk_gate LIGHT_VPSYS_VDEC_ACLK>, - <&vpsys_clk_gate LIGHT_VPSYS_VDEC_CCLK>, - <&vpsys_clk_gate LIGHT_VPSYS_VDEC_PCLK>; + //power-domains = <&pd LIGHT_AON_VDEC_PD>; + clocks = <&dummy_clock_vpsys>, + <&dummy_clock_vpsys>, + <&dummy_clock_vpsys>; clock-names = "aclk", "cclk", "pclk"; status = "disabled"; }; @@ -1424,10 +1406,10 @@ reg = <0xff 0xecc10000 0x0 0x8000>; interrupt-parent = <&intc>; interrupts = <133>; - power-domains = <&pd LIGHT_AON_VENC_PD>; - clocks = <&vpsys_clk_gate LIGHT_VPSYS_VENC_ACLK>, - <&vpsys_clk_gate LIGHT_VPSYS_VENC_CCLK>, - <&vpsys_clk_gate LIGHT_VPSYS_VENC_PCLK>; + //power-domains = <&pd LIGHT_AON_VENC_PD>; + clocks = <&dummy_clock_vpsys>, + <&dummy_clock_vpsys>, + <&dummy_clock_vpsys>; clock-names = "aclk", "cclk", "pclk"; status = "disabled"; }; @@ -1443,7 +1425,7 @@ vidmem: vidmem@ffecc08000 { compatible = "thead,light-vidmem"; reg = <0xff 0xecc08000 0x0 0x1000>; - status = "disabled"; + status = "okay"; }; light_i2s: light_i2s@ffe7034000 { @@ -1532,7 +1514,7 @@ reg-names = "common", "ts", "pd", "vm"; clocks = <&dummy_clock_aonsys_clk>; #thermal-sensor-cells = <1>; - status = "okay"; + status = "disabled"; }; i2c0: i2c@ffe7f20000 { @@ -1660,10 +1642,10 @@ reg = <0xff 0xe4100000 0x0 0x10000>; interrupt-parent = <&intc>; interrupts = <117>,<118>; - clocks = <&visys_clk_gate LIGHT_CLKGEN_ISP0_ACLK>, - <&visys_clk_gate LIGHT_CLKGEN_ISP0_HCLK>, - <&visys_clk_gate LIGHT_CLKGEN_ISP0_PIXELCLK>, - <&visys_clk_gate LIGHT_CLKGEN_ISP0_CLK>; + clocks = <&dummy_clock_visys>, + <&dummy_clock_visys>, + <&dummy_clock_visys>, + <&dummy_clock_visys>; clock-names = "aclk", "hclk", "isp0_pclk", "cclk"; status = "disabled"; }; @@ -1673,11 +1655,11 @@ reg = <0xff 0xe4110000 0x0 0x10000>; interrupt-parent = <&intc>; interrupts = <120>,<121>; - clocks = <&visys_clk_gate LIGHT_CLKGEN_ISP0_ACLK>, - <&visys_clk_gate LIGHT_CLKGEN_ISP0_HCLK>, - <&visys_clk_gate LIGHT_CLKGEN_ISP0_PIXELCLK>, - <&visys_clk_gate LIGHT_CLKGEN_ISP1_CLK>, - <&visys_clk_gate LIGHT_CLKGEN_ISP1_PIXELCLK>; + clocks = <&dummy_clock_visys>, + <&dummy_clock_visys>, + <&dummy_clock_visys>, + <&dummy_clock_visys>, + <&dummy_clock_visys>; clock-names = "aclk", "hclk", "isp0_pclk", "cclk", "isp1_pclk"; status = "disabled"; }; @@ -1687,9 +1669,9 @@ reg = <0xff 0xe4120000 0x0 0x10000>; interrupt-parent = <&intc>; interrupts = <123>,<124>; - clocks = <&visys_clk_gate LIGHT_CLKGEN_ISP_RY_ACLK>, - <&visys_clk_gate LIGHT_CLKGEN_ISP_RY_HCLK>, - <&visys_clk_gate LIGHT_CLKGEN_ISP_RY_CCLK>; + clocks = <&dummy_clock_visys>, + <&dummy_clock_visys>, + <&dummy_clock_visys>; clock-names = "aclk", "hclk", "cclk"; status = "disabled"; }; @@ -1699,10 +1681,10 @@ reg = <0xff 0xe4130000 0x0 0x10000>; interrupt-parent = <&intc>; interrupts = <98>,<99>; - clocks = <&visys_clk_gate LIGHT_CLKGEN_DW200_ACLK>, - <&visys_clk_gate LIGHT_CLKGEN_DW200_HCLK>, - <&visys_clk_gate LIGHT_CLKGEN_DW200_CLK_VSE>, - <&visys_clk_gate LIGHT_CLKGEN_DW200_CLK_DWE>; + clocks = <&dummy_clock_visys>, + <&dummy_clock_visys>, + <&dummy_clock_visys>, + <&dummy_clock_visys>; clock-names = "aclk", "hclk", "vseclk", "dweclk"; status = "disabled"; }; @@ -1738,10 +1720,10 @@ interrupts = <128>; dphyglueiftester = <0x180>; sysreg_mipi_csi_ctrl = <0x140>; - clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PCLK>, - <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PIXCLK>, - <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_CFG_CLK>; - clock-names = "pclk", "pixclk", "cfg_clk"; + clocks = <&dummy_clock_visys>, + <&dummy_clock_visys>, + <&dummy_clock_visys>; + clock-names = "pclk", "pixclk", "cfg_clk"; phy_name = "CSI_4LANE"; status = "disabled"; }; @@ -1761,10 +1743,10 @@ sysreg_mipi_csi_ctrl = <0x148>; visys-regmap = <&visys_reg>; csia-regmap = <&csia_reg>; - clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PCLK>, - <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PIXCLK>, - <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK>; - clock-names = "pclk", "pixclk", "cfg_clk"; + clocks = <&dummy_clock_visys>, + <&dummy_clock_visys>, + <&dummy_clock_visys>; + clock-names = "pclk", "pixclk", "cfg_clk"; phy_name = "CSI_B"; status = "disabled"; }; @@ -1776,10 +1758,10 @@ interrupts = <127>; dphyglueiftester = <0x184>; sysreg_mipi_csi_ctrl = <0x144>; - clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PCLK>, - <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PIXCLK>, - <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK>; - clock-names = "pclk", "pixclk", "cfg_clk"; + clocks = <&dummy_clock_visys>, + <&dummy_clock_visys>, + <&dummy_clock_visys>; + clock-names = "pclk", "pixclk", "cfg_clk"; phy_name = "CSI_A"; status = "disabled"; }; @@ -1808,9 +1790,9 @@ reg = <0xff 0xe4030000 0x0 0x1000>; interrupt-parent = <&intc>; interrupts = <134>; - clocks = <&visys_clk_gate LIGHT_CLKGEN_VIPRE_ACLK>, - <&visys_clk_gate LIGHT_CLKGEN_VIPRE_PCLK>, - <&visys_clk_gate LIGHT_CLKGEN_VIPRE_PIXELCLK>; + clocks = <&dummy_clock_vipre>, + <&dummy_clock_vipre>, + <&dummy_clock_vipre>; clock-names ="aclk", "pclk", "pixclk"; status = "disabled"; }; @@ -2016,11 +1998,6 @@ }; }; - pmp: pmp@ffdc020000 { - compatible = "pmp"; - reg = <0xff 0xdc020000 0x0 0x1000>; - }; - mrvbr: mrvbr@ffff018050 { compatible = "mrvbr"; reg = <0xff 0xff019050 0x0 0x1000>; @@ -2056,6 +2033,7 @@ clock-names = "ipg"; icu_cpu_id = <0>; #mbox-cells = <2>; + status = "disabled"; }; trng: rng@ffff300000 { diff --git a/arch/riscv/boot/dts/thead/light-a-product.dts b/arch/riscv/boot/dts/thead/light-a-product.dts index 50b8f8049..8f66318ad 100644 --- a/arch/riscv/boot/dts/thead/light-a-product.dts +++ b/arch/riscv/boot/dts/thead/light-a-product.dts @@ -535,7 +535,7 @@ irq-gpios = <&gpio1_porta 8 0>; reset-gpios = <&gpio1_porta 7 0>; AVDD28-supply = <®_tp_pwr_en>; - touchscreen-size-x = <720>; + touchscreen-size-x = <800>; touchscreen-size-y = <1280>; }; }; @@ -552,7 +552,7 @@ irq-gpios = <&gpio1_porta 12 0>; reset-gpios = <&gpio1_porta 11 0>; AVDD28-supply = <®_tp1_pwr_en>; - touchscreen-size-x = <720>; + touchscreen-size-x = <800>; touchscreen-size-y = <1280>; }; }; diff --git a/arch/riscv/boot/dts/thead/light-a-val-audio-hdmi.dts b/arch/riscv/boot/dts/thead/light-a-val-audio-hdmi.dts new file mode 100644 index 000000000..1e1a0b42b --- /dev/null +++ b/arch/riscv/boot/dts/thead/light-a-val-audio-hdmi.dts @@ -0,0 +1,89 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2021 Alibaba Group Holding Limited. + */ + +/dts-v1/; + +#include "light-a-val.dts" + +/ { + display-subsystem { + status = "okay"; + }; +}; + +&dpu_enc1 { + ports { + /delete-node/ port@0; + }; +}; + +&disp1_out { + remote-endpoint = <&hdmi_tx_in>; +}; + +&dpu { + status = "okay"; +}; + +&hdmi_tx { + status = "okay"; + + port@0 { + /* input */ + hdmi_tx_in: endpoint { + remote-endpoint = <&disp1_out>; + }; + }; +}; + +&lightsound { + status = "okay"; + + simple-audio-card,dai-link@0 { /* I2S - AUDIO SYS CODEC 8156*/ + reg = <0>; + format = "i2s"; + cpu { + sound-dai = <&i2s0 0>; + }; + codec { + sound-dai = <&es8156_audio_codec>; + }; + }; + + simple-audio-card,dai-link@1 { /* I2S - AUDIO SYS CODEC 7210*/ + reg = <1>; + format = "i2s"; + cpu { + sound-dai = <&i2s3 0>; + }; + codec { + sound-dai = <&es7210_audio_codec>; + }; + }; + + simple-audio-card,dai-link@2 { /* I2S - HDMI */ + reg = <2>; + format = "i2s"; + cpu { + sound-dai = <&light_i2s 1>; + }; + codec { + sound-dai = <&dummy_codec 2>; + }; + }; +}; + +&light_i2s { + status = "okay"; +}; + +&i2s0 { + status = "okay"; +}; + +&i2s3 { + status = "okay"; +}; + diff --git a/arch/riscv/boot/dts/thead/light-a-val.dts b/arch/riscv/boot/dts/thead/light-a-val.dts index f04f036bf..1ab09f202 100644 --- a/arch/riscv/boot/dts/thead/light-a-val.dts +++ b/arch/riscv/boot/dts/thead/light-a-val.dts @@ -548,7 +548,7 @@ irq-gpios = <&gpio1_porta 8 0>; reset-gpios = <&gpio1_porta 7 0>; AVDD28-supply = <®_tp_pwr_en>; - touchscreen-size-x = <720>; + touchscreen-size-x = <800>; touchscreen-size-y = <1280>; }; }; @@ -582,7 +582,7 @@ irq-gpios = <&gpio1_porta 12 0>; reset-gpios = <&gpio1_porta 11 0>; AVDD28-supply = <®_tp1_pwr_en>; - touchscreen-size-x = <720>; + touchscreen-size-x = <800>; touchscreen-size-y = <1280>; }; }; @@ -1017,6 +1017,9 @@ DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>; AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>; i2c_bus = /bits/ 8 <4>; + i2c_reg_width = /bits/ 8 <2>; + i2c_data_width = /bits/ 8 <1>; + i2c_addr = /bits/ 8 <0x30>; status = "okay"; }; diff --git a/arch/riscv/boot/dts/thead/light-ant-discrete.dts b/arch/riscv/boot/dts/thead/light-ant-discrete.dts index f72802d3b..d2321a732 100644 --- a/arch/riscv/boot/dts/thead/light-ant-discrete.dts +++ b/arch/riscv/boot/dts/thead/light-ant-discrete.dts @@ -571,7 +571,7 @@ irq-gpios = <&gpio1_porta 8 0>; reset-gpios = <&gpio1_porta 7 0>; AVDD28-supply = <®_tp_pwr_en>; - touchscreen-size-x = <720>; + touchscreen-size-x = <800>; touchscreen-size-y = <1280>; }; diff --git a/arch/riscv/boot/dts/thead/light-ant-ref.dts b/arch/riscv/boot/dts/thead/light-ant-ref.dts index 682f78ec8..6ff86decf 100644 --- a/arch/riscv/boot/dts/thead/light-ant-ref.dts +++ b/arch/riscv/boot/dts/thead/light-ant-ref.dts @@ -578,7 +578,7 @@ irq-gpios = <&gpio1_porta 8 0>; reset-gpios = <&gpio1_porta 7 0>; AVDD28-supply = <®_tp_pwr_en>; - touchscreen-size-x = <720>; + touchscreen-size-x = <800>; touchscreen-size-y = <1280>; }; @@ -2048,18 +2048,11 @@ path_type = "SENSOR_1920X1088_30FPS_RAW12_LINER"; skip_init = <1>; }; - sensor1 { - subdev_name = "vivcam"; - idx = <6>; //gc02m1b - csi_idx = <1>; //<1>=CSI2_B - mode_idx = <0>; - path_type = "SENSOR_1600x1200_RAW10_LINER"; - skip_init = <1>; + dma { + path_type = "VIPRE_CSI1_ISP0"; }; }; - dma { - path_type = "VIPRE_CSI1_ISP0"; - }; + }; &video13{ diff --git a/arch/riscv/boot/dts/thead/light-b-product.dts b/arch/riscv/boot/dts/thead/light-b-product.dts index aa0ddfcc4..d20ba7bf0 100644 --- a/arch/riscv/boot/dts/thead/light-b-product.dts +++ b/arch/riscv/boot/dts/thead/light-b-product.dts @@ -591,7 +591,7 @@ irq-gpios = <&gpio1_porta 8 0>; reset-gpios = <&gpio1_porta 7 0>; AVDD28-supply = <®_tp_pwr_en>; - touchscreen-size-x = <720>; + touchscreen-size-x = <800>; touchscreen-size-y = <1280>; }; @@ -1054,6 +1054,9 @@ DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>; AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>; i2c_bus = /bits/ 8 <4>; + i2c_reg_width = /bits/ 8 <2>; + i2c_data_width = /bits/ 8 <1>; + i2c_addr = /bits/ 8 <0x30>; status = "okay"; }; diff --git a/arch/riscv/boot/dts/thead/light-crash.dts b/arch/riscv/boot/dts/thead/light-crash.dts index 2728eb8d6..be9178c10 100644 --- a/arch/riscv/boot/dts/thead/light-crash.dts +++ b/arch/riscv/boot/dts/thead/light-crash.dts @@ -327,7 +327,7 @@ irq-gpios = <&gpio1_porta 8 0>; reset-gpios = <&gpio1_porta 7 0>; AVDD28-supply = <®_tp_pwr_en>; - touchscreen-size-x = <720>; + touchscreen-size-x = <800>; touchscreen-size-y = <1280>; }; diff --git a/arch/riscv/boot/dts/thead/light-lpi4a-ddr2G.dts b/arch/riscv/boot/dts/thead/light-lpi4a-ddr2G.dts new file mode 100644 index 000000000..dd85d2932 --- /dev/null +++ b/arch/riscv/boot/dts/thead/light-lpi4a-ddr2G.dts @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2022 Alibaba Group Holding Limited. + */ + +#include "light-lpi4a.dts" + +/ { + model = "T-HEAD Light Lichee Pi 4A configuration for 2GB DDR board"; + compatible = "thead,light-val", "thead,light-lpi4a-ddr2G", "thead,light"; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x00000000 0x0 0x80000000>; + }; +}; + +&cmamem { + alloc-ranges = <0 0x64000000 0 0x14000000>; // [0x6400_0000 ~ 0x7800_0000] +}; diff --git a/arch/riscv/boot/dts/thead/light-lpi4a-ref.dts b/arch/riscv/boot/dts/thead/light-lpi4a-ref.dts new file mode 100644 index 000000000..38065e3b7 --- /dev/null +++ b/arch/riscv/boot/dts/thead/light-lpi4a-ref.dts @@ -0,0 +1,1516 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2021 Alibaba Group Holding Limited. + */ + +/dts-v1/; + +#include "light.dtsi" +#include +#include +#include "light-vi-devices.dtsi" +/ { + chosen { + bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000"; + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + status = "disabled"; + led0 { + label = "SYS_STATUS"; + gpios = <&gpio1_porta 15 0>; /* GPIO_ACTIVE_HIGH: 0 */ + default-state = "off"; + }; + }; + + display-subsystem { + status = "okay"; + }; + + lcd0_backlight: pwm-backlight@0 { + compatible = "pwm-backlight"; + pwms = <&pwm 0 5000000>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <7>; + }; + + light_iopmp: iopmp { + compatible = "thead,light-iopmp"; + + /* config#1: multiple valid regions */ + iopmp_emmc: IOPMP_EMMC { + regions = <0x000000 0x100000>, + <0x100000 0x200000>; + attr = <0xFFFFFFFF>; + dummy_slave= <0x800000>; + }; + + /* config#2: iopmp bypass */ + iopmp_sdio0: IOPMP_SDIO0 { + bypass_en; + }; + + /* config#3: iopmp default region set */ + iopmp_sdio1: IOPMP_SDIO1 { + attr = <0xFFFFFFFF>; + is_default_region; + }; + + iopmp_usb0: IOPMP_USB0 { + attr = <0xFFFFFFFF>; + is_default_region; + }; + + iopmp_ao: IOPMP_AO { + is_default_region; + }; + + iopmp_aud: IOPMP_AUD { + is_default_region; + }; + + iopmp_chip_dbg: IOPMP_CHIP_DBG { + is_default_region; + }; + + iopmp_eip120i: IOPMP_EIP120I { + is_default_region; + }; + + iopmp_eip120ii: IOPMP_EIP120II { + is_default_region; + }; + + iopmp_eip120iii: IOPMP_EIP120III { + is_default_region; + }; + + iopmp_isp0: IOPMP_ISP0 { + is_default_region; + }; + + iopmp_isp1: IOPMP_ISP1 { + is_default_region; + }; + + iopmp_dw200: IOPMP_DW200 { + is_default_region; + }; + + iopmp_vipre: IOPMP_VIPRE { + is_default_region; + }; + + iopmp_venc: IOPMP_VENC { + is_default_region; + }; + + iopmp_vdec: IOPMP_VDEC { + is_default_region; + }; + + iopmp_g2d: IOPMP_G2D { + is_default_region; + }; + + iopmp_fce: IOPMP_FCE { + is_default_region; + }; + + iopmp_npu: IOPMP_NPU { + is_default_region; + }; + + iopmp0_dpu: IOPMP0_DPU { + bypass_en; + }; + + iopmp1_dpu: IOPMP1_DPU { + bypass_en; + }; + + iopmp_gpu: IOPMP_GPU { + is_default_region; + }; + + iopmp_gmac1: IOPMP_GMAC1 { + is_default_region; + }; + + iopmp_gmac2: IOPMP_GMAC2 { + is_default_region; + }; + + iopmp_dmac: IOPMP_DMAC { + is_default_region; + }; + + iopmp_tee_dmac: IOPMP_TEE_DMAC { + is_default_region; + }; + + iopmp_dsp0: IOPMP_DSP0 { + is_default_region; + }; + + iopmp_dsp1: IOPMP_DSP1 { + is_default_region; + }; + }; + + mbox_910t_client1: mbox_910t_client1 { + compatible = "thead,light-mbox-client"; + mbox-names = "902"; + mboxes = <&mbox_910t 1 0>; + status = "disabled"; + }; + + + mbox_910t_client2: mbox_910t_client2 { + compatible = "thead,light-mbox-client"; + mbox-names = "906"; + mboxes = <&mbox_910t 2 0>; + status = "disabled"; + }; + + lightsound: lightsound@1 { + compatible = "simple-audio-card"; + simple-audio-card,name = "Light-Sound-Card"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + + dummy_codec: dummy_codec { + #sound-dai-cells = <1>; + compatible = "linux,bt-sco"; + status = "okay"; + }; + + reg_vref_1v8: regulator-adc-verf { + compatible = "regulator-fixed"; + regulator-name = "vref-1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + status = "okay"; + }; + + reg_tp_pwr_en: regulator-pwr-en { + compatible = "regulator-fixed"; + regulator-name = "regulator-pwr-en"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&pcal6408ahk_d 4 1>; + enable-active-high; + regulator-always-on; + }; + + reg_usb_hub_vdd1v2: regulator-hub-vdd12-en { + compatible = "regulator-fixed"; + regulator-name = "regulator-hub-vdd12-en"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + gpio = <&pcal6408ahk_d 2 1>; + enable-active-high; + regulator-always-on; + }; + + reg_usb_hub_vcc5v: regulator-hub-vcc5v-en { + compatible = "regulator-fixed"; + regulator-name = "regulator-hub-vcc5v-en"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pcal6408ahk_d 3 1>; + enable-active-high; + regulator-always-on; + }; + + wcn_wifi: wireless-wlan { + compatible = "wlan-platdata"; + clock-names = "clk_wifi"; + ref-clock-frequency = <24000000>; + keep_wifi_power_on; + pinctrl-names = "default"; + wifi_chip_type = "rtl8723ds"; + WIFI,poweren_gpio = <&pcal6408ahk_c 5 0>; + status = "okay"; + }; + + wcn_bt: wireless-bluetooth { + compatible = "bluetooth-platdata"; + pinctrl-names = "default", "rts_gpio"; + BT,power_gpio = <&pcal6408ahk_c 6 0>; + status = "okay"; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-0 = <&pinctrl_volume>; + pinctrl-names = "default"; + key-volumedown { + label = "Volume Down Key"; + linux,code = ; + debounce-interval = <1>; + gpios = <&gpio1_porta 19 0x1>; + }; + key-volumeup { + label = "Volume Up Key"; + linux,code = ; + debounce-interval = <1>; + gpios = <&gpio2_porta 25 0x1>; + }; + }; + + aon: aon { + compatible = "thead,light-aon"; + mbox-names = "aon"; + mboxes = <&mbox_910t 1 0>; + status = "okay"; + + pd: light-aon-pd { + compatible = "thead,light-aon-pd"; + #power-domain-cells = <1>; + }; + + soc_aud_3v3_en_reg: soc_aud_3v3_en { + compatible = "regulator-fixed"; + regulator-name = "soc_aud_3v3_en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&pcal6408ahk_a 1 1>; + enable-active-high; + regulator-always-on; + }; + + soc_aud_1v8_en_reg: soc_aud_1v8_en { + compatible = "regulator-fixed"; + regulator-name = "soc_aud_1v8_en"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&pcal6408ahk_a 0 1>; + enable-active-high; + regulator-always-on; + }; + + soc_vdd_3v3_en_reg: soc_vdd_3v3_en { + compatible = "regulator-fixed"; + regulator-name = "soc_vdd_3v3_en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio0_porta 30 1>; + enable-active-high; + regulator-always-on; + }; + + soc_vdd33_lcd0_en_reg: soc_lcd0_vdd33_en { + compatible = "regulator-fixed"; + regulator-name = "soc_lcd0_vdd33_en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&pcal6408ahk_d 5 1>; + enable-active-high; + }; + + soc_vdd18_lcd0_en_reg: soc_lcd0_vdd18_en { + compatible = "regulator-fixed"; + regulator-name = "soc_lcd0_vdd18_en"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&pcal6408ahk_d 6 1>; + enable-active-high; + }; + + soc_vdd5v_se_en_reg: soc_vdd5v_se_en { + compatible = "regulator-fixed"; + regulator-name = "soc_vdd5v_se_en"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio2_porta 14 1>; + enable-active-high; + regulator-always-on; + }; + + soc_wcn33_en_reg: soc_wcn33_en { + compatible = "regulator-fixed"; + regulator-name = "soc_wcn33_en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2_porta 29 1>; + enable-active-high; + regulator-always-on; + }; + + soc_vbus_en_reg: soc_vbus_en { + compatible = "regulator-fixed"; + regulator-name = "soc_vbus_en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio1_porta 22 1>; + enable-active-high; + regulator-always-on; + }; + + + soc_avdd28_rgb_reg: soc_avdd28_rgb { + compatible = "regulator-fixed"; + regulator-name = "soc_avdd28_rgb"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&pcal6408ahk_b 1 1>; + enable-active-high; + }; + + soc_dovdd18_rgb_reg: soc_dovdd18_rgb { + compatible = "regulator-fixed"; + regulator-name = "soc_dovdd18_rgb"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&pcal6408ahk_b 2 1>; + enable-active-high; + }; + + soc_dvdd12_rgb_reg: soc_dvdd12_rgb { + compatible = "regulator-fixed"; + regulator-name = "soc_dvdd12_rgb"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&pcal6408ahk_b 0 1>; + enable-active-high; + }; + + soc_avdd25_ir_reg: soc_avdd25_ir { + compatible = "regulator-fixed"; + regulator-name = "soc_avdd25_ir"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + gpio = <&pcal6408ahk_b 5 1>; + enable-active-high; + }; + + soc_dovdd18_ir_reg: soc_dovdd18_ir { + compatible = "regulator-fixed"; + regulator-name = "soc_dovdd18_ir"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&pcal6408ahk_b 3 1>; + enable-active-high; + }; + + soc_dvdd12_ir_reg: soc_dvdd12_ir { + compatible = "regulator-fixed"; + regulator-name = "soc_dvdd12_ir"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + gpio = <&pcal6408ahk_b 4 1>; + enable-active-high; + }; + + soc_cam2_avdd25_ir_reg: soc_cam2_avdd25_ir { + compatible = "regulator-fixed"; + regulator-name = "soc_cam2_avdd25_ir"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + gpio = <&pcal6408ahk_b 7 1>; + enable-active-high; + }; + + soc_cam2_dovdd18_ir_reg: soc_cam2_dovdd18_ir { + compatible = "regulator-fixed"; + regulator-name = "soc_cam2_dovdd18_ir"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&pcal6408ahk_b 6 1>; + enable-active-high; + }; + + soc_cam2_dvdd12_ir_reg: soc_cam2_dvdd12_ir { + compatible = "regulator-fixed"; + regulator-name = "soc_cam2_dvdd12_ir"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + gpio = <&pcal6408ahk_c 0 1>; + enable-active-high; + }; + + aon_reg_dialog: light-dialog-reg { + compatible = "thead,light-dialog-pmic-ant"; + status = "okay"; + + dvdd_cpu_reg: appcpu_dvdd { + regulator-name = "appcpu_dvdd"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1570000>; + regulator-boot-on; + regulator-always-on; + }; + + dvddm_cpu_reg: appcpu_dvddm { + regulator-name = "appcpu_dvddm"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1570000>; + regulator-boot-on; + regulator-always-on; + }; + + soc_dvdd18_aon_reg: soc_dvdd18_aon { + regulator-name = "soc_dvdd18_aon"; + regulator-boot-on; + regulator-always-on; + }; + + soc_avdd33_usb3_reg: soc_avdd33_usb3 { + regulator-name = "soc_avdd33_usb3"; + regulator-boot-on; + regulator-always-on; + }; + + soc_dvdd08_aon_reg: soc_dvdd08_aon { + regulator-name = "soc_dvdd08_aon"; + regulator-boot-on; + regulator-always-on; + }; + + soc_dvdd08_ddr_reg: soc_dvdd08_ddr { + regulator-name = "soc_dvdd08_ddr"; + regulator-boot-on; + regulator-always-on; + }; + + soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 { + regulator-name = "soc_vdd_ddr_1v8"; + regulator-boot-on; + regulator-always-on; + }; + + soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 { + regulator-name = "soc_vdd_ddr_1v1"; + regulator-boot-on; + regulator-always-on; + }; + + soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 { + regulator-name = "soc_vdd_ddr_0v6"; + regulator-boot-on; + regulator-always-on; + }; + + soc_dvdd18_ap_reg: soc_dvdd18_ap { + regulator-name = "soc_dvdd18_ap"; + regulator-boot-on; + regulator-always-on; + }; + + soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi { + regulator-name = "soc_avdd08_mipi_hdmi"; + regulator-boot-on; + regulator-always-on; + }; + + soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi { + regulator-name = "soc_avdd18_mipi_hdmi"; + regulator-boot-on; + regulator-always-on; + }; + + soc_vdd33_emmc_reg: soc_vdd33_emmc { + regulator-name = "soc_vdd33_emmc"; + regulator-boot-on; + regulator-always-on; + }; + + soc_vdd18_emmc_reg: soc_vdd18_emmc { + regulator-name = "soc_vdd18_emmc"; + regulator-boot-on; + regulator-always-on; + }; + + soc_dovdd18_scan_reg: soc_dovdd18_scan { + regulator-name = "soc_dovdd18_scan"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <3600000>; + }; + + soc_dvdd12_scan_reg: soc_dvdd12_scan { + regulator-name = "soc_dvdd12_scan"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <3600000>; + }; + + soc_avdd28_scan_en_reg: soc_avdd28_scan_en { + regulator-name = "soc_avdd28_scan_en"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <3600000>; + }; + + }; + + c910_cpufreq { + compatible = "thead,light-mpw-cpufreq"; + status = "okay"; + }; + + test: light-aon-test { + compatible = "thead,light-aon-test"; + }; + }; + +}; + +&resmem { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + tee_mem: memory@1c000000 { + reg = <0x0 0x1c000000 0 0x2000000>; + no-map; + }; + + dsp0_mem: memory@20000000 { /**0x2000_0000~0x2040_0000 4M**/ + reg = <0x0 0x20000000 0x0 0x00280000 /* DSP FW code&data section 2.5M*/ + 0x0 0x20280000 0x0 0x00001000 /* DSP communication area 4K*/ + 0x0 0x20281000 0x0 0x00007000 /* Panic/log page 28K */ + 0x0 0x20288000 0x0 0x00178000>; /* DSP shared memory 1.5M-32K*/ + no-map; + }; + dsp1_mem: memory@20400000 { /**0x2040_0000~0x2080_0000 4M**/ + reg = <0x0 0x20400000 0x0 0x00280000 /* DSP FW code&data section */ + 0x0 0x20680000 0x0 0x00001000 /* DSP communication area */ + 0x0 0x20681000 0x0 0x00007000 /* Panic/log page*/ + 0x0 0x20688000 0x0 0x00178000>; /* DSP shared memory */ + no-map; + }; + vi_mem: framebuffer@10000000 { + reg = <0x0 0x10000000 0x0 0x02C00000 /* vi_mem_pool_region[0] 44 MB (default) */ + 0x0 0x12C00000 0x0 0x01D00000 /* vi_mem_pool_region[1] 29 MB */ + 0x0 0x14900000 0x0 0x01E00000>; /* vi_mem_pool_region[2] 30 MB */ + no-map; + }; + facelib_mem: memory@17000000 { + reg = <0x0 0x17000000 0 0x02000000>; + no-map; + }; + +}; + +&adc { + vref-supply = <®_vref_1v8>; + #io-channel-cells = <1>; + status = "okay"; +}; + +&audio_i2c0 { + clock-frequency = <100000>; + status = "okay"; + + es8156_audio_codec: es8156@8 { + #sound-dai-cells = <0>; + compatible = "everest,es8156"; + reg = <0x08>; + }; + + es7210_audio_codec: es7210@40 { + #sound-dai-cells = <0>; + compatible = "MicArray_0"; + reg = <0x40>; + }; + + audio_aw87519_pa@58 { + compatible = "awinic,aw87519_pa"; + reg = <0x58>; + reset-gpio = <&pcal6408ahk_a 2 0x1>; + status = "okay"; + }; + + audio_aw87519_pa1@5b { + compatible = "awinic,aw87519_pa"; + reg = <0x5b>; + reset-gpio = <&pcal6408ahk_a 3 0x1>; + status = "disabled"; + }; + + pcal6408ahk_a: gpio@20 { + compatible = "nxp,pcal9554b"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&audio_i2c1 { + clock-frequency = <100000>; + status = "okay"; + + es8156_audio_codec_1: es8156@8 { + #sound-dai-cells = <0>; + compatible = "everest,es8156"; + reg = <0x08>; + status = "disabled"; + }; + + es7210_audio_codec_1: es7210@40 { + #sound-dai-cells = <0>; + compatible = "MicArray_0"; + reg = <0x40>; + status = "disabled"; + }; + + audio_aw87519_pa2@58 { + compatible = "awinic,aw87519_pa"; + reg = <0x58>; + reset-gpio = <&pcal6408ahk_a 4 0x1>; + status = "disabled"; + }; + + audio_aw87519_pa3@5b { + compatible = "awinic,aw87519_pa"; + reg = <0x5b>; + reset-gpio = <&pcal6408ahk_a 5 0x1>; + status = "disabled"; + }; +}; + +&spi0 { + num-cs = <1>; + cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0 + rx-sample-delay-ns = <10>; + status = "okay"; + + spi_norflash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "winbond,w25q64jwm", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + w25q,fast-read; + }; + + spidev@1 { + compatible = "spidev"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x1>; + spi-max-frequency = <50000000>; + }; +}; + +&uart0 { + clock-frequency = <100000000>; +}; + +&qspi0 { + num-cs = <1>; + cs-gpios = <&gpio2_porta 3 0>; + rx-sample-dly = <4>; + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-nand"; + spi-max-frequency = <100000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + reg = <0>; + + partition@0 { + label = "ubi1"; + reg = <0x00000000 0x08000000>; + }; + }; +}; + +&qspi1 { + compatible = "snps,dw-apb-ssi"; + num-cs = <1>; + cs-gpios = <&gpio0_porta 1 0>; + status = "okay"; + + spidev@0 { + compatible = "spidev"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x0>; + spi-max-frequency = <50000000>; + }; + +}; + +&gmac0 { + phy-mode = "rgmii-id"; + rx-clk-delay = <0x00>; /* for RGMII */ + tx-clk-delay = <0x00>; /* for RGMII */ + phy-handle = <&phy_88E1111_0>; + status = "okay"; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + phy_88E1111_0: ethernet-phy@0 { + reg = <0x1>; + }; + + phy_88E1111_1: ethernet-phy@1 { + reg = <0x2>; + }; + }; +}; + +&gmac1 { + phy-mode = "rgmii-id"; + rx-clk-delay = <0x00>; /* for RGMII */ + tx-clk-delay = <0x00>; /* for RGMII */ + phy-handle = <&phy_88E1111_1>; + status = "okay"; +}; + +&emmc { + max-frequency = <198000000>; + non-removable; + mmc-hs400-1_8v; + io_fixed_1v8; + is_emmc; + no-sdio; + no-sd; + pull_up; + bus-width = <8>; + status = "okay"; +}; + +&sdhci0 { + max-frequency = <198000000>; + bus-width = <4>; + pull_up; + wprtn_ignore; + status = "okay"; +}; + +&sdhci1 { + max-frequency = <100000000>; + bus-width = <4>; + pull_up; + no-sd; + no-mmc; + non-removable; + io_fixed_1v8; + post-power-on-delay-ms = <50>; + wprtn_ignore; + cap-sd-highspeed; + keep-power-in-suspend; + wakeup-source; + status = "okay"; +}; + +&padctrl0_apsys { /* right-pinctrl */ + light-evb-padctrl0 { + /* + * Pin Configuration Node: + * Format: + */ + pinctrl_uart0: uart0grp { + thead,pins = < + FM_UART0_TXD 0x0 0x72 + FM_UART0_RXD 0x0 0x72 + >; + }; + + pinctrl_spi0: spi0grp { + thead,pins = < + FM_SPI_CSN 0x3 0x20a + FM_SPI_SCLK 0x0 0x20a + FM_SPI_MISO 0x0 0x23a + FM_SPI_MOSI 0x0 0x23a + >; + }; + + pinctrl_qspi0: qspi0grp { + thead,pins = < + FM_QSPI0_SCLK 0x0 0x20f + FM_QSPI0_CSN0 0x3 0x20f + FM_QSPI0_CSN1 0x0 0x20f + FM_QSPI0_D0_MOSI 0x0 0x23f + FM_QSPI0_D1_MISO 0x0 0x23f + FM_QSPI0_D2_WP 0x0 0x23f + FM_QSPI0_D3_HOLD 0x0 0x23f + >; + }; + + pinctrl_audio_i2s0: i2s0grp { + thead,pins = < + FM_QSPI0_SCLK 0x2 0x208 + FM_QSPI0_CSN0 0x2 0x238 + FM_QSPI0_CSN1 0x2 0x208 + FM_QSPI0_D0_MOSI 0x2 0x238 + FM_QSPI0_D1_MISO 0x2 0x238 + FM_QSPI0_D2_WP 0x2 0x238 + FM_QSPI0_D3_HOLD 0x2 0x238 + >; + }; + + pinctrl_pwm: pwmgrp { + thead,pins = < + FM_GPIO3_2 0x1 0x208 /* pwm0 */ + >; + }; + }; +}; + +&padctrl1_apsys { /* left-pinctrl */ + light-evb-padctrl1 { + /* + * Pin Configuration Node: + * Format: + */ + pinctrl_uart3: uart3grp { + thead,pins = < + FM_UART3_TXD 0x0 0x72 + FM_UART3_RXD 0x0 0x72 + >; + }; + + pinctrl_uart4: uart4grp { + thead,pins = < + FM_UART4_TXD 0x0 0x72 + FM_UART4_RXD 0x0 0x72 + FM_UART4_CTSN 0x0 0x72 + FM_UART4_RTSN 0x0 0x72 + >; + }; + + pinctrl_qspi1: qspi1grp { + thead,pins = < + FM_QSPI1_SCLK 0x0 0x20a + FM_QSPI1_CSN0 0x3 0x20a + FM_QSPI1_D0_MOSI 0x0 0x23a + FM_QSPI1_D1_MISO 0x0 0x23a + >; + }; + + + pinctrl_iso7816: iso7816grp { + thead,pins = < + FM_QSPI1_SCLK 0x1 0x208 + FM_QSPI1_D0_MOSI 0x1 0x238 + FM_QSPI1_D1_MISO 0x1 0x238 + FM_QSPI1_D2_WP 0x1 0x238 + FM_QSPI1_D3_HOLD 0x1 0x238 + >; + }; + + pinctrl_volume: volume_grp { + thead,pins = < + FM_CLK_OUT_2 0x3 0x208 + >; + }; + }; +}; + +&padctrl_aosys { + light-aon-padctrl { + /* + * Pin Configuration Node: + * Format: + */ + + pinctrl_audiopa1: audiopa1_grp { + thead,pins = < + FM_AUDIO_PA1 0x3 0x72 + >; + }; + + pinctrl_audiopa2: audiopa2_grp { + thead,pins = < + FM_AUDIO_PA2 0x0 0x72 + >; + }; + + }; +}; + +&i2c0 { + clock-frequency = <400000>; + status = "okay"; + + pcal6408ahk_b: gpio@20 { + compatible = "nxp,pcal9554b"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&i2c1 { + clock-frequency = <400000>; + status = "okay"; + + pcal6408ahk_c: gpio@20 { + compatible = "nxp,pcal9554b"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&i2c2 { + clock-frequency = <400000>; + status = "okay"; +}; + +&i2c3 { + clock-frequency = <400000>; + status = "okay"; + + pcal6408ahk_d: gpio@20 { + compatible = "nxp,pcal9554b"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&i2c4 { + clock-frequency = <400000>; + status = "okay"; +}; + +&isp0 { + status = "okay"; +}; + +&isp1 { + status = "okay"; +}; + +&isp_ry0 { + status = "okay"; +}; + +&dewarp { + status = "okay"; +}; + +&dec400_isp0 { + status = "okay"; +}; + +&dec400_isp1 { + status = "okay"; +}; + +&dec400_isp2 { + status = "okay"; +}; + +&bm_visys { + status = "okay"; +}; + +&bm_csi0 { + status = "okay"; +}; + +&bm_csi1 { + status = "okay"; +}; + +&bm_csi2 { + status = "okay"; +}; + +&vi_pre { + //vi_pre_irq_en = <1>; + status = "okay"; +}; + +&xtensa_dsp { + status = "okay"; +}; + +&xtensa_dsp0 { + status = "okay"; + memory-region = <&dsp0_mem>; +}; + +&xtensa_dsp1 { + status = "okay"; + memory-region = <&dsp1_mem>; +}; + +&vvcam_sensor0 { + sensor_name = "OV12870"; + sensor_regulators = "soc_dovdd18_rgb", "soc_dvdd12_rgb", "soc_avdd28_rgb"; + sensor_regulator_timing_us = <70 50 20>; + sensor_pdn = <&gpio1_porta 28 0>; //powerdown pin / shutdown pin + sensor_rst = <&pcal6408ahk_c 1 0>; + sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready + DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>; + DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>; + AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>; + i2c_reg_width = /bits/ 8 <2>; + i2c_data_width = /bits/ 8 <1>; + i2c_addr = /bits/ 8 <0x10>; + i2c_bus = /bits/ 8 <0>; + status = "okay"; +}; + +&vvcam_sensor1 {//cam1 csia + sensor_name = "SC132GS"; + sensor_regulators = "soc_dovdd18_ir", "soc_dvdd12_ir", "soc_avdd25_ir"; + sensor_regulator_timing_us = <70 1000 2000>; + i2c_addr = /bits/ 8 <0x30>; + sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin + sensor_rst = <&pcal6408ahk_c 2 0>; + sensor_pdn_delay_us = <2000>; //powerdown pin / shutdown pin actived till I2C ready + DOVDD18_IR-supply = <&soc_dovdd18_ir_reg>; + DVDD12_IR-supply = <&soc_dvdd12_ir_reg>; + AVDD25_IR-supply = <&soc_avdd25_ir_reg>; + i2c_reg_width = /bits/ 8 <2>; + i2c_data_width = /bits/ 8 <1>; + i2c_bus = /bits/ 8 <1>; + status = "okay"; +}; + +&vvcam_sensor2 {//cam2 csib + sensor_name = "SC132GS"; + sensor_regulators = "soc_cam2_dovdd18_ir", "soc_cam2_dvdd12_ir", "soc_cam2_avdd25_ir"; + sensor_regulator_timing_us = <70 1000 2000>; + i2c_addr = /bits/ 8 <0x30>; + sensor_pdn = <&gpio2_porta 13 0>; //powerdown pin / shutdown pin + sensor_rst = <&pcal6408ahk_c 3 0>; + sensor_pdn_delay_us = <2000>; //powerdown pin / shutdown pin actived till I2C ready + DOVDD18_IR-supply = <&soc_cam2_dovdd18_ir_reg>; + DVDD12_IR-supply = <&soc_cam2_dvdd12_ir_reg>; + AVDD25_IR-supply = <&soc_cam2_avdd25_ir_reg>; + i2c_reg_width = /bits/ 8 <2>; + i2c_data_width = /bits/ 8 <1>; + i2c_bus = /bits/ 8 <2>; + status = "okay"; +}; + +&video2 { + vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0] + status = "okay"; + channel0 { + channel_id = <0>; + status = "okay"; + sensor0 { + subdev_name = "vivcam"; + idx = <0>; + csi_idx = <0>; + mode_idx = <0>; + path_type = "SENSOR_VGA_RAW12_LINER"; + }; + dma { + subdev_name = "vipre"; + idx = <0>; + path_type = "VIPRE_CSI0_ISP1"; + }; + isp { + subdev_name = "isp"; + idx = <1>; + path_type = "ISP_MI_PATH_MP"; + output { + max_width = <1920>; + max_height = <1088>; + bit_per_pixel = <12>; + frame_count = <3>; + }; + }; + }; +}; + + +&video3{ + vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0] + status = "okay"; + channel0 { + sensor0 { + subdev_name = "vivcam"; + idx = <0>; + csi_idx = <0>; + mode_idx = <0>; + path_type = "SENSOR_VGA_RAW12_LINER"; + + }; + dma { + subdev_name = "vipre"; + idx = <0>; + path_type = "VIPRE_CSI0_ISP1"; + + }; + isp { + subdev_name = "isp"; + idx = <1>; + path_type = "ISP_MI_PATH_MP"; + output { + max_width = <1920>; + max_height = <1088>; + bit_per_pixel = <12>; + frame_count = <3>; + }; + }; + dw { + subdev_name = "dw"; + idx = <0>; + path_type = "DW_DWE_VSE0"; + dw_dst_depth = <2>; + }; + }; + channel1 { + sensor0 { + subdev_name = "vivcam"; + idx = <0>; + csi_idx = <0>; + mode_idx = <0>; + path_type = "SENSOR_VGA_RAW12_LINER"; + + }; + dma { + subdev_name = "vipre"; + idx = <0>; + path_type = "VIPRE_CSI0_ISP1"; + + }; + isp { + subdev_name = "isp"; + idx = <1>; + path_type = "ISP_MI_PATH_MP"; + output { + max_width = <1920>; + max_height = <1088>; + bit_per_pixel = <12>; + frame_count = <3>; + }; + }; + dw { + subdev_name = "dw"; + idx = <0>; + path_type = "DW_DWE_VSE1"; + dw_dst_depth = <2>; + }; + }; + channel2 { + sensor0 { + subdev_name = "vivcam"; + idx = <0>; + csi_idx = <0>; + mode_idx = <0>; + path_type = "SENSOR_VGA_RAW12_LINER"; + + }; + dma { + subdev_name = "vipre"; + idx = <0>; + path_type = "VIPRE_CSI0_ISP1"; + + }; + isp { + subdev_name = "isp"; + idx = <1>; + path_type = "ISP_MI_PATH_MP"; + output { + max_width = <1920>; + max_height = <1088>; + bit_per_pixel = <12>; + frame_count = <3>; + }; + }; + dw { + subdev_name = "dw"; + idx = <0>; + path_type = "DW_DWE_VSE2"; + dw_dst_depth = <2>; + }; + }; +}; + +&video9{ + status = "okay"; + channel0 { + sensor0 { + subdev_name = "vivcam"; + idx = <1>; //vivcam1 sc132gs + csi_idx = <2>; //<2>=CSI2X2_A + mode_idx = <0>; + path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER"; + }; + dsp{ + output { + max_width = <1080>; + max_height = <1280>; + bit_per_pixel = <16>; + frame_count = <3>; + }; + }; + }; +}; + + +&video10{ // TUNINGTOOL + status = "okay"; + channel0 { + sensor0 { + subdev_name = "vivcam"; + idx = <0>; //<0>=vivcam0 : ov12870 + csi_idx = <0>; //<0>=CSI2 + mode_idx = <1>; + path_type = "SENSOR_1080P_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER// + skip_init = <1>; + }; + dma { + path_type = "VIPRE_CSI0_ISP0"; + }; + }; +}; + +&video15{ + status = "okay"; + channel0 { + status = "okay"; + sensor0 { + subdev_name = "vivcam"; + idx = <2>; + csi_idx = <1>; //csi_b + mode_idx = <0>; + path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER"; + }; + dma { + subdev_name = "vipre"; + idx = <0>; + path_type = "VIPRE_CSI1_DDR"; + }; + }; +}; + +&trng { + status = "disabled"; +}; + +&eip_28 { + status = "okay"; +}; + +&vdec { + status = "okay"; +}; + +&venc { + status = "okay"; +}; + +&isp_venc_shake { + status = "okay"; +}; + +&vidmem { + status = "okay"; + memory-region = <&vi_mem>; +}; + +&gpu { + status = "okay"; +}; + +&npu { + vha_clk_rate = <1000000000>; + status = "okay"; +}; + +&fce { + memory-region = <&facelib_mem>; + status = "okay"; +}; + +&dpu_enc0 { + status = "okay"; + + ports { + /* output */ + port@1 { + reg = <1>; + + enc0_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + }; +}; + +&dpu_enc1 { + ports { + /delete-node/ port@0; + }; +}; + +&dpu { + status = "okay"; +}; + +&dsi0 { + status = "okay"; +}; + +&dhost_0 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi0_in: endpoint { + remote-endpoint = <&enc0_out>; + }; + }; + + port@1 { + reg = <1>; + + dsi0_out: endpoint { + remote-endpoint = <&panel0_in>; + }; + }; + }; + + panel0@0 { + compatible = "himax,hx8394"; + reg = <0>; + backlight = <&lcd0_backlight>; + reset-gpio = <&pcal6408ahk_d 7 1>; /* active low */ + hsvcc-supply = <&soc_vdd18_lcd0_en_reg>; + vspn3v3-supply = <&soc_vdd33_lcd0_en_reg>; + + port { + panel0_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + }; +}; + +&disp1_out { + remote-endpoint = <&hdmi_tx_in>; +}; + +&hdmi_tx { + status = "okay"; + + port@0 { + /* input */ + hdmi_tx_in: endpoint { + remote-endpoint = <&disp1_out>; + }; + }; +}; + +&lightsound { + status = "okay"; + simple-audio-card,dai-link@0 { /* I2S - AUDIO SYS CODEC 8156*/ + reg = <0>; + format = "i2s"; + cpu { + sound-dai = <&i2s1 0>; + }; + codec { + sound-dai = <&es8156_audio_codec>; + }; + }; + simple-audio-card,dai-link@1 { /* I2S - AUDIO SYS CODEC 7210*/ + reg = <1>; + format = "i2s"; + cpu { + sound-dai = <&i2s1 1>; + }; + codec { + sound-dai = <&es7210_audio_codec>; + }; + }; +}; + +&light_i2s { + status = "okay"; +}; + +&i2s0 { + status = "okay"; +}; + +&i2s1 { + status = "okay"; + dmas = <&dmac2 11>, <&dmac2 10>; +}; + +&i2s2 { + status = "okay"; +}; + +&i2s3 { + status = "okay"; +}; + +&cpus { + c910_0: cpu@0 { + operating-points = < + /* kHz uV */ + 300000 650000 + 800000 700000 + 1500000 800000 + >; + light,dvddm-operating-points = < + /* kHz uV */ + 300000 800000 + 800000 800000 + 1500000 800000 + >; + }; + c910_1: cpu@1 { + operating-points = < + /* kHz uV */ + 300000 650000 + 800000 700000 + 1500000 800000 + >; + light,dvddm-operating-points = < + /* kHz uV */ + 300000 800000 + 800000 800000 + 1500000 800000 + >; + }; + c910_2: cpu@2 { + + operating-points = < + /* kHz uV */ + 300000 650000 + 800000 700000 + 1500000 800000 + >; + light,dvddm-operating-points = < + /* kHz uV */ + 300000 800000 + 800000 800000 + 1500000 800000 + >; + }; + c910_3: cpu@3 { + + operating-points = < + /* kHz uV */ + 300000 650000 + 800000 700000 + 1500000 800000 + >; + light,dvddm-operating-points = < + /* kHz uV */ + 300000 800000 + 800000 800000 + 1500000 800000 + >; + }; +}; diff --git a/arch/riscv/boot/dts/thead/light-lpi4a.dts b/arch/riscv/boot/dts/thead/light-lpi4a.dts new file mode 100644 index 000000000..6be2e8aa0 --- /dev/null +++ b/arch/riscv/boot/dts/thead/light-lpi4a.dts @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2022 Alibaba Group Holding Limited. + */ + +#include "light-lpi4a-ref.dts" + +/ { + model = "T-HEAD Light Lichee Pi 4A configuration for 4GB DDR board"; + compatible = "thead,light-val", "thead,light-lpi4a", "thead,light"; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x00000000 0x1 0x00000000>; + }; +}; + +&cmamem { + alloc-ranges = <0 0xe4000000 0 0x14000000>; // [0xE400_0000 ~ 0xF800_0000] +}; + +&usb_1 { + hubswitch-gpio = <&ao_gpio_porta 4 0>; + vbus-supply = <&soc_vbus_en_reg>; + hub1v2-supply = <®_usb_hub_vdd1v2>; + hub5v-supply = <®_usb_hub_vcc5v>; +}; diff --git a/arch/riscv/boot/dts/thead/light.dtsi b/arch/riscv/boot/dts/thead/light.dtsi index 9123f4b62..e9e0e3357 100644 --- a/arch/riscv/boot/dts/thead/light.dtsi +++ b/arch/riscv/boot/dts/thead/light.dtsi @@ -34,6 +34,7 @@ i2c3 = &i2c3; i2c4 = &i2c4; audio_i2c0 = &audio_i2c0; + audio_i2c1 = &audio_i2c1; mmc0 = &emmc; mmc1 = &sdhci0; serial0 = &uart0; @@ -1534,6 +1535,26 @@ status = "disabled"; }; + i2s2: audio_i2s2@0xffcb016000 { + #sound-dai-cells = <1>; + compatible = "light,light-i2s"; + reg = <0xff 0xcb016000 0x0 0x1000>; + audio-pin-regmap = <&audio_ioctrl>; + audio-cpr-regmap = <&audio_cpr>; + pinctrl-names = "default"; + light,mode = "i2s-master"; + light,sel = "i2s2"; + interrupt-parent = <&intc>; + interrupts = <176>; + dmas = <&dmac2 13>, <&dmac2 12>; + dma-names = "tx", "rx"; + light,dma_maxburst = <4>; + #dma-cells = <1>; + clocks = <&dummy_clock_apb>; + clock-names = "pclk"; + status = "disabled"; + }; + i2s3: audio_i2s3@0xffcb017000 { #sound-dai-cells = <1>; compatible = "light,light-i2s"; @@ -1684,6 +1705,27 @@ #size-cells = <0>; }; + audio_i2c1: i2c@0xffcb01b000 { + compatible = "snps,designware-i2c"; + reg = <0xff 0xcb01b000 0x0 0x1000>; + interrupt-parent = <&intc>; + interrupts = <183>; + clocks = <&dummy_clock_apb>; + clock-frequency = <100000>; + ss_hcnt = /bits/ 16 <0x82>; + ss_lcnt = /bits/ 16 <0x78>; + fs_hcnt = /bits/ 16 <0x37>; + fs_lcnt = /bits/ 16 <0x42>; + fp_hcnt = /bits/ 16 <0x14>; + fp_lcnt = /bits/ 16 <0x1a>; + hs_hcnt = /bits/ 16 <0x5>; + hs_lcnt = /bits/ 16 <0x15>; + status = "disabled"; + + #address-cells = <1>; + #size-cells = <0>; + }; + isp0: isp@ffe4100000 { compatible = "thead,light-isp"; reg = <0xff 0xe4100000 0x0 0x10000>; diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index c090e7abc..35db128d7 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -183,6 +183,5 @@ CONFIG_DEBUG_INFO=y CONFIG_MAGIC_SYSRQ=y CONFIG_DEBUG_FS=y CONFIG_DETECT_HUNG_TASK=y -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60 CONFIG_DEBUG_ATOMIC_SLEEP=y # CONFIG_RCU_TRACE is not set diff --git a/arch/riscv/configs/fire_defconfig b/arch/riscv/configs/fire_defconfig index b6aad4426..41cad23e9 100644 --- a/arch/riscv/configs/fire_defconfig +++ b/arch/riscv/configs/fire_defconfig @@ -80,6 +80,7 @@ CONFIG_STMMAC_ETH=y CONFIG_DWMAC_LIGHT=y CONFIG_MICROSEMI_PHY=y CONFIG_REALTEK_PHY=y +CONFIG_MARVELL_PHY=y CONFIG_USB_USBNET=m # CONFIG_USB_NET_AX8817X is not set # CONFIG_USB_NET_AX88179_178A is not set @@ -299,7 +300,6 @@ CONFIG_DEBUG_INFO=y CONFIG_MAGIC_SYSRQ=y CONFIG_DEBUG_FS=y CONFIG_DETECT_HUNG_TASK=y -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60 CONFIG_DEBUG_ATOMIC_SLEEP=y # CONFIG_RCU_TRACE is not set CONFIG_OVERLAY_FS=y diff --git a/arch/riscv/configs/fire_emu_defconfig b/arch/riscv/configs/fire_emu_defconfig index b6aad4426..2e52816e0 100644 --- a/arch/riscv/configs/fire_emu_defconfig +++ b/arch/riscv/configs/fire_emu_defconfig @@ -17,6 +17,7 @@ CONFIG_PERF_EVENTS=y CONFIG_FORCE_MAX_ZONEORDER=15 CONFIG_SOC_SIFIVE=y CONFIG_SOC_THEAD=y +CONFIG_SOC_THEAD_LIGHT_EMU=y CONFIG_SMP=y CONFIG_VECTOR=y CONFIG_VECTOR_0_7=y @@ -80,6 +81,7 @@ CONFIG_STMMAC_ETH=y CONFIG_DWMAC_LIGHT=y CONFIG_MICROSEMI_PHY=y CONFIG_REALTEK_PHY=y +CONFIG_MARVELL_PHY=y CONFIG_USB_USBNET=m # CONFIG_USB_NET_AX8817X is not set # CONFIG_USB_NET_AX88179_178A is not set @@ -299,7 +301,6 @@ CONFIG_DEBUG_INFO=y CONFIG_MAGIC_SYSRQ=y CONFIG_DEBUG_FS=y CONFIG_DETECT_HUNG_TASK=y -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60 CONFIG_DEBUG_ATOMIC_SLEEP=y # CONFIG_RCU_TRACE is not set CONFIG_OVERLAY_FS=y diff --git a/arch/riscv/configs/ice_defconfig b/arch/riscv/configs/ice_defconfig index 24f809f56..ce3bc8408 100644 --- a/arch/riscv/configs/ice_defconfig +++ b/arch/riscv/configs/ice_defconfig @@ -180,6 +180,5 @@ CONFIG_DEBUG_INFO=y CONFIG_MAGIC_SYSRQ=y CONFIG_DEBUG_FS=y CONFIG_DETECT_HUNG_TASK=y -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60 CONFIG_DEBUG_ATOMIC_SLEEP=y # CONFIG_RCU_TRACE is not set diff --git a/arch/riscv/configs/light-android_defconfig b/arch/riscv/configs/light-android_defconfig index 1be3bd643..d390ceb83 100644 --- a/arch/riscv/configs/light-android_defconfig +++ b/arch/riscv/configs/light-android_defconfig @@ -561,7 +561,6 @@ CONFIG_DYNAMIC_DEBUG=y CONFIG_DEBUG_FS=y CONFIG_PANIC_TIMEOUT=5 CONFIG_DETECT_HUNG_TASK=y -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60 CONFIG_SCHEDSTATS=y CONFIG_DEBUG_ATOMIC_SLEEP=y # CONFIG_GCC_PLUGINS is not set diff --git a/arch/riscv/configs/light_defconfig b/arch/riscv/configs/light_defconfig index 5bc32e4a7..74b8b47da 100644 --- a/arch/riscv/configs/light_defconfig +++ b/arch/riscv/configs/light_defconfig @@ -198,6 +198,7 @@ CONFIG_DRM=y CONFIG_DRM_PANEL_SIMPLE=y CONFIG_DRM_PANEL_ILITEK_ILI9881C=y CONFIG_DRM_PANEL_ILI9881D=y +CONFIG_DRM_PANEL_HX8394=y CONFIG_DRM_VERISILICON=y CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_PWM=y @@ -313,7 +314,6 @@ CONFIG_DEBUG_INFO=y CONFIG_MAGIC_SYSRQ=y CONFIG_DEBUG_FS=y CONFIG_DETECT_HUNG_TASK=y -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60 CONFIG_DEBUG_ATOMIC_SLEEP=y # CONFIG_RCU_TRACE is not set CONFIG_OVERLAY_FS=y diff --git a/arch/riscv/configs/light_emu_defconfig b/arch/riscv/configs/light_emu_defconfig index dc3df15bb..3d06cd01c 100644 --- a/arch/riscv/configs/light_emu_defconfig +++ b/arch/riscv/configs/light_emu_defconfig @@ -189,7 +189,6 @@ CONFIG_DYNAMIC_DEBUG=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_FS=y CONFIG_DETECT_HUNG_TASK=y -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60 CONFIG_DEBUG_ATOMIC_SLEEP=y # CONFIG_RCU_TRACE is not set CONFIG_FORCE_MAX_ZONEORDER=15 diff --git a/arch/riscv/configs/vector_0_7_defconfig b/arch/riscv/configs/vector_0_7_defconfig index fb84600fc..07300dd74 100644 --- a/arch/riscv/configs/vector_0_7_defconfig +++ b/arch/riscv/configs/vector_0_7_defconfig @@ -184,6 +184,5 @@ CONFIG_DEBUG_INFO=y CONFIG_MAGIC_SYSRQ=y CONFIG_DEBUG_FS=y CONFIG_DETECT_HUNG_TASK=y -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60 CONFIG_DEBUG_ATOMIC_SLEEP=y # CONFIG_RCU_TRACE is not set diff --git a/arch/riscv/kernel/machine_kexec.c b/arch/riscv/kernel/machine_kexec.c index 3d3725ded..e008d8ede 100644 --- a/arch/riscv/kernel/machine_kexec.c +++ b/arch/riscv/kernel/machine_kexec.c @@ -179,9 +179,10 @@ machine_crash_shutdown(struct pt_regs *regs) { local_irq_disable(); +#ifdef CONFIG_SMP /* shutdown non-crashing cpus */ crash_smp_send_stop(); - +#endif crash_save_cpu(regs, smp_processor_id()); machine_kexec_mask_interrupts(); @@ -211,8 +212,10 @@ machine_kexec(struct kimage *image) void *control_code_buffer = page_address(image->control_code_page); riscv_kexec_method kexec_method = NULL; +#ifdef CONFIG_SMP WARN(smp_crash_stop_failed(), "Some CPUs may be stale, kdump will be unreliable.\n"); +#endif if (image->type != KEXEC_TYPE_CRASH) kexec_method = control_code_buffer; diff --git a/arch/riscv/kernel/perf_callchain.c b/arch/riscv/kernel/perf_callchain.c index fb02811df..e0cf246d4 100644 --- a/arch/riscv/kernel/perf_callchain.c +++ b/arch/riscv/kernel/perf_callchain.c @@ -75,13 +75,13 @@ void perf_callchain_user(struct perf_callchain_entry_ctx *entry, fp = user_backtrace(entry, fp, 0); } -bool fill_callchain(unsigned long pc, void *entry) +bool fill_callchain(unsigned long pc, unsigned long regs, void *entry) { return perf_callchain_store(entry, pc) == 0; } void notrace walk_stackframe(struct task_struct *task, - struct pt_regs *regs, bool (*fn)(unsigned long, void *), void *arg); + struct pt_regs *regs, bool (*fn)(unsigned long, unsigned long, void *), void *arg); void perf_callchain_kernel(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs) { diff --git a/arch/riscv/kernel/probes/kprobes.c b/arch/riscv/kernel/probes/kprobes.c index e60893bd8..5b3e258e6 100644 --- a/arch/riscv/kernel/probes/kprobes.c +++ b/arch/riscv/kernel/probes/kprobes.c @@ -46,6 +46,21 @@ static void __kprobes arch_simulate_insn(struct kprobe *p, struct pt_regs *regs) post_kprobe_handler(kcb, regs); } +static bool __kprobes arch_check_kprobe(struct kprobe *p) +{ + unsigned long tmp = (unsigned long)p->addr - p->offset; + unsigned long addr = (unsigned long)p->addr; + + while (tmp <= addr) { + if (tmp == addr) + return true; + + tmp += GET_INSN_LENGTH(*(u16 *)tmp); + } + + return false; +} + int __kprobes arch_prepare_kprobe(struct kprobe *p) { unsigned long probe_addr = (unsigned long)p->addr; @@ -56,6 +71,9 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p) return -EINVAL; } + if (!arch_check_kprobe(p)) + return -EILSEQ; + /* copy instruction */ p->opcode = le32_to_cpu(*p->addr); diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 5f76e33de..fd21cbc12 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -510,4 +510,13 @@ config DRM_PANEL_ILI9881D Say Y if you want to enable support for panels based on the ILI9881d controller. +config DRM_PANEL_HX8394 + tristate "HX8394-based panels" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y if you want to enable support for panels based on the + HX8394 controller. + endmenu diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index 8d7f1dda9..bac2f1568 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -54,3 +54,4 @@ obj-$(CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA) += panel-truly-nt35597.o obj-$(CONFIG_DRM_PANEL_VISIONOX_RM69299) += panel-visionox-rm69299.o obj-$(CONFIG_DRM_PANEL_XINPENG_XPP055C272) += panel-xinpeng-xpp055c272.o obj-$(CONFIG_DRM_PANEL_ILI9881D) += panel-ili9881d.o +obj-$(CONFIG_DRM_PANEL_HX8394) += panel-himax8394.o diff --git a/drivers/gpu/drm/panel/panel-himax8394.c b/drivers/gpu/drm/panel/panel-himax8394.c new file mode 100644 index 000000000..dfaec2b35 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-himax8394.c @@ -0,0 +1,429 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Diiver for panels based on Himax HX8394 controller + * Copyright (c) 2023, Alibaba-inc Co., Ltd + * + */ + +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include + +#include