Linux_SDK_V1.0.2

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

@@ -49,6 +49,10 @@
 
 #define HDMI14_MAX_TMDSCLK	340000000
 
+#define HDMI_DDC_CHECK_MAX_RETRIES	100
+#define HDMI_DDC_CHECK_NORMAL		2
+#define HDMI_SCRAMBLING_RETRIES		20
+
 enum hdmi_datamap {
 	RGB444_8B = 0x01,
 	RGB444_10B = 0x03,
@@ -1865,6 +1869,45 @@ static void hdmi_config_drm_infoframe(struct dw_hdmi *hdmi,
 		  HDMI_FC_PACKET_TX_EN_DRM_MASK, HDMI_FC_PACKET_TX_EN);
 }
 
+static bool dw_hdmi_ddc_debounce(struct dw_hdmi *hdmi)
+{
+	u8 config, val, orig;
+	int ret, count = 0, check = 0;
+
+	drm_scdc_readb(hdmi->ddc, SCDC_TMDS_CONFIG, &orig);
+
+	do {
+		drm_scdc_readb(hdmi->ddc, SCDC_TMDS_CONFIG, &config);
+		if (count & 0x1)
+			config |= SCDC_SCRAMBLING_ENABLE;
+		else
+			config &= ~SCDC_SCRAMBLING_ENABLE;
+		drm_scdc_writeb(hdmi->ddc, SCDC_TMDS_CONFIG, config);
+		drm_scdc_readb(hdmi->ddc, SCDC_TMDS_CONFIG, &val);
+
+		if (val != config)
+			check = 0;
+		else
+			check++;
+		if (check >= HDMI_DDC_CHECK_NORMAL) {
+			ret = true;
+			goto out;
+		}
+
+		if (count++ >= HDMI_DDC_CHECK_MAX_RETRIES) {
+			dev_err(hdmi->dev, "exceed max retries:%d\n", HDMI_DDC_CHECK_MAX_RETRIES);
+			ret = false;
+			goto out;
+		}
+
+		usleep_range(10000, 15000);
+	} while (1);
+
+out:
+	drm_scdc_writeb(hdmi->ddc, SCDC_TMDS_CONFIG, orig);
+	return ret;
+}
+
 static void hdmi_av_composer(struct dw_hdmi *hdmi,
 			     const struct drm_display_info *display,
 			     const struct drm_display_mode *mode)
@@ -1983,7 +2026,8 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
 			 * Source Devices compliant shall set the
 			 * Source Version = 1.
 			 */
-			mdelay(60);
+			dw_hdmi_ddc_debounce(hdmi);
+
 			drm_scdc_readb(hdmi->ddc, SCDC_SINK_VERSION,
 				       &bytes);
 			drm_scdc_writeb(hdmi->ddc, SCDC_SOURCE_VERSION,
@@ -2137,6 +2181,28 @@ static void hdmi_disable_overflow_interrupts(struct dw_hdmi *hdmi)
 		    HDMI_IH_MUTE_FC_STAT2);
 }
 
+static void hdmi_check_scrambling_status(struct dw_hdmi *hdmi,
+		const struct drm_display_info *display)
+{
+	int count = 0;
+
+	if (!dw_hdmi_support_scdc(hdmi, display))
+		return;
+
+	do {
+		if (drm_scdc_get_scrambling_status(hdmi->ddc))
+			break;
+
+		/* polling scrambling_status up to a maximum of 200ms */
+		if (count++ >= HDMI_SCRAMBLING_RETRIES) {
+			dev_err(hdmi->dev,
+				"TMDS link of scrambling_status is not ready\n");
+			break;
+		}
+		usleep_range(10000, 11000);
+	} while (1);
+}
+
 static int dw_hdmi_setup(struct dw_hdmi *hdmi,
 			 const struct drm_connector *connector,
 			 const struct drm_display_mode *mode)
@@ -2223,6 +2289,7 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
 	hdmi_video_csc(hdmi);
 	hdmi_video_sample(hdmi);
 	hdmi_tx_hdcp_config(hdmi);
+	hdmi_check_scrambling_status(hdmi, &connector->display_info);
 
 	dw_hdmi_clear_overflow(hdmi);
 
@@ -2960,6 +3027,8 @@ static irqreturn_t dw_hdmi_hardirq(int irq, void *dev_id)
 
 	intr_stat = hdmi_readb(hdmi, HDMI_IH_PHY_STAT0);
 	if (intr_stat) {
+		hdmi_writeb(hdmi, intr_stat, HDMI_IH_PHY_STAT0);
+		hdmi_writeb(hdmi, 0xff, HDMI_PHY_MASK0);
 		hdmi_writeb(hdmi, ~0, HDMI_IH_MUTE_PHY_STAT0);
 		return IRQ_WAKE_THREAD;
 	}
@@ -3000,6 +3069,7 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
 	struct dw_hdmi *hdmi = dev_id;
 	u8 intr_stat, phy_int_pol, phy_pol_mask, phy_stat;
 
+	msleep(50);
 	intr_stat = hdmi_readb(hdmi, HDMI_IH_PHY_STAT0);
 	phy_int_pol = hdmi_readb(hdmi, HDMI_PHY_POL0);
 	phy_stat = hdmi_readb(hdmi, HDMI_PHY_STAT0);
@@ -3057,6 +3127,7 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
 	hdmi_writeb(hdmi, intr_stat, HDMI_IH_PHY_STAT0);
 	hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE),
 		    HDMI_IH_MUTE_PHY_STAT0);
+	hdmi_writeb(hdmi, (u8)~(HDMI_PHY_HPD | HDMI_PHY_RX_SENSE), HDMI_PHY_MASK0);
 
 	return IRQ_HANDLED;
 }

drivers/gpu/drm/panel/panel-ilitek-ili9881c.c

@@ -690,11 +690,6 @@ static const struct ili9881c_instr txd_dy800qwxpab_init[] = {
 };
 
 static const struct ili9881c_instr gx_kd080d74_d028_init[] = {
-	ILI9881C_SWITCH_PAGE_INSTR(0),
-	ILI9881C_COMMAND_INSTR(0x35, 0x0),
-	ILI9881C_COMMAND_INSTR(0x11, 0x0),
-	ILI9881C_COMMAND_INSTR(0x29, 0x0),
-
 	ILI9881C_SWITCH_PAGE_INSTR(0x3),
 	ILI9881C_COMMAND_INSTR(0x01, 0x00),
 	ILI9881C_COMMAND_INSTR(0x02, 0x00),

drivers/gpu/drm/verisilicon/dw_hdmi-light.c

@@ -163,7 +163,7 @@ struct platform_driver dw_hdmi_light_platform_driver = {
 	},
 };
 
-MODULE_AUTHOR("You Xiao <youxiao.fc@alibaba-inc.com>");
+MODULE_AUTHOR("You Xiao <youxiao.fc@linux.alibaba.com>");
 MODULE_DESCRIPTION("Light Platforms Specific DW-HDMI Driver Extention");
 MODULE_LICENSE("GPL v2");
 MODULE_ALIAS("platform:dwhdmi-light");

drivers/gpu/drm/verisilicon/vs_dc_hw.c

@@ -1390,6 +1390,9 @@ int dc_hw_init(struct dc_hw *hw)
     dc_write(hw, DC_OVERLAY_WATER_MARK + 0xc, 0x3000);
     dc_write(hw, DC_QOS_CONFIG, 0xc0);
 
+    dc_write(hw, DC_CLK_GATTING, 0x0);
+    dc_write(hw, DC_CLK_GATTING + 0x4, 0x0);
+
     return 0;
 }
 

drivers/gpu/drm/verisilicon/vs_gem.c

@@ -227,10 +227,13 @@ static void vs_gem_free_object(struct drm_gem_object *obj)
 {
     struct vs_gem_object *vs_obj = to_vs_gem_object(obj);
 
-    if (obj->import_attach)
+    if (obj->import_attach) {
         drm_prime_gem_destroy(obj, vs_obj->sgt);
-    else
+        kvfree(vs_obj->pages);
+    }
+    else {
         vs_gem_free_buf(vs_obj);
+    }
 
     drm_gem_object_release(obj);