From d01df48030d91b24e9479625a7850c7206ff010e Mon Sep 17 00:00:00 2001 From: t61230 <765408972@qq.com> Date: Thu, 16 Mar 2023 02:30:29 +0000 Subject: [PATCH] sync audio patch --- arch/riscv/boot/dts/thead/light-lpi4a-ref.dts | 2 +- sound/soc/codecs/es7210.c | 16 +- sound/soc/codecs/es8156.c | 228 ++++++++++++------ sound/soc/thead/light-i2s.c | 6 +- 4 files changed, 175 insertions(+), 77 deletions(-) diff --git a/arch/riscv/boot/dts/thead/light-lpi4a-ref.dts b/arch/riscv/boot/dts/thead/light-lpi4a-ref.dts index 7c5179c5a..c70a08c08 100644 --- a/arch/riscv/boot/dts/thead/light-lpi4a-ref.dts +++ b/arch/riscv/boot/dts/thead/light-lpi4a-ref.dts @@ -1413,7 +1413,7 @@ reg = <1>; format = "i2s"; cpu { - sound-dai = <&i2s1 1>; + sound-dai = <&i2s1 0>; }; codec { sound-dai = <&es7210_audio_codec>; diff --git a/sound/soc/codecs/es7210.c b/sound/soc/codecs/es7210.c index fde12fd53..8d5d3a245 100644 --- a/sound/soc/codecs/es7210.c +++ b/sound/soc/codecs/es7210.c @@ -100,7 +100,7 @@ #define RATIO_128 0x01 #define RATIO_64 0x41 /* mclk from bclk pin */ -#define ES7210_MCLK_LRCK_RATIO RATIO_768 +#define ES7210_MCLK_LRCK_RATIO RATIO_64 struct i2c_client *i2c_clt1[ADC_DEV_MAXNUM]; @@ -162,6 +162,9 @@ static const struct es7210_reg_config es7210_tdm_reg_fmt_cfg[] = { }; static const struct es7210_reg_config es7210_tdm_reg_common_cfg2[] = { { 0x40, 0xC3 }, + { 0x14, 0x3C }, + { 0x15, 0x3C }, + { 0x17, 0x00 }, { 0x41, 0x70 }, { 0x42, 0x70 }, { 0x43, 0x1E }, @@ -299,7 +302,9 @@ static void es7210_tdm_init_codec(u8 mode) es7210_tdm_reg_common_cfg1[cnt].reg_v); } if(DOUBLESPEED) - es7210_multi_chips_update_bits(ES7210_MODE_CFG_REG08, 0x02, 0x02); + es7210_multi_chips_write(ES7210_MODE_CFG_REG08, 0x16); + else + es7210_multi_chips_write(ES7210_MODE_CFG_REG08, 0x14); switch (mode) { case ES7210_TDM_1LRCK_DSPA: @@ -319,7 +324,7 @@ static void es7210_tdm_init_codec(u8 mode) */ for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) { es7210_write(ES7210_SDP_CFG1_REG11, - 0x73, i2c_clt1[cnt]); + 0x83, i2c_clt1[cnt]); es7210_write(ES7210_SDP_CFG2_REG12, 0x01, i2c_clt1[cnt]); } @@ -380,7 +385,7 @@ static void es7210_tdm_init_codec(u8 mode) */ for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) { es7210_write(ES7210_SDP_CFG1_REG11, - 0x73, i2c_clt1[cnt]); + 0x83, i2c_clt1[cnt]); } for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) { if (cnt == 0) { @@ -486,6 +491,9 @@ static void es7210_tdm_init_codec(u8 mode) es7210_tdm_reg_common_cfg2[cnt].reg_addr, es7210_tdm_reg_common_cfg2[cnt].reg_v); } + es7210_multi_chips_write(0x4, 0x00); + es7210_multi_chips_write(0x5, 0x40); + switch (mode) { case ES7210_TDM_1LRCK_DSPA: case ES7210_TDM_1LRCK_DSPB: diff --git a/sound/soc/codecs/es8156.c b/sound/soc/codecs/es8156.c index a128dde00..47ab55ef0 100644 --- a/sound/soc/codecs/es8156.c +++ b/sound/soc/codecs/es8156.c @@ -161,6 +161,150 @@ static const struct snd_soc_dapm_route es8156_dapm_routes[] = { { "ROUT", NULL, "DACR" }, }; +/*************** parameter define ***************/ +#define STATEconfirm 0x0C +#define NORMAL_I2S 0x00 +#define NORMAL_LJ 0x01 +#define NORMAL_DSPA 0x03 +#define NORMAL_DSPB 0x07 +#define Format_Len24 0x00 +#define Format_Len20 0x01 +#define Format_Len18 0x02 +#define Format_Len16 0x03 +#define Format_Len32 0x04 + +#define VDDA_3V3 0x00 +#define VDDA_1V8 0x01 +#define MCLK_PIN 0x00 +#define SCLK_PIN 0x01 + +/**************************************************/ +#define MSMode_MasterSelOn 0 // SlaveMode:0, MasterMode:1 +#define Ratio 64 // Ratio = MCLK/LRCK on board +#define Format NORMAL_I2S +#define Format_Len Format_Len16 // data format +#define SCLK_DIV 8 // SCLK_DIV = MCLK/SCLK +#define SCLK_INV 0 +#define MCLK_SOURCE SCLK_PIN // select MCLK source, MCLK_PIN or SCLK_PIN +#define EQ7bandOn 0 +#define VDDA_VOLTAGE VDDA_3V3 +#define DAC_Volume 191 // DAC digital gain +#define DACHPModeOn 0 // disable:0, enable:1 + +/**************************************************/ + +static int es8156_init_sequence(struct snd_soc_component *codec) +{ + pr_debug("%s\n", __func__); + + snd_soc_component_write(codec,0x02,(MCLK_SOURCE<<7) + (SCLK_INV<<4) + (EQ7bandOn<<3) + 0x04 + MSMode_MasterSelOn); + snd_soc_component_write(codec,0x19,0x20); + + if(DACHPModeOn == 0) // output from PA + { + snd_soc_component_write(codec,0x20,0x2A); + snd_soc_component_write(codec,0x21,0x3C); + snd_soc_component_write(codec,0x22,0x02); + snd_soc_component_write(codec,0x24,0x07); + snd_soc_component_write(codec,0x23,0x40 + (0x30*VDDA_VOLTAGE)); + } + if(DACHPModeOn == 1) // output from headphone + { + snd_soc_component_write(codec,0x20,0x16); + snd_soc_component_write(codec,0x21,0x3F); + snd_soc_component_write(codec,0x22,0x0A); + snd_soc_component_write(codec,0x24,0x01); + snd_soc_component_write(codec,0x23,0xCA + (0x30*VDDA_VOLTAGE)); + } + snd_soc_component_write(codec,0x0A,0x01); + snd_soc_component_write(codec,0x0B,0x01); + //snd_soc_component_write(codec,0x11,NORMAL_I2S + (Format_Len<<4)); + snd_soc_component_write(codec,0x14,DAC_Volume); + if(Ratio == 1536) // Ratio=MCLK/LRCK=1536; 12M288/8K; 24M576/16K + { + snd_soc_component_write(codec,0x01,0x26 - (0x03*EQ7bandOn)); // 1536 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x09,0x00); // 1536 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x03,0x06); // LRCK H + snd_soc_component_write(codec,0x04,0x00); // LRCK=MCLK/1536 + snd_soc_component_write(codec,0x05,SCLK_DIV); // BCLK=MCLK/4 + } + if(Ratio == 1024) // Ratio=MCLK/LRCK=1024; 12M288/12K; 24M576/24K + { + snd_soc_component_write(codec,0x01,0x24 - (0x02*EQ7bandOn)); // 256 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x09,0x00); // 256 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x03,0x04); // LRCK H + snd_soc_component_write(codec,0x04,0x00); // LRCK=MCLK/256 + snd_soc_component_write(codec,0x05,SCLK_DIV); // BCLK=MCLK/4 + } + if(Ratio == 768) // Ratio=MCLK/LRCK=768; 12M288/16K; 24M576/32K + { + snd_soc_component_write(codec,0x01,0x23 + (0x40*EQ7bandOn)); // 768 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x09,0x00); // 768 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x03,0x03); // LRCK H + snd_soc_component_write(codec,0x04,0x00); // LRCK=MCLK/768 + snd_soc_component_write(codec,0x05,SCLK_DIV); // BCLK=MCLK/4 + } + if(Ratio == 512) // Ratio=MCLK/LRCK=512; 12M288/24K; 24M576/48K + { + snd_soc_component_write(codec,0x01,0xC0 + 0x22 - (0x01*EQ7bandOn)); // 512 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x09,0x00); // 512 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x03,0x02); // LRCK H + snd_soc_component_write(codec,0x04,0x00); // LRCK=MCLK/512 + snd_soc_component_write(codec,0x05,SCLK_DIV); //BCLK=MCLK/4 + } + if(Ratio == 400) // Ratio=MCLK/LRCK=400; 19M2/48K + { // DVDD must be 3.3V + snd_soc_component_write(codec,0x01,0x21 + (0x40*EQ7bandOn)); // 384 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x09,0x00); // 400 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x10,0x64); // 400 OSR + snd_soc_component_write(codec,0x03,0x01); // LRCK H + snd_soc_component_write(codec,0x04,0x90); // LRCK=MCLK/400 + snd_soc_component_write(codec,0x05,SCLK_DIV); // BCLK=MCLK/4 + } + if(Ratio == 384) // Ratio=MCLK/LRCK=384; 12M288/32K; 6M144/16K + { + snd_soc_component_write(codec,0x01,0x63 + (0x40*EQ7bandOn)); // 384 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x09,0x00); // 384 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x03,0x01); // LRCK H + snd_soc_component_write(codec,0x04,0x80); // LRCK=MCLK/384 + snd_soc_component_write(codec,0x05,SCLK_DIV); // BCLK=MCLK/4 + } + if(Ratio == 256) // Ratio=MCLK/LRCK=256; 12M288/48K + { + snd_soc_component_write(codec,0x01,0x21 + (0x40*EQ7bandOn)); // 256 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x09,0x00); // 256 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x03,0x01); // LRCK H + snd_soc_component_write(codec,0x04,0x00); // LRCK=MCLK/256 + snd_soc_component_write(codec,0x05,SCLK_DIV); // BCLK=MCLK/4 + } + if(Ratio == 128) // Ratio=MCLK/LRCK=128; 6M144/48K + { + snd_soc_component_write(codec,0x01,0x61 + (0x40*EQ7bandOn)); // 128 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x09,0x00); // 128 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x03,0x00); // LRCK H + snd_soc_component_write(codec,0x04,0x80); // LRCK=MCLK/128 + snd_soc_component_write(codec,0x05,SCLK_DIV); // BCLK=MCLK/4 + } + if(Ratio == 64) // Ratio=MCLK/LRCK=64; 3M072/48K + { + snd_soc_component_write(codec,0x01,0xE1); // 64 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x09,0x02); // 64 Ratio(MCLK/LRCK) + snd_soc_component_write(codec,0x03,0x00); // LRCK H + snd_soc_component_write(codec,0x04,0x40); // LRCK=MCLK/64 + snd_soc_component_write(codec,0x05,SCLK_DIV); // BCLK=MCLK/2 + } + + snd_soc_component_write(codec,0x0D,0x14); + snd_soc_component_write(codec,0x18,0x00); + snd_soc_component_write(codec,0x08,0x3F); + snd_soc_component_write(codec,0x00,0x02); + snd_soc_component_write(codec,0x00,0x03); + snd_soc_component_write(codec,0x25,0x20); + + return 0; +} + + static int es8156_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) { @@ -268,25 +412,7 @@ static int es8156_set_bias_level(struct snd_soc_component *codec, if (!IS_ERR(priv->mclk)) { ret = clk_prepare_enable(priv->mclk); - snd_soc_component_write(codec, ES8156_SCLK_MODE_REG02,0x04); - snd_soc_component_write(codec, ES8156_ANALOG_SYS1_REG20,0x2A); - snd_soc_component_write(codec, ES8156_ANALOG_SYS2_REG21,0x3C); - snd_soc_component_write(codec, ES8156_ANALOG_SYS3_REG22,0x08); - snd_soc_component_write(codec, ES8156_ANALOG_LP_REG24,0x07); - if(ES8156_DVDD==ES8156_1V8) - snd_soc_component_write(codec, ES8156_ANALOG_SYS4_REG23,VMIDLEVEL3<<4); - else - snd_soc_component_write(codec, ES8156_ANALOG_SYS4_REG23,0x00); - snd_soc_component_write(codec, ES8156_TIME_CONTROL1_REG0A,0x01); - snd_soc_component_write(codec, ES8156_TIME_CONTROL2_REG0B,0x01); - snd_soc_component_write(codec, ES8156_VOLUME_CONTROL_REG14,0xBF); - snd_soc_component_write(codec, ES8156_MAINCLOCK_CTL_REG01,0x21); - snd_soc_component_write(codec, ES8156_P2S_CONTROL_REG0D,0x14); - snd_soc_component_write(codec, ES8156_MISC_CONTROL3_REG18,0x00); - snd_soc_component_write(codec, ES8156_CLOCK_ON_OFF_REG08,0x3F); - snd_soc_component_write(codec, ES8156_RESET_REG00,0x02); - snd_soc_component_write(codec, ES8156_RESET_REG00,0x03); - snd_soc_component_write(codec, ES8156_ANALOG_SYS5_REG25,0x20); + es8156_init_sequence(codec); if (ret) { dev_err(codec->dev, @@ -299,22 +425,23 @@ static int es8156_set_bias_level(struct snd_soc_component *codec, break; case SND_SOC_BIAS_OFF: - snd_soc_component_write(codec, ES8156_VOLUME_CONTROL_REG14, 0x00); - snd_soc_component_write(codec, ES8156_EQ_CONTROL1_REG19, 0x02); - snd_soc_component_write(codec, ES8156_ANALOG_SYS2_REG21, 0x1F); - snd_soc_component_write(codec, ES8156_ANALOG_SYS3_REG22, 0x02); - snd_soc_component_write(codec, ES8156_ANALOG_SYS5_REG25, 0x21); - snd_soc_component_write(codec, ES8156_ANALOG_SYS5_REG25, 0x01); - snd_soc_component_write(codec, ES8156_ANALOG_SYS5_REG25, 0x87); - snd_soc_component_write(codec, ES8156_MISC_CONTROL3_REG18, 0x01); - snd_soc_component_write(codec, ES8156_MISC_CONTROL2_REG09, 0x02); - snd_soc_component_write(codec, ES8156_MISC_CONTROL2_REG09, 0x01); - snd_soc_component_write(codec, ES8156_CLOCK_ON_OFF_REG08, 0x00); + snd_soc_component_write(codec,0x14,0x00); + snd_soc_component_write(codec,0x19,0x02); + snd_soc_component_write(codec,0x22,0x02); + snd_soc_component_write(codec,0x25,0x81); + snd_soc_component_write(codec,0x18,0x01); + snd_soc_component_write(codec,0x09,0x02); + snd_soc_component_write(codec,0x09,0x01); + snd_soc_component_write(codec,0x08,0x00); + mdelay(500); + snd_soc_component_write(codec,0x25,0x87); /* *close i2s clock */ - if (!IS_ERR(priv->mclk)) + if (!IS_ERR(priv->mclk)) { + pr_info("%s codec_uninit_sequence\n", __func__); clk_disable_unprepare(priv->mclk); + } break; } return 0; @@ -347,43 +474,6 @@ static struct snd_soc_dai_driver es8156_dai = { }; -static int es8156_init_regs(struct snd_soc_component *codec) -{ - /* - *set clock and analog power - */ - snd_soc_component_write(codec, ES8156_SCLK_MODE_REG02,0x04); - snd_soc_component_write(codec, ES8156_ANALOG_SYS1_REG20,0x2A); - snd_soc_component_write(codec, ES8156_ANALOG_SYS2_REG21,0x3C); - snd_soc_component_write(codec, ES8156_ANALOG_SYS3_REG22,0x08); - snd_soc_component_write(codec, ES8156_ANALOG_LP_REG24,0x07); - if(ES8156_DVDD==ES8156_1V8) - snd_soc_component_write(codec, ES8156_ANALOG_SYS4_REG23,VMIDLEVEL3<<4); - else - snd_soc_component_write(codec, ES8156_ANALOG_SYS4_REG23,0x00); - /* - *set powerup time - */ - snd_soc_component_write(codec, ES8156_TIME_CONTROL1_REG0A,0x01); - snd_soc_component_write(codec, ES8156_TIME_CONTROL2_REG0B,0x01); - /* - *set digtal volume - */ - snd_soc_component_write(codec, ES8156_VOLUME_CONTROL_REG14,0xBF); - /* - *set MCLK - */ - snd_soc_component_write(codec, ES8156_MAINCLOCK_CTL_REG01,0x21); - snd_soc_component_write(codec, ES8156_P2S_CONTROL_REG0D,0x14); - snd_soc_component_write(codec, ES8156_MISC_CONTROL3_REG18,0x00); - snd_soc_component_write(codec, ES8156_CLOCK_ON_OFF_REG08,0x3F); - snd_soc_component_write(codec, ES8156_RESET_REG00,0x02); - snd_soc_component_write(codec, ES8156_RESET_REG00,0x03); - snd_soc_component_write(codec, ES8156_ANALOG_SYS5_REG25,0x20); - - return 0; -} - static int es8156_suspend(struct snd_soc_component *codec) { es8156_set_bias_level(codec, SND_SOC_BIAS_OFF); @@ -470,7 +560,7 @@ static int es8156_probe(struct snd_soc_component *codec) ret = clk_prepare_enable(es8156->mclk); #endif es8156_reset(codec); - es8156_init_regs(codec); + es8156_init_sequence(codec); return ret; } diff --git a/sound/soc/thead/light-i2s.c b/sound/soc/thead/light-i2s.c index 0280898c5..59a98eca8 100644 --- a/sound/soc/thead/light-i2s.c +++ b/sound/soc/thead/light-i2s.c @@ -568,11 +568,11 @@ static int light_audio_pinctrl(struct device *dev) light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA11, 0x8); light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA12, 0x8); } else if (!strcmp(i2s_priv->name, AUDIO_I2S1)) { - light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA6, 0x4); - light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA7, 0x4); - light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA13, 0x8); + light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA29, 0x5); + light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA30, 0x5); light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA14, 0x8); light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA15, 0x8); + light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA16, 0x8); light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA17, 0x8); } else if (!strcmp(i2s_priv->name, AUDIO_I2S2)) { light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA6, 0x5);