mirror of
https://github.com/revyos/thead-kernel.git
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223 lines
7.6 KiB
C
223 lines
7.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2021 Alibaba Group Holding Limited.
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*/
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#ifndef __DT_BINDINGS_CLOCK_LIGHT_H
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#define __DT_BINDINGS_CLOCK_LIGHT_H
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#define LIGHT_CLK_DUMMY 0
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#define LIGHT_CLK_32K 1
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#define LIGHT_CLK_24M 2
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#define LIGHT_RC_24M 3
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#define LIGHT_VIDEO_PLL_FOUTVCO 4
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#define LIGHT_VIDEO_PLL_FOUTPOSTDIV 5
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#define LIGHT_VIDEO_PLL_FOUT4 6
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#define LIGHT_VIDEO_PLL_BYPASS 7
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#define LIGHT_GMAC_PLL_FOUTVCO 8
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#define LIGHT_GMAC_PLL_FOUTPOSTDIV 9
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#define LIGHT_GMAC_PLL_FOUT1PH0 10
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#define LIGHT_GMAC_PLL_FOUT4 11
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#define LIGHT_GMAC_PLL_BYPASS 12
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#define LIGHT_AUDIO_PLL_FOUTVCO 13
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#define LIGHT_AUDIO_PLL_FOUTPOSTDIV 14
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#define LIGHT_AUDIO_PLL_FOUT3 15
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#define LIGHT_AUDIO_PLL_BYPASS 16
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#define LIGHT_SYS_PLL_FOUTVCO 17
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#define LIGHT_SYS_PLL_FOUTPOSTDIV 18
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#define LIGHT_SYS_PLL_FOUT4 19
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#define LIGHT_SYS_PLL_BYPASS 20
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#define LIGHT_CPU_PLL0_FOUTVCO 21
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#define LIGHT_CPU_PLL0_FOUTPOSTDIV 22
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#define LIGHT_CPU_PLL0_FOUT4 23
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#define LIGHT_CPU_PLL0_BYPASS 24
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#define LIGHT_CPU_PLL1_FOUTVCO 25
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#define LIGHT_CPU_PLL1_FOUTPOSTDIV 26
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#define LIGHT_CPU_PLL1_FOUT4 27
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#define LIGHT_CPU_PLL1_BYPASS 28
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#define LIGHT_DDR_PLL_FOUTVCO 29
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#define LIGHT_DDR_PLL_FOUTPOSTDIV 30
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#define LIGHT_DDR_PLL_FOUT4 31
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#define LIGHT_DDR_PLL_BYPASS 32
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#define LIGHT_AONSYS_CLK_SWITCH_0 33
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#define LIGHT_AONSYS_CLK_SWITCH_1 34
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#define LIGHT_AONSYS_CLK 35
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#define LIGHT_SHARE_SRAM_CLK 36
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#define LIGHT_CLKGEN_RTC_PCLK 37
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#define LIGHT_CLKGEN_AOGPIO_PCLK 38
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#define LIGHT_CLKGEN_AOI2C_PCLK 39
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#define LIGHT_CLKGEN_PVTC_PCLK 40
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#define LIGHT_CLKGEN_AOAHB_HCLK 41
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#define LIGHT_CLKGEN_AOSRAM_HCLK 42
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#define LIGHT_CLKGEN_AOAPB_HCLK 43
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#define LIGHT_CLKGEN_AOPAD_PCLK 44
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#define LIGHT_CLKGEN_AOTIMER_PCLK 45
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#define LIGHT_CLKGEN_AOTIMER_CCLK 46
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#define LIGHT_CLKGEN_SRAM_AXI_ACLK 47
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#define LIGHT_CLKGEN_CPU2RAM_X2X_ACLK_S 48
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#define LIGHT_CLKGEN_AOGPIO_DBCLK 49
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#define LIGHT_GMAC_CORECLK 50
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#define LIGHT_OSC_CLK_DIV24 51
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#define LIGHT_GMAC_PLL_FOUTVCO_DIV5 52
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#define LIGHT_C910_CCLK_I0 53
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#define LIGHT_C910_CCLK 54
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#define LIGHT_CPUSYS_AHB_HCLK 55
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#define LIGHT_CPUSYS_CFG_AXI_ACLK 56
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#define LIGHT_PERISYS_AHB_HCLK 57
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#define LIGHT_CLK_OUT_1 58
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#define LIGHT_CLK_OUT_2 59
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#define LIGHT_CLK_OUT_3 60
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#define LIGHT_CLK_OUT_4 61
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#define LIGHT_CPUSYS_AHB_HCLK_DIV 62
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#define LIGHT_APB3_CPUSYS_PCLK 63
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#define LIGHT_CPUSYS_SUB_AXI_ACLK 64
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#define LIGHT_CPUSYS_CFG_AXI_ACLK_DIV 65
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#define LIGHT_TEESYS_HCLK 66
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#define LIGHT_DMAC_1_CLK 67
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#define LIGHT_DMAC_2_CLK 68
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#define LIGHT_DMAC_3_CLK 69
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#define LIGHT_AXI_PORT4_CLK 70
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#define LIGHT_PERISYS_AHB_HCLK_DIV 71
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#define LIGHT_PERISYS_APB_PCLK 72
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#define LIGHT_CLK_OUT_1_DIV 73
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#define LIGHT_CLK_OUT_2_DIV 74
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#define LIGHT_CLK_OUT_3_DIV 75
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#define LIGHT_CLK_OUT_4_DIV 76
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#define LIGHT_CLKGEN_PERISYS_AXI_ACLK 77
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#define LIGHT_CLKGEN_PERISYS_AHB_HCLK 78
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#define LIGHT_CLKGEN_PERISYS_APB1_HCLK 79
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#define LIGHT_CLKGEN_PERISYS_APB2_HCLK 80
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#define LIGHT_CLKGEN_USB3_DRD_PHY_REF_CLK 81
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#define LIGHT_CLKGEN_USB3_DRD_CTRL_REF_CLK 82
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#define LIGHT_CLKGEN_USB3_DRD_SPDCLK 83
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#define LIGHT_CLKGEN_USB3_DRD_ACLK 84
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#define LIGHT_CLKGEN_EMMC1_X2X_ACLK 85
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#define LIGHT_CLKGEN_EMMC0_X2X_ACLK 86
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#define LIGHT_CLKGEN_EMMC0_HCLK 87
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#define LIGHT_CLKGEN_EMMC1_HCLK 88
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#define LIGHT_CLKGEN_GMAC_ACLK 89
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#define LIGHT_CLKGEN_PWM_PCLK 90
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#define LIGHT_CLKGEN_QSPI0_PCLK 91
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#define LIGHT_CLKGEN_QSPI1_PCLK 92
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#define LIGHT_CLKGEN_SPI_PCLK 93
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#define LIGHT_CLKGEN_UART0_PCLK 94
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#define LIGHT_CLKGEN_UART1_PCLK 95
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#define LIGHT_CLKGEN_UART2_PCLK 96
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#define LIGHT_CLKGEN_UART3_PCLK 97
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#define LIGHT_CLKGEN_UART4_PCLK 98
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#define LIGHT_CLKGEN_UART5_PCLK 99
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#define LIGHT_CLKGEN_GPIO0_PCLK 100
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#define LIGHT_CLKGEN_GPIO1_PCLK 101
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#define LIGHT_CLKGEN_GPIO2_PCLK 102
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#define LIGHT_CLKGEN_I2C0_IC_CLK 103
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#define LIGHT_CLKGEN_I2C1_IC_CLK 104
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#define LIGHT_CLKGEN_I2C2_IC_CLK 105
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#define LIGHT_CLKGEN_I2C3_IC_CLK 106
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#define LIGHT_CLKGEN_I2C4_IC_CLK 107
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#define LIGHT_CLKGEN_I2C5_IC_CLK 108
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#define LIGHT_CLKGEN_PERI2DDR_X2X_ACLK_M 109
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#define LIGHT_CLKGEN_AXI_DUMMY_SLV_4_ACLK 110
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#define LIGHT_CLKGEN_AXI_DUMMY_SLV_3_ACLK 111
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#define LIGHT_CLKGEN_AXI_DUMMY_SLV_2_ACLK 112
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#define LIGHT_CLKGEN_AXI_DUMMY_SLV_1_ACLK 113
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#define LIGHT_CLKGEN_APB_CPU2FG_HCLK 114
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#define LIGHT_CLKGEN_AON2CPU_A2X_ACLK 115
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#define LIGHT_CLKGEN_CPU2CFG_X2X_ACLK_M 116
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#define LIGHT_CLKGEN_CPU2RAM_X2X_ACLK_M 117
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#define LIGHT_CLKGEN_AXI4_CPUSYS2_ACLK 118
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#define LIGHT_CLKGEN_X2X_CPUSYS_ACLK_M 119
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#define LIGHT_CLKGEN_CHIP_DBG_ACLK 120
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#define LIGHT_CLKGEN_AXI4_CFG_BUS_ACLK 121
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#define LIGHT_CLKGEN_X2H_CPUSYS_ACLK 122
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#define LIGHT_CLKGEN_CPU2TEE_X2H_ACLK 123
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#define LIGHT_CLKGEN_CPU2AON_X2H_ACLK 124
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#define LIGHT_CLKGEN_CPU2CFG_X2H_ACLK 125
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#define LIGHT_CLKGEN_CPU2PERI_X2H_MHCLK 126
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#define LIGHT_CLKGEN_AHB2_CPUSYS_HCLK 127
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#define LIGHT_CLKGEN_APB3_CPUSYS_HCLK 128
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#define LIGHT_CLKGEN_C910_BROM_HCLK 129
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#define LIGHT_CLKGEN_DMAC_ACLK 130
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#define LIGHT_CLKGEN_MBOX0_PCLK 131
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#define LIGHT_CLKGEN_MBOX1_PCLK 132
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#define LIGHT_CLKGEN_MBOX2_PCLK 133
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#define LIGHT_CLKGEN_MBOX3_PCLK 134
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#define LIGHT_CLKGEN_WDT0_PCLK 135
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#define LIGHT_CLKGEN_WDT1_PCLK 136
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#define LIGHT_CLKGEN_TIMER0_CCLK 137
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#define LIGHT_CLKGEN_TIMER1_CCLK 138
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#define LIGHT_CLKGEN_TRNG_RB_HCLK 139
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#define LIGHT_CLKGEN_ADC_PCLK 140
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#define LIGHT_CLKGEN_AXI_ACLK_4 141
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#define LIGHT_CLKGEN_AXI_ACLK_3 142
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#define LIGHT_CLKGEN_AXI_ACLK_2 143
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#define LIGHT_CLKGEN_AXI_ACLK_1 145
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#define LIGHT_CLKGEN_AXI_ACLK_0 146
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#define LIGHT_CLKGEN_DMAC_1_ACLK 147
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#define LIGHT_CLKGEN_DMAC_2_ACLK 148
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#define LIGHT_CLKGEN_DMAC_3_ACLK 149
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#define LIGHT_CLKGEN_SRAM_AXI_PCLK 150
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#define LIGHT_CLKGEN_AHB2_TEESYS_HCLK 151
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#define LIGHT_CLKGEN_EFUSE_MPW_PCLK 152
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#define LIGHT_CLKGEN_CLK_OUT_4_CLK 153
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#define LIGHT_CLKGEN_CLK_OUT_3_CLK 154
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#define LIGHT_CLKGEN_CLK_OUT_2_CLK 155
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#define LIGHT_CLKGEN_CLK_OUT_1_CLK 156
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#define LIGHT_CLKGEN_DDR_APB_PCLK 157
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#define LIGHT_CLKGEN_PADCTRL_APSYS_PCLK 158
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#define LIGHT_CLKGEN_CHIP_DBG_CCLK 159
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#define LIGHT_CHIP_DBG_CCLK 160
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#define LIGHT_AXI_ACLK 161
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#define LIGHT_CLKGEN_CPU2CFG_X2X_ACLK_S 162
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#define LIGHT_CLKGEN_CPU2CFG_X2H_ACLK_S 163
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#define LIGHT_CLKGEN_AON2CPU_A2X_HCLK 164
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#define LIGHT_CLKGEN_DMAC_HCLK 165
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#define LIGHT_CLKGEN_X2H_CPUSYS_MHCLK 166
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#define LIGHT_CLKGEN_CPU2TEE_X2H_MHCLK 167
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#define LIGHT_CLKGEN_CPU2AON_X2H_MHCLK 168
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#define LIGHT_AXI_HCLK 169
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#define LIGHT_CLKGEN_CPU2CFG_X2H_MHCLK 170
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#define LIGHT_CLKGEN_TIMER0_PCLK 171
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#define LIGHT_CLKGEN_TIMER1_PCLK 172
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#define LIGHT_CLKGEN_PERI2DDR_X2X_ACLK_S 173
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#define LIGHT_CLKGEN_USB3_DRD_PCLK 174
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#define LIGHT_CLKGEN_GMAC_HCLK 175
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#define LIGHT_CLKGEN_GMAC_PCLK 176
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#define LIGHT_CLKGEN_GMAC_CCLK 177
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#define LIGHT_CLKGEN_EMMC0_ACLK 178
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#define LIGHT_CLKGEN_EMMC0_REF_CLK 179
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#define LIGHT_CLKGEN_EMMC0_OSC_CLK 180
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#define LIGHT_CLKGEN_EMMC1_ACLK 181
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#define LIGHT_CLKGEN_EMMC1_REF_CLK 182
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#define LIGHT_CLKGEN_EMMC1_OSC_CLK 183
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#define LIGHT_CLKGEN_PWM_CCLK 184
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#define LIGHT_CLKGEN_QSPI0_SSI_CLK 185
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#define LIGHT_CLKGEN_QSPI1_SSI_CLK 186
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#define LIGHT_CLKGEN_SPI_SSI_CLK 187
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#define LIGHT_CLKGEN_GPIO0_DBCLK 188
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#define LIGHT_CLKGEN_GPIO1_DBCLK 189
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#define LIGHT_CLKGEN_GPIO2_DBCLK 190
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#define LIGHT_CLKGEN_DMAC_1_HCLK 191
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#define LIGHT_CLKGEN_DMAC_2_HCLK 192
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#define LIGHT_CLKGEN_DMAC_3_HCLK 193
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#define LIGHT_EMMC_CLK_DIV 194
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#define LIGHT_EMMC0_OSC_CLK 195
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#define LIGHT_EMMC1_OSC_CLK 196
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#define LIGHT_PWM_CCLK 197
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#define LIGHT_USB3_PHY_REF_CLK 198
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#define LIGHT_SPI_CLK 199
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#define LIGHT_GPIO_DBCLK 200
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#define LIGHT_X2H_HCLK 201
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#define LIGHT_CLK_END 202
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#endif
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