mirror of
https://github.com/revyos/thead-kernel.git
synced 2026-06-21 09:12:26 +02:00
319 lines
7.9 KiB
C
319 lines
7.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* simple driver for PWM (Pulse Width Modulator) controller
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*
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*/
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#include <linux/bitfield.h>
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#include <linux/bitops.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/pwm.h>
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#include <linux/slab.h>
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#define MAX_PWM_NUM 6
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#define LIGHT_PWM_CHN_BASE(n) ((n) * 0x20)
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#define LIGHT_PWM_CTRL(n) (LIGHT_PWM_CHN_BASE(n) + 0x00)
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#define LIGHT_PWM_RPT(n) (LIGHT_PWM_CHN_BASE(n) + 0x04)
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#define LIGHT_PWM_PER(n) (LIGHT_PWM_CHN_BASE(n) + 0x08)
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#define LIGHT_PWM_FP(n) (LIGHT_PWM_CHN_BASE(n) + 0x0c)
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#define LIGHT_PWM_STATUS(n) (LIGHT_PWM_CHN_BASE(n) + 0x10)
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/* bit definition PWM_CTRL */
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#define PWM_START BIT(0)
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#define PWM_SOFT_RST BIT(1)
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#define PWM_CFG_UPDATE BIT(2)
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#define PWM_INT_EN BIT(3)
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#define PWM_ONE_SHOT_MODE BIT(4)
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#define PWM_CONTINUOUS_MODE BIT(5)
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#define PWM_EVT_RISING_TRIG_UNDER_ONE_SHOT BIT(6)
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#define PWM_EVT_FALLING_TRIG_UNDER_ONE_SHOT BIT(7)
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#define PWM_FPOUT BIT(8)
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#define PWM_INFACTOUT BIT(9)
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struct pwm_light_chip {
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struct clk *pwm_pclk;
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struct clk *pwm_cclk;
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void __iomem *mmio_base;
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struct pwm_chip chip;
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};
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#define to_pwm_light_chip(chip) container_of(chip, struct pwm_light_chip, chip)
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static int pwm_light_clk_prepare_enable(struct pwm_chip *chip)
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{
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struct pwm_light_chip *plc = to_pwm_light_chip(chip);
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int ret;
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ret = clk_prepare_enable(plc->pwm_pclk);
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if (ret)
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return ret;
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ret = clk_prepare_enable(plc->pwm_cclk);
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if (ret) {
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clk_disable_unprepare(plc->pwm_pclk);
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return ret;
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}
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return 0;
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}
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static void pwm_light_clk_disable_unprepare(struct pwm_chip *chip)
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{
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struct pwm_light_chip *plc = to_pwm_light_chip(chip);
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clk_disable_unprepare(plc->pwm_pclk);
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clk_disable_unprepare(plc->pwm_cclk);
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}
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static int pwm_light_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct pwm_light_chip *plc = to_pwm_light_chip(chip);
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u32 value;
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int ret;
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ret = pm_runtime_get_sync(chip->dev);
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if (ret < 0) {
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dev_err(chip->dev, "failed to clock on the pwm device(%d)\n", ret);
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pm_runtime_put_noidle(chip->dev);
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return ret;
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}
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value = readl(plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm));
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value |= PWM_START;
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writel(value, plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm));
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return 0;
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}
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static void pwm_light_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct pwm_light_chip *plc = to_pwm_light_chip(chip);
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u32 value;
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int ret;
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ret = pm_runtime_get_sync(chip->dev);
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if (ret < 0) {
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dev_err(chip->dev, "failed to clock on the pwm device(%d)\n", ret);
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pm_runtime_put_noidle(chip->dev);
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return;
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}
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value = readl(plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm));
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value &= ~PWM_START;
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writel(value, plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm));
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pm_runtime_put_sync(chip->dev);
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}
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static int pwm_light_config(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns)
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{
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struct pwm_light_chip *plc = to_pwm_light_chip(chip);
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unsigned long rate = clk_get_rate(plc->pwm_cclk);
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unsigned long duty_cycle, period_cycle;
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u32 pwm_cfg = PWM_INFACTOUT | PWM_FPOUT | PWM_CONTINUOUS_MODE | PWM_INT_EN;
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int ret;
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if (duty_ns > period_ns) {
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dev_err(chip->dev, "invalid pwm configure\n");
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return -EINVAL;
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}
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ret = pm_runtime_get_sync(chip->dev);
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if (ret < 0) {
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dev_err(chip->dev, "failed to clock on the pwm device(%d)\n", ret);
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pm_runtime_put_noidle(chip->dev);
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return ret;
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}
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writel(pwm_cfg, plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm)); //0x328
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period_cycle = period_ns * rate;
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pr_debug("[%s,%d]pwm cclock = %ldHZ, period_ns = %d, period_cycle = %ld, pwm id = %d\n", __func__, __LINE__,
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rate, period_ns, period_cycle, pwm->hwpwm);
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do_div(period_cycle, NSEC_PER_SEC);
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pr_debug("[%s,%d]pwm cclock = %ldHZ, period_ns = %d, period_cycle = %ld, pwm_id = %d\n", __func__, __LINE__,
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rate, period_ns, period_cycle, pwm->hwpwm);
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writel(period_cycle, plc->mmio_base + LIGHT_PWM_PER(pwm->hwpwm));
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duty_cycle = duty_ns * rate;
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do_div(duty_cycle, NSEC_PER_SEC);
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pr_debug("[%s, %d]duty_cycle = %ld\n", __func__, __LINE__, duty_cycle);
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writel(duty_cycle, plc->mmio_base + LIGHT_PWM_FP(pwm->hwpwm));
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pwm_cfg = readl(plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm));
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writel(pwm_cfg | PWM_CFG_UPDATE, plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm)); //0x32c
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pm_runtime_put_sync(chip->dev);
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return 0;
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}
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static int pwm_light_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm, enum pwm_polarity polarity)
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{
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struct pwm_light_chip *plc = to_pwm_light_chip(chip);
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u32 value = readl(plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm));
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int ret;
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ret = pm_runtime_get_sync(chip->dev);
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if (ret < 0) {
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dev_err(chip->dev, "failed to clock on the pwm device(%d)\n", ret);
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pm_runtime_put_noidle(chip->dev);
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return ret;
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}
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if (polarity == PWM_POLARITY_INVERSED)
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/* Duty cycle defines LOW period of PWM */
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value |= PWM_FPOUT;
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else
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/* Duty cycle defines HIGH period of PWM */
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value &= ~PWM_FPOUT;
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writel(value, plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm));
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pm_runtime_put_sync(chip->dev);
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return 0;
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}
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static const struct pwm_ops pwm_light_ops = {
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.enable = pwm_light_enable,
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.disable = pwm_light_disable,
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.config = pwm_light_config,
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.set_polarity = pwm_light_set_polarity,
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.owner = THIS_MODULE,
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};
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static int __maybe_unused light_pwm_runtime_suspend(struct device *dev)
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{
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struct pwm_light_chip *plc = dev_get_drvdata(dev);
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pwm_light_clk_disable_unprepare(&plc->chip);
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return 0;
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}
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static int __maybe_unused light_pwm_runtime_resume(struct device *dev)
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{
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struct pwm_light_chip *plc = dev_get_drvdata(dev);
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int ret;
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ret = pwm_light_clk_prepare_enable(&plc->chip);
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if (ret) {
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dev_err(dev, "failed to enable pwm clock(%d)\n", ret);
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return ret;
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}
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return 0;
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}
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static int pwm_light_probe(struct platform_device *pdev)
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{
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struct pwm_light_chip *plc;
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struct resource *res;
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int ret;
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plc = devm_kzalloc(&pdev->dev, sizeof(*plc), GFP_KERNEL);
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if (!plc)
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return -ENOMEM;
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platform_set_drvdata(pdev, plc);
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/* optional clock, default open */
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plc->pwm_pclk = devm_clk_get(&pdev->dev, "pclk");
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if (IS_ERR(plc->pwm_pclk)) {
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if (PTR_ERR(plc->pwm_pclk) != -EPROBE_DEFER)
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dev_err(&pdev->dev, "failed to get pwm pclk");
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return PTR_ERR(plc->pwm_pclk);
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}
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plc->pwm_cclk = devm_clk_get(&pdev->dev, "cclk");
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if (IS_ERR(plc->pwm_cclk)) {
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if (PTR_ERR(plc->pwm_cclk) != -EPROBE_DEFER)
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dev_err(&pdev->dev, "failed to get pwm cclk");
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return PTR_ERR(plc->pwm_cclk);
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}
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#ifndef CONFIG_PM
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ret = pwm_light_clk_prepare_enable(&plc->chip);
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if (ret) {
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dev_err(&pdev->dev, "failed to enable pwm clock(%d)\n", ret);
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return ret;
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}
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#endif
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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plc->mmio_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(plc->mmio_base))
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return PTR_ERR(plc->mmio_base);
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plc->chip.ops = &pwm_light_ops;
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plc->chip.dev = &pdev->dev;
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plc->chip.npwm = MAX_PWM_NUM;
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ret = pwmchip_add(&plc->chip);
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if (ret)
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return ret;
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pm_runtime_enable(&pdev->dev);
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dev_info(&pdev->dev, "succeed to add a pwm chip\n");
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return 0;
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}
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static int pwm_light_remove(struct platform_device *pdev)
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{
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struct pwm_light_chip *plc = platform_get_drvdata(pdev);
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pwm_light_clk_disable_unprepare(&plc->chip);
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pm_runtime_disable(&pdev->dev);
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return pwmchip_remove(&plc->chip);
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}
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static const struct of_device_id pwm_light_dt_ids[] = {
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{.compatible = "thead,pwm-light",},
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{/* sentinel */}
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};
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static const struct dev_pm_ops pwm_runtime_pm_ops = {
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SET_RUNTIME_PM_OPS(light_pwm_runtime_suspend, light_pwm_runtime_resume, NULL)
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};
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static struct platform_driver pwm_light_driver = {
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.driver = {
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.name = "pwm-light",
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.of_match_table = pwm_light_dt_ids,
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.pm = &pwm_runtime_pm_ops,
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},
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.probe = pwm_light_probe,
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.remove = pwm_light_remove,
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};
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module_platform_driver(pwm_light_driver);
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MODULE_AUTHOR("wei.liu <lw312886@linux.alibaba.com>");
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MODULE_DESCRIPTION("Thead light pwm driver");
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MODULE_LICENSE("GPL v2");
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