Jisheng Zhang 556f057aca riscv: cmpxchg: implement arch_cmpxchg64_{relaxed|acquire|release} ...

After selecting ARCH_USE_CMPXCHG_LOCKREF, one straight futher
optimization is implementing the arch_cmpxchg64_relaxed() because the
lockref code does not need the cmpxchg to have barrier semantics. At
the same time, implement arch_cmpxchg64_acquire and
arch_cmpxchg64_release as well.

However, on both TH1520 and JH7110 platforms, I didn't see obvious
performance improvement with Linus' test case [1]. IMHO, this may
be related with the fence and lr.d/sc.d hw implementations. In theory,
lr/sc without fence could give performance improvement over lr/sc plus
fence, so add the code here to leave performance improvement room on
newer HW platforms.

Link: http://marc.info/?l=linux-fsdevel&m=137782380714721&w=4 [1]
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>

2023-11-29 23:46:21 +08:00

..

asm

riscv: cmpxchg: implement arch_cmpxchg64_{relaxed|acquire|release}

2023-11-29 23:46:21 +08:00

uapi/asm

Linux_SDK_V1.0.2

2022-11-22 15:53:40 +08:00