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489 lines
19 KiB
C
489 lines
19 KiB
C
/*************************************************************************/ /*!
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@File
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@Title RGX HW Performance header file
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@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
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@Description Header for the RGX HWPerf functions
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@License Dual MIT/GPLv2
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The contents of this file are subject to the MIT license as set out below.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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Alternatively, the contents of this file may be used under the terms of
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the GNU General Public License Version 2 ("GPL") in which case the provisions
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of GPL are applicable instead of those above.
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If you wish to allow use of your version of this file only under the terms of
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GPL, and not to allow others to use your version of this file under the terms
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of the MIT license, indicate your decision by deleting the provisions above
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and replace them with the notice and other provisions required by GPL as set
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out in the file called "GPL-COPYING" included in this distribution. If you do
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not delete the provisions above, a recipient may use your version of this file
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under the terms of either the MIT license or GPL.
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This License is also included in this distribution in the file called
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"MIT-COPYING".
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EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
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PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
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BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
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PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
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COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/ /**************************************************************************/
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#ifndef RGXHWPERF_COMMON_H_
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#define RGXHWPERF_COMMON_H_
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#include "img_types.h"
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#include "img_defs.h"
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#include "pvrsrv_error.h"
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#include "device.h"
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#include "connection_server.h"
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#include "rgxdevice.h"
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#include "rgx_hwperf.h"
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/* HWPerf host buffer size constraints in KBs */
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#define HWPERF_HOST_TL_STREAM_SIZE_DEFAULT PVRSRV_APPHINT_HWPERFHOSTBUFSIZEINKB
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#define HWPERF_HOST_TL_STREAM_SIZE_MIN (32U)
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#define HWPERF_HOST_TL_STREAM_SIZE_MAX (3072U)
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/******************************************************************************
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* RGX HW Performance decode Bvnc Features for HWPerf
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*****************************************************************************/
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PVRSRV_ERROR RGXServerFeatureFlagsToHWPerfFlags(PVRSRV_RGXDEV_INFO *psDevInfo,
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RGX_HWPERF_BVNC *psBVNC);
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PVRSRV_ERROR PVRSRVRGXGetHWPerfBvncFeatureFlagsKM(CONNECTION_DATA *psConnection,
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PVRSRV_DEVICE_NODE *psDeviceNode,
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RGX_HWPERF_BVNC *psBVNC);
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/******************************************************************************
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* RGX HW Performance Data Transport Routines
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*****************************************************************************/
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PVRSRV_ERROR RGXHWPerfDataStoreCB(PVRSRV_DEVICE_NODE* psDevInfo);
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PVRSRV_ERROR RGXHWPerfInit(PVRSRV_RGXDEV_INFO *psRgxDevInfo);
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PVRSRV_ERROR RGXHWPerfInitOnDemandResources(PVRSRV_RGXDEV_INFO* psRgxDevInfo);
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void RGXHWPerfDeinit(PVRSRV_RGXDEV_INFO *psRgxDevInfo);
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void RGXHWPerfInitAppHintCallbacks(const PVRSRV_DEVICE_NODE *psDeviceNode);
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void RGXHWPerfClientInitAppHintCallbacks(void);
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/******************************************************************************
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* RGX HW Performance Profiling API(s)
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*****************************************************************************/
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PVRSRV_ERROR PVRSRVRGXCtrlHWPerfKM(
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CONNECTION_DATA * psConnection,
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PVRSRV_DEVICE_NODE * psDeviceNode,
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RGX_HWPERF_STREAM_ID eStreamId,
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IMG_BOOL bToggle,
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IMG_UINT64 ui64Mask);
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PVRSRV_ERROR PVRSRVRGXControlHWPerfBlocksKM(
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CONNECTION_DATA * psConnection,
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PVRSRV_DEVICE_NODE * psDeviceNode,
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IMG_BOOL bEnable,
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IMG_UINT32 ui32ArrayLen,
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IMG_UINT16 * psBlockIDs);
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/******************************************************************************
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* RGX HW Performance Host Stream API
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*****************************************************************************/
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PVRSRV_ERROR RGXHWPerfHostInit(PVRSRV_RGXDEV_INFO *psRgxDevInfo, IMG_UINT32 ui32BufSizeKB);
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PVRSRV_ERROR RGXHWPerfHostInitOnDemandResources(PVRSRV_RGXDEV_INFO* psRgxDevInfo);
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void RGXHWPerfHostDeInit(PVRSRV_RGXDEV_INFO *psRgxDevInfo);
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void RGXHWPerfHostSetEventFilter(PVRSRV_RGXDEV_INFO *psRgxDevInfo,
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IMG_UINT32 ui32Filter);
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void RGXHWPerfHostPostEnqEvent(PVRSRV_RGXDEV_INFO *psRgxDevInfo,
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RGX_HWPERF_KICK_TYPE eEnqType,
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IMG_UINT32 ui32Pid,
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IMG_UINT32 ui32FWDMContext,
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IMG_UINT32 ui32ExtJobRef,
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IMG_UINT32 ui32IntJobRef,
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PVRSRV_FENCE hCheckFence,
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PVRSRV_FENCE hUpdateFence,
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PVRSRV_TIMELINE hUpdateTimeline,
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IMG_UINT64 ui64CheckFenceUID,
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IMG_UINT64 ui64UpdateFenceUID,
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IMG_UINT64 ui64DeadlineInus,
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IMG_UINT32 ui32CycleEstimate);
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void RGXHWPerfHostPostAllocEvent(PVRSRV_RGXDEV_INFO *psRgxDevInfo,
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RGX_HWPERF_HOST_RESOURCE_TYPE eAllocType,
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const IMG_CHAR *psName,
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IMG_UINT32 ui32NameSize,
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RGX_HWPERF_HOST_ALLOC_DETAIL *puAllocDetail);
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void RGXHWPerfHostPostFreeEvent(PVRSRV_RGXDEV_INFO *psRgxDevInfo,
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RGX_HWPERF_HOST_RESOURCE_TYPE eFreeType,
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IMG_UINT64 ui64UID,
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IMG_UINT32 ui32PID,
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IMG_UINT32 ui32FWAddr);
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void RGXHWPerfHostPostModifyEvent(PVRSRV_RGXDEV_INFO *psRgxDevInfo,
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RGX_HWPERF_HOST_RESOURCE_TYPE eModifyType,
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IMG_UINT64 ui64NewUID,
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IMG_UINT64 ui64UID1,
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IMG_UINT64 ui64UID2,
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const IMG_CHAR *psName,
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IMG_UINT32 ui32NameSize);
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void RGXHWPerfHostPostUfoEvent(PVRSRV_RGXDEV_INFO *psRgxDevInfo,
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RGX_HWPERF_UFO_EV eUfoType,
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RGX_HWPERF_UFO_DATA_ELEMENT *psUFOData,
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const IMG_BOOL bSleepAllowed);
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void RGXHWPerfHostPostClkSyncEvent(PVRSRV_RGXDEV_INFO *psRgxDevInfo);
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void RGXHWPerfHostPostDeviceInfo(PVRSRV_RGXDEV_INFO *psRgxDevInfo,
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RGX_HWPERF_DEV_INFO_EV eEvType,
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PVRSRV_DEVICE_HEALTH_STATUS eDeviceHealthStatus,
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PVRSRV_DEVICE_HEALTH_REASON eDeviceHeathReason);
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void RGXHWPerfHostPostInfo(PVRSRV_RGXDEV_INFO *psRgxDevInfo,
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RGX_HWPERF_INFO_EV eEvType);
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void RGXHWPerfHostPostFenceWait(PVRSRV_RGXDEV_INFO *psRgxDevInfo,
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RGX_HWPERF_HOST_SYNC_FENCE_WAIT_TYPE eType,
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IMG_PID uiPID,
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PVRSRV_FENCE hFence,
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IMG_UINT32 ui32Data);
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void RGXHWPerfHostPostSWTimelineAdv(PVRSRV_RGXDEV_INFO *psRgxDevInfo,
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IMG_PID uiPID,
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PVRSRV_TIMELINE hSWTimeline,
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IMG_UINT64 ui64SyncPtIndex);
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IMG_BOOL RGXHWPerfHostIsEventEnabled(PVRSRV_RGXDEV_INFO *psRgxDevInfo, RGX_HWPERF_HOST_EVENT_TYPE eEvent);
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#define _RGX_HWPERF_HOST_FILTER(CTX, EV) \
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(((PVRSRV_RGXDEV_INFO *)CTX->psDeviceNode->pvDevice)->ui32HWPerfHostFilter \
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& RGX_HWPERF_EVENT_MASK_VALUE(EV))
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#define _RGX_DEVICE_INFO_FROM_CTX(CTX) \
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((PVRSRV_RGXDEV_INFO *)CTX->psDeviceNode->pvDevice)
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#define _RGX_DEVICE_INFO_FROM_NODE(DEVNODE) \
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((PVRSRV_RGXDEV_INFO *)DEVNODE->pvDevice)
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/* Deadline and cycle estimate is not supported for all ENQ events */
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#define NO_DEADLINE 0
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#define NO_CYCEST 0
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#if defined(SUPPORT_RGX)
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/**
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* This macro checks if HWPerfHost and the event are enabled and if they are
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* it posts event to the HWPerfHost stream.
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*
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* @param C Kick context
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* @param P Pid of kicking process
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* @param X Related FW context
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* @param E External job reference
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* @param I Job ID
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* @param K Kick type
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* @param CF Check fence handle
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* @param UF Update fence handle
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* @param UT Update timeline (on which above UF was created) handle
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* @param CHKUID Check fence UID
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* @param UPDUID Update fence UID
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* @param D Deadline
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* @param CE Cycle estimate
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*/
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#define RGXSRV_HWPERF_ENQ(C, P, X, E, I, K, CF, UF, UT, CHKUID, UPDUID, D, CE) \
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do { \
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if (_RGX_HWPERF_HOST_FILTER(C, RGX_HWPERF_HOST_ENQ)) \
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{ \
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RGXHWPerfHostPostEnqEvent(_RGX_DEVICE_INFO_FROM_CTX(C), \
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(K), (P), (X), (E), (I), \
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(CF), (UF), (UT), \
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(CHKUID), (UPDUID), (D), (CE)); \
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} \
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} while (0)
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/**
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* This macro checks if HWPerfHost and the event are enabled and if they are
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* it posts event to the HWPerfHost stream.
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*
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* @param I Device Info pointer
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* @param T Host UFO event type
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* @param D Pointer to UFO data
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* @param S Is sleeping allowed?
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*/
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#define RGXSRV_HWPERF_UFO(I, T, D, S) \
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do { \
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if (RGXHWPerfHostIsEventEnabled((I), RGX_HWPERF_HOST_UFO)) \
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{ \
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RGXHWPerfHostPostUfoEvent((I), (T), (D), (S)); \
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} \
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} while (0)
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/**
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* This macro checks if HWPerfHost and the event are enabled and if they are
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* it posts event to the HWPerfHost stream.
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*
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* @param D Device node pointer
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* @param T Host ALLOC event type
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* @param FWADDR sync firmware address
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* @param N string containing sync name
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* @param Z string size including null terminating character
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*/
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#define RGXSRV_HWPERF_ALLOC(D, T, FWADDR, N, Z) \
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do { \
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if (RGXHWPerfHostIsEventEnabled(_RGX_DEVICE_INFO_FROM_NODE(D), RGX_HWPERF_HOST_ALLOC)) \
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{ \
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RGX_HWPERF_HOST_ALLOC_DETAIL uAllocDetail; \
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uAllocDetail.sSyncAlloc.ui32FWAddr = (FWADDR); \
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RGXHWPerfHostPostAllocEvent(_RGX_DEVICE_INFO_FROM_NODE(D), \
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RGX_HWPERF_HOST_RESOURCE_TYPE_##T, \
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(N), (Z), &uAllocDetail); \
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} \
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} while (0)
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/**
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* This macro checks if HWPerfHost and the event are enabled and if they are
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* it posts event to the HWPerfHost stream.
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*
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* @param D Device Node pointer
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* @param PID ID of allocating process
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* @param FENCE PVRSRV_FENCE object
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* @param FWADDR sync firmware address
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* @param N string containing sync name
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* @param Z string size including null terminating character
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*/
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#define RGXSRV_HWPERF_ALLOC_FENCE(D, PID, FENCE, FWADDR, N, Z) \
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do { \
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if (RGXHWPerfHostIsEventEnabled(_RGX_DEVICE_INFO_FROM_NODE(D), RGX_HWPERF_HOST_ALLOC)) \
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{ \
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RGX_HWPERF_HOST_ALLOC_DETAIL uAllocDetail; \
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uAllocDetail.sFenceAlloc.uiPID = (PID); \
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uAllocDetail.sFenceAlloc.hFence = (FENCE); \
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uAllocDetail.sFenceAlloc.ui32CheckPt_FWAddr = (FWADDR); \
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RGXHWPerfHostPostAllocEvent(_RGX_DEVICE_INFO_FROM_NODE(D), \
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RGX_HWPERF_HOST_RESOURCE_TYPE_FENCE_PVR, \
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N, Z, &uAllocDetail); \
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} \
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} while (0)
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/**
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* @param D Device Node pointer
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* @param TL PVRSRV_TIMELINE on which CP is allocated
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* @param PID Allocating process ID of this TL/FENCE
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* @param FENCE PVRSRV_FENCE as passed to SyncCheckpointResolveFence OR PVRSRV_NO_FENCE
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* @param FWADDR sync firmware address
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* @param N string containing sync name
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* @param Z string size including null terminating character
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*/
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#define RGXSRV_HWPERF_ALLOC_SYNC_CP(D, TL, PID, FENCE, FWADDR, N, Z) \
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do { \
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if (RGXHWPerfHostIsEventEnabled(_RGX_DEVICE_INFO_FROM_NODE(D), RGX_HWPERF_HOST_ALLOC)) \
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{ \
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RGX_HWPERF_HOST_ALLOC_DETAIL uAllocDetail; \
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uAllocDetail.sSyncCheckPointAlloc.ui32CheckPt_FWAddr = (FWADDR); \
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uAllocDetail.sSyncCheckPointAlloc.hTimeline = (TL); \
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uAllocDetail.sSyncCheckPointAlloc.uiPID = (PID); \
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uAllocDetail.sSyncCheckPointAlloc.hFence = (FENCE); \
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RGXHWPerfHostPostAllocEvent(_RGX_DEVICE_INFO_FROM_NODE(D), \
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RGX_HWPERF_HOST_RESOURCE_TYPE_SYNC_CP, \
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N, Z, &uAllocDetail); \
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} \
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} while (0)
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/**
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* @param D Device Node pointer
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* @param PID ID of allocating process
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* @param SW_FENCE PVRSRV_FENCE object
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* @param SW_TL PVRSRV_TIMELINE on which SW_FENCE is allocated
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* @param SPI Sync point index on the SW_TL on which this SW_FENCE is allocated
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* @param N string containing sync name
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* @param Z string size including null terminating character
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*/
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#define RGXSRV_HWPERF_ALLOC_SW_FENCE(D, PID, SW_FENCE, SW_TL, SPI, N, Z) \
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do { \
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if (RGXHWPerfHostIsEventEnabled(_RGX_DEVICE_INFO_FROM_NODE(D), RGX_HWPERF_HOST_ALLOC)) \
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{ \
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RGX_HWPERF_HOST_ALLOC_DETAIL uAllocDetail; \
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uAllocDetail.sSWFenceAlloc.uiPID = (PID); \
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uAllocDetail.sSWFenceAlloc.hSWFence = (SW_FENCE); \
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uAllocDetail.sSWFenceAlloc.hSWTimeline = (SW_TL); \
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uAllocDetail.sSWFenceAlloc.ui64SyncPtIndex = (SPI); \
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RGXHWPerfHostPostAllocEvent(_RGX_DEVICE_INFO_FROM_NODE(D), \
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RGX_HWPERF_HOST_RESOURCE_TYPE_FENCE_SW, \
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N, Z, &uAllocDetail); \
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} \
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} while (0)
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/**
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* This macro checks if HWPerfHost and the event are enabled and if they are
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* it posts event to the HWPerfHost stream.
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*
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* @param D Device Node pointer
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* @param T Host ALLOC event type
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* @param FWADDR sync firmware address
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*/
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#define RGXSRV_HWPERF_FREE(D, T, FWADDR) \
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do { \
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if (RGXHWPerfHostIsEventEnabled(_RGX_DEVICE_INFO_FROM_NODE(D), RGX_HWPERF_HOST_FREE)) \
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{ \
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RGXHWPerfHostPostFreeEvent(_RGX_DEVICE_INFO_FROM_NODE(D), \
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RGX_HWPERF_HOST_RESOURCE_TYPE_##T, \
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(0), (0), (FWADDR)); \
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} \
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} while (0)
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/**
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* This macro checks if HWPerfHost and the event are enabled and if they are
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* it posts event to the HWPerfHost stream.
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*
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* @param D Device Node pointer
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* @param T Host ALLOC event type
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* @param UID ID of input object
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* @param PID ID of allocating process
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* @param FWADDR sync firmware address
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*/
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#define RGXSRV_HWPERF_FREE_FENCE_SYNC(D, T, UID, PID, FWADDR) \
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do { \
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if (RGXHWPerfHostIsEventEnabled(_RGX_DEVICE_INFO_FROM_NODE(D), RGX_HWPERF_HOST_FREE)) \
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{ \
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RGXHWPerfHostPostFreeEvent(_RGX_DEVICE_INFO_FROM_NODE(D), \
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RGX_HWPERF_HOST_RESOURCE_TYPE_##T, \
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(UID), (PID), (FWADDR)); \
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} \
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} while (0)
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/**
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* This macro checks if HWPerfHost and the event are enabled and if they are
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* it posts event to the HWPerfHost stream.
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*
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* @param D Device Node pointer
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* @param T Host ALLOC event type
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* @param NEWUID ID of output object
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* @param UID1 ID of first input object
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* @param UID2 ID of second input object
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* @param N string containing new object's name
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* @param Z string size including null terminating character
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*/
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#define RGXSRV_HWPERF_MODIFY_FENCE_SYNC(D, T, NEWUID, UID1, UID2, N, Z) \
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do { \
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if (RGXHWPerfHostIsEventEnabled(_RGX_DEVICE_INFO_FROM_NODE(D), RGX_HWPERF_HOST_MODIFY)) \
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{ \
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RGXHWPerfHostPostModifyEvent(_RGX_DEVICE_INFO_FROM_NODE(D), \
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RGX_HWPERF_HOST_RESOURCE_TYPE_##T, \
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(NEWUID), (UID1), (UID2), N, Z); \
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} \
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} while (0)
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/**
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* This macro checks if HWPerfHost and the event are enabled and if they are
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* it posts event to the HWPerfHost stream.
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*
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* @param I Device info pointer
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*/
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#define RGXSRV_HWPERF_CLK_SYNC(I) \
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do { \
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if (RGXHWPerfHostIsEventEnabled((I), RGX_HWPERF_HOST_CLK_SYNC)) \
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{ \
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RGXHWPerfHostPostClkSyncEvent((I)); \
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} \
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} while (0)
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/**
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* This macro checks if HWPerfHost and the event are enabled and if they are
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* it posts a device info event to the HWPerfHost stream.
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*
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* @param I Device info pointer
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* @param T Event type
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* @param H Health status enum
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* @param R Health reason enum
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*/
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#define RGXSRV_HWPERF_DEVICE_INFO(I, T, H, R) \
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do { \
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if (RGXHWPerfHostIsEventEnabled((I), RGX_HWPERF_HOST_DEV_INFO)) \
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{ \
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RGXHWPerfHostPostDeviceInfo((I), (T), (H), (R)); \
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} \
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} while (0)
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/**
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* This macro checks if HWPerfHost and the event are enabled and if they are
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* it posts event to the HWPerfHost stream.
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*
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* @param I Device info pointer
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* @param T Event type
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*/
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#define RGXSRV_HWPERF_HOST_INFO(I, T) \
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do { \
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if (RGXHWPerfHostIsEventEnabled((I), RGX_HWPERF_HOST_INFO)) \
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{ \
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RGXHWPerfHostPostInfo((I), (T)); \
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} \
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} while (0)
|
|
|
|
/**
|
|
* @param I Device info pointer
|
|
* @param T Wait Event type
|
|
* @param PID Process ID that the following fence belongs to
|
|
* @param F Fence handle
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|
* @param D Data for this wait event type
|
|
*/
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|
#define RGXSRV_HWPERF_SYNC_FENCE_WAIT(I, T, PID, F, D) \
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|
do { \
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|
if (RGXHWPerfHostIsEventEnabled((I), RGX_HWPERF_HOST_SYNC_FENCE_WAIT)) \
|
|
{ \
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|
RGXHWPerfHostPostFenceWait(I, RGX_HWPERF_HOST_SYNC_FENCE_WAIT_TYPE_##T, \
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|
(PID), (F), (D)); \
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|
} \
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|
} while (0)
|
|
|
|
/**
|
|
* @param I Device info pointer
|
|
* @param PID Process ID that the following timeline belongs to
|
|
* @param F SW-timeline handle
|
|
* @param SPI Sync-pt index where this SW-timeline has reached
|
|
*/
|
|
#define RGXSRV_HWPERF_SYNC_SW_TL_ADV(I, PID, SW_TL, SPI)\
|
|
do { \
|
|
if (RGXHWPerfHostIsEventEnabled((I), RGX_HWPERF_HOST_SYNC_SW_TL_ADVANCE)) \
|
|
{ \
|
|
RGXHWPerfHostPostSWTimelineAdv((I), (PID), (SW_TL), (SPI)); \
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|
} \
|
|
} while (0)
|
|
#else
|
|
|
|
#define RGXSRV_HWPERF_ENQ(C, P, X, E, I, K, CF, UF, UT, CHKUID, UPDUID, D, CE)
|
|
#define RGXSRV_HWPERF_UFO(I, T, D, S)
|
|
#define RGXSRV_HWPERF_ALLOC(D, T, FWADDR, N, Z)
|
|
#define RGXSRV_HWPERF_ALLOC_FENCE(D, PID, FENCE, FWADDR, N, Z)
|
|
#define RGXSRV_HWPERF_ALLOC_SYNC_CP(D, TL, PID, FENCE, FWADDR, N, Z)
|
|
#define RGXSRV_HWPERF_ALLOC_SW_FENCE(D, PID, SW_FENCE, SW_TL, SPI, N, Z)
|
|
#define RGXSRV_HWPERF_FREE(D, T, FWADDR)
|
|
#define RGXSRV_HWPERF_FREE_FENCE_SYNC(D, T, UID, PID, FWADDR)
|
|
#define RGXSRV_HWPERF_MODIFY_FENCE_SYNC(D, T, NEWUID, UID1, UID2, N, Z)
|
|
#define RGXSRV_HWPERF_CLK_SYNC(I)
|
|
#define RGXSRV_HWPERF_DEVICE_INFO(I, T, H, R)
|
|
#define RGXSRV_HWPERF_HOST_INFO(I, T)
|
|
#define RGXSRV_HWPERF_SYNC_FENCE_WAIT(I, T, PID, F, D)
|
|
#define RGXSRV_HWPERF_SYNC_SW_TL_ADV(I, PID, SW_TL, SPI)
|
|
|
|
#endif
|
|
|
|
#endif /* RGXHWPERF_COMMON_H_ */
|