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Add a new driver npu-ax3386-gpl, default compile as module. The default generated modules are: - vha.ko - img_mem.ko - vha_info.ko Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
424 lines
16 KiB
C
424 lines
16 KiB
C
/*!
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*****************************************************************************
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*
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* @File vha.h
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* ---------------------------------------------------------------------------
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*
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* Copyright (c) Imagination Technologies Ltd.
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*
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* The contents of this file are subject to the MIT license as set out below.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* Alternatively, the contents of this file may be used under the terms of the
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* GNU General Public License Version 2 ("GPL")in which case the provisions of
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* GPL are applicable instead of those above.
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*
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* If you wish to allow use of your version of this file only under the terms
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* of GPL, and not to allow others to use your version of this file under the
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* terms of the MIT license, indicate your decision by deleting the provisions
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* above and replace them with the notice and other provisions required by GPL
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* as set out in the file called "GPLHEADER" included in this distribution. If
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* you do not delete the provisions above, a recipient may use your version of
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* this file under the terms of either the MIT license or GPL.
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*
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* This License is also included in this distribution in the file called
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* "MIT_COPYING".
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*
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*****************************************************************************/
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#ifndef _VHA_UAPI_H
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#define _VHA_UAPI_H
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#if defined(__KERNEL__)
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#include <linux/ioctl.h>
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#include <linux/types.h>
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#elif defined(__linux__)
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#include <sys/ioctl.h>
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#include <inttypes.h>
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#else
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#error unsupported build
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#endif
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#if defined(__cplusplus)
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extern "C" {
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#endif
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#define VHA_OCM_MAX_NUM_PAGES 128
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#define VHA_CORE_MAX_ALT_ADDRS 16
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#define VHA_MAX_CORES 8
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// represents OCM types,
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#define VHA_LOCAL_OCM 0 /* Local OCM */
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#define VHA_SHARED_OCM 1 /* Shared OCM */
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#define VHA_OCM_TYPE_MAX 2
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/* device hw properties */
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struct vha_hw_props {
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uint64_t product_id;
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uint64_t core_id;
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uint64_t soc_axi;
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uint8_t mmu_width; /* MMU address width: 40, or 0 if no MMU */
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uint8_t mmu_ver; /* MMU version */
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uint32_t mmu_pagesize; /* MMU page size */
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union {
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struct {
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unsigned rtm: 1;
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unsigned parity: 1;
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} supported;
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uint8_t features;
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};
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bool dummy_dev;
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bool skip_bvnc_check;
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bool use_pdump;
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uint8_t num_cnn_core_devs;
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uint32_t locm_size_bytes; /* per core */
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uint32_t socm_size_bytes; /* total size for all cores */
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uint32_t socm_core_size_bytes; /* per core */
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uint32_t clock_freq; /* hardware clock rate, kHz */
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} __attribute__((aligned(8)));
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struct vha_cnn_props {
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/* TOBEDONE */
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};
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/* command sent to device */
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enum vha_cmd_type {
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VHA_CMD_INVALID = 0x000,
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VHA_CMD_CNN_SUBMIT = 0x101,
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VHA_CMD_CNN_SUBMIT_MULTI,
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VHA_CMD_CNN_PDUMP_MSG
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};
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/* optional flags for commands */
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#define VHA_CMDFLAG_NOTIFY 0x0001 /* send response when cmd complete */
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#define VHA_CHECK_CRC 0x0002 /* check the combined CRCs */
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#define VHA_EXEC_TIME_SET 0x0004 /* execution time is valid */
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/*
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* message from user to be sent to VHA (write).
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* A command will contain a number of input and ouput buffers
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* and some command specific parameters.
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* Buffers must be identified by their buffer id.
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* All buffer ids must *precede* any other parameters:
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* input buf ids,
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* output buf ids,
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* followed by other parameters.
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*/
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struct vha_user_cmd {
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uint32_t cmd_id; /* arbitrary id for cmd */
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uint16_t cmd_type; /* enum vha_cmd_type */
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uint16_t flags; /* VHA_CMDFLAG_xxx */
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uint8_t priority; /* WL priority */
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uint8_t padding; /* padding to keep data 32bit aligned */
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uint8_t num_bufs; /* total number of buffers */
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uint8_t num_inbufs; /* number of input buffers */
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uint32_t data[0]; /* 0-N words: input bufids
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* followed by other bufids
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* followed by other parameters */
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};
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/* Structure defining hardware issues */
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struct vha_hw_brns {
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union {
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struct {
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unsigned bRN71649: 1;
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unsigned bRN71556: 1;
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unsigned bRN71338: 1;
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} bit;
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uint64_t map;
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};
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};
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/*
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* CNN_SUBMIT message written from user to VHA.
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* 3 input buffers: cmdstream, input image, coefficients
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* 1 output buffer
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* 1 internal buffer (optional)
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* offsets into the input and output buffers
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* and a register map: this tells the driver which alt-register-N
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* will contain the address of which buffer.
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*/
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struct vha_subseg_info {
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uint32_t cmdbuf_offset;
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uint32_t cmdbuf_size;
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};
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struct vha_user_cnn_submit_cmd {
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struct vha_user_cmd msg;
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uint32_t cmdbuf; /* bufid of cmdstream buffer */
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uint32_t bufs[VHA_CORE_MAX_ALT_ADDRS]; /* bufid of IN, COEFF, OUT, INTERNAL,CRC,DBG,WB buffers */
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uint32_t bufoffsets[VHA_CORE_MAX_ALT_ADDRS]; /* offsets into inbufs and outbufs buffers */
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uint32_t bufsizes[VHA_CORE_MAX_ALT_ADDRS]; /* sizes of the inbufs and outbufs buffers */
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uint8_t regidx[VHA_CORE_MAX_ALT_ADDRS]; /* register to be used for inbufs and outbufs */
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uint32_t onchipram_map_id; /* OCM mapping id - hot pages */
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uint32_t onchipram_bufs[VHA_OCM_TYPE_MAX]; /* OCM linear mapping buffers */
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uint32_t estimated_cycles; /* estimated number of cycles for this command */
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uint64_t expected_ip_capab; /* expected BVNC */
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uint64_t hw_brns; /* BRNSs bit map */
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uint32_t subseg_num; /* number of subsegments in subseg_info array */
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struct vha_subseg_info subseg_info[1]; /* there's always at least one subsegment */
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} __attribute__((aligned(8)));
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/*
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* CNN_SUBMIT_MULTI message written from user to VHA.
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* 3 input buffers: cmdstream(s), input image, coefficients
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* 1 output buffer
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* 1 internal buffer (optional)
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* offsets into the input and output buffers
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* and a register map: this tells the driver which alt-register-N
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* will contain the address of which buffer.
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*/
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struct vha_user_cnn_submit_multi_cmd {
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struct vha_user_cmd msg;
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uint32_t cmdbuf[VHA_MAX_CORES]; /* bufid of cmdstream buffer */
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uint32_t bufs[VHA_CORE_MAX_ALT_ADDRS]; /* bufid of IN, COEFF, OUT, INTERNAL,CRC,DBG,WB buffers */
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uint32_t bufoffsets[VHA_CORE_MAX_ALT_ADDRS]; /* offsets into inbufs and outbufs buffers */
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uint32_t bufsizes[VHA_CORE_MAX_ALT_ADDRS]; /* sizes of the inbufs and outbufs buffers */
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uint8_t regidx[VHA_CORE_MAX_ALT_ADDRS]; /* register to be used for inbufs and outbufs */
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uint8_t num_cores; /* number of cores required for this workload */
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uint32_t onchipram_bufs[VHA_OCM_TYPE_MAX]; /* OCM linear mapping buffers */
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uint32_t crcs[VHA_MAX_CORES]; /* golden CRCs */
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uint64_t exec_time; /* expected execution time */
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uint32_t shared_circ_buf_offs; /* circular buffer offset in the shared memory */
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uint32_t estimated_cycles; /* estimated number of cycles for this command */
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uint64_t expected_ip_capab; /* expected BVNC */
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uint64_t hw_brns; /* BRNSs bit map */
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} __attribute__((aligned(8)));
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/*
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* response from from kernel module to user.
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*/
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struct vha_user_rsp {
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uint32_t cmd_id; /* arbitrary id to identify cmd */
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uint32_t err_no; /* 0 if successful, else -ve */
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uint64_t rsp_err_flags;
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uint32_t data[0]; /* 0-N words of additional info */
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};
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/*
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* response returned after CNN_SUBMIT.
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*/
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struct vha_user_cnn_submit_rsp {
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struct vha_user_rsp msg;
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uint64_t last_proc_us; /* processing time in us,
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measured with system clock */
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uint32_t mem_usage; /* device memory used */
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uint32_t hw_cycles; /* hardware cycles used */
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} __attribute__((aligned(8)));
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#define MAX_VHA_USER_RSP_SIZE (sizeof(struct vha_user_cnn_submit_rsp))
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/* response returned when querying for heaps */
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struct vha_heap_data {
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uint32_t id; /* Heap ID */
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uint32_t type; /* Heap type */
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uint32_t attributes; /* Heap attributes
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defining capabilities that user may treat as hint
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when selecting the heap id during allocation/importing */
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};
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#define VHA_MAX_HEAPS 16
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struct vha_heaps_data {
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struct vha_heap_data heaps[VHA_MAX_HEAPS]; /* [OUT] Heap data */
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} __attribute__((aligned(8)));
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/* parameters to allocate a device buffer */
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struct vha_alloc_data {
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uint64_t size; /* [IN] Size of device memory (in bytes) */
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uint32_t heap_id; /* [IN] Heap ID of allocator
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or VHA_USE_DEFAULT_MEM_HEAP */
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uint32_t attributes; /* [IN] Attributes of buffer: img_mem_attr */
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char name[8]; /* [IN] short name for buffer */
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uint32_t buf_id; /* [OUT] Generated buffer ID */
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} __attribute__((aligned(8)));
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/* parameters to import a device buffer */
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struct vha_import_data {
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uint64_t size; /* [IN] Size of device memory (in bytes) */
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uint64_t buf_hnd; /* [IN] File descriptor/cpu pointer
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of buffer to import */
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uint32_t heap_id; /* [IN] Heap ID of allocator */
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uint32_t attributes; /* [IN] Attributes of buffer */
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char name[8]; /* [IN] short name for buffer */
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uint32_t buf_id; /* [OUT] Generated buffer ID */
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} __attribute__((aligned(8)));
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/* parameters to export a device buffer */
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struct vha_export_data {
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uint32_t buf_id; /* [IN] Buffer ID to be exported */
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uint64_t size; /* [IN] Size to be exported */
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uint32_t attributes; /* [IN] Attributes of buffer */
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uint64_t buf_hnd; /* [OUT] Buffer handle (file descriptor) */
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} __attribute__((aligned(8)));
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struct vha_free_data {
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uint32_t buf_id; /* [IN] ID of device buffer to free */
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};
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enum vha_map_flags {
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VHA_MAP_FLAG_NONE = 0x0,
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VHA_MAP_FLAG_READ_ONLY = 0x1,
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VHA_MAP_FLAG_WRITE_ONLY = 0x2,
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VHA_MAP_FLAG_IO = 0x4,
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VHA_MAP_FLAG_MODEL = 0x8,
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};
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/* parameters to map a buffer into device */
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struct vha_map_to_onchip_data {
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uint64_t virt_addr; /* [IN] Device virtual address of a mapping */
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uint32_t buf_id; /* [IN] ID of device buffer to map to VHA */
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uint32_t page_size; /* [IN] Page size */
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uint32_t num_pages; /* [IN] The number of pages to be mapped */
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uint32_t page_idxs[VHA_OCM_MAX_NUM_PAGES];
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/* [IN] Indexes of pages to be mapped */
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uint32_t map_id; /* [IN/OUT] if map_id == 0, creates new mapping
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and generates new map_id,
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otherwise using existing map_id*/
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} __attribute__((aligned(8)));
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/* parameters to map a buffer into device */
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struct vha_map_data {
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uint64_t virt_addr; /* [IN] Device virtual address to map */
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uint32_t buf_id; /* [IN] ID of device buffer to map to VHA */
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uint32_t flags; /* [IN] Mapping flags, see vha_map_flags */
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} __attribute__((aligned(8)));
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struct vha_unmap_data {
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uint32_t buf_id; /* [IN] ID of device buffer to unmap from VHA */
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} __attribute__((aligned(8)));
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enum vha_buf_status {
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VHA_BUF_UNFILLED,
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VHA_BUF_FILLED_BY_SW,
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VHA_BUF_FILLED_BY_HW
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};
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#define VHA_SYNC_NONE (-1)
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/* parameters to set buffer status ("filled" or "unfilled") */
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struct vha_buf_status_data {
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uint32_t buf_id;
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uint32_t status; /* enum vha_buf_status */
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int in_sync_fd; /* input sync to attach */
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bool out_sync_sig; /* output sync signal */
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} __attribute__((aligned(8)));
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enum vha_sync_op {
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VHA_SYNC_OP_CREATE_OUT, /* create output sync_fd */
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VHA_SYNC_OP_MERGE_IN, /* merge input sync_fds */
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VHA_SYNC_OP_RELEASE /* release syncs */
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};
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/* parameters to manage sync_fds */
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#define VHA_SYNC_MAX_BUF_IDS (VHA_CORE_MAX_ALT_ADDRS)
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#define VHA_SYNC_MAX_IN_SYNC_FDS (VHA_CORE_MAX_ALT_ADDRS)
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struct vha_sync_create_data {
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uint32_t buf_id_count; /* [IN] number of output buffers */
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uint32_t buf_ids[VHA_SYNC_MAX_BUF_IDS]; /* [IN] list of output buffer ids */
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};
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struct vha_sync_merge_data {
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uint32_t in_sync_fd_count; /* [IN] number of input sync_fds */
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int in_sync_fds[VHA_SYNC_MAX_IN_SYNC_FDS]; /* [IN] list of input sync_fds */
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};
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struct vha_sync_release_data {
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uint32_t buf_id_count; /* [IN] number of buffers */
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uint32_t buf_ids[VHA_SYNC_MAX_BUF_IDS]; /* [IN] list of buffer ids */
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};
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struct vha_sync_data {
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enum vha_sync_op op;
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union {
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struct vha_sync_create_data create_data; /* create output sync_fd data */
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struct vha_sync_merge_data merge_data; /* merge input sync_fds data */
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struct vha_sync_release_data release_data; /* release syncs data */
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};
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int sync_fd; /* [OUT] output sync_fd/sync_fd for merged input sync_fds */
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} __attribute__((aligned(8)));
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struct vha_cancel_data {
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uint32_t cmd_id; /* [IN] masked ID of commands to be cancelled */
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uint32_t cmd_id_mask; /* [IN] mask for command IDs to be cancelled */
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bool respond; /* [IN] if true, respond to this cancel request */
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} __attribute__((aligned(8)));
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struct vha_version_data {
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char digest[33]; /* [OUT] digest of this interface file */
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} __attribute__((aligned(8)));
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#define VHA_IOC_MAGIC 'q'
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#define VHA_IOC_HW_PROPS _IOR(VHA_IOC_MAGIC, 0, struct vha_hw_props)
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#define VHA_IOC_QUERY_HEAPS _IOR(VHA_IOC_MAGIC, 1, struct vha_heaps_data)
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#define VHA_IOC_ALLOC _IOWR(VHA_IOC_MAGIC, 2, struct vha_alloc_data)
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#define VHA_IOC_IMPORT _IOWR(VHA_IOC_MAGIC, 3, struct vha_import_data)
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#define VHA_IOC_EXPORT _IOWR(VHA_IOC_MAGIC, 4, struct vha_export_data)
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#define VHA_IOC_FREE _IOW(VHA_IOC_MAGIC, 5, struct vha_free_data)
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#define VHA_IOC_VHA_MAP_TO_ONCHIP _IOW(VHA_IOC_MAGIC, 6, struct vha_map_to_onchip_data)
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#define VHA_IOC_VHA_MAP _IOW(VHA_IOC_MAGIC, 7, struct vha_map_data)
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#define VHA_IOC_VHA_UNMAP _IOW(VHA_IOC_MAGIC, 8, struct vha_unmap_data)
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#define VHA_IOC_BUF_STATUS _IOW(VHA_IOC_MAGIC, 9, struct vha_buf_status_data)
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#define VHA_IOC_SYNC _IOWR(VHA_IOC_MAGIC, 10, struct vha_sync_data)
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#define VHA_IOC_CANCEL _IOW(VHA_IOC_MAGIC, 11, struct vha_cancel_data)
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#define VHA_IOC_VERSION _IOW(VHA_IOC_MAGIC, 16, struct vha_version_data)
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#define VHA_SCOPE_DEV_NAME "vha_scope"
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/* vha scope context
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* */
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struct vha_trace_ctx {
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unsigned model_id; /* model id */
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unsigned frame_id; /* inference id */
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unsigned dev_id; /* device id */
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unsigned osid; /* device id */
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unsigned pid; /* process id */
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unsigned tid; /* thread id */
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};
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/* Event information, available from vha_info */
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struct vha_timing_data {
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unsigned evt_type; /* event type */
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unsigned seqno; /* continually increments */
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unsigned dev_id; /* device id */
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unsigned timestamp_lo; /* in microseconds */
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unsigned timestamp_hi;
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unsigned type; /* either SUBMIT or COMPLETE or ERROR */
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unsigned cycles; /* HW cycle count */
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unsigned pid; /* process id */
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};
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enum vha_scope_evt_type {
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VHA_EVENT_TIMING,
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VHA_EVENT_NUM
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};
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enum vha_timing_data_type {
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VHA_EVENT_TYPE_ENQUEUE,
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VHA_EVENT_TYPE_SUBMIT,
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VHA_EVENT_TYPE_COMPLETE,
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VHA_EVENT_TYPE_ERROR,
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VHA_EVENT_TYPE_NUM
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};
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#if defined(__cplusplus)
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}
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#endif
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#endif /* _VHA_UAPI_H */
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