mirror of
https://github.com/revyos/thead-kernel.git
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125 lines
5.8 KiB
C
125 lines
5.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2022 Alibaba Group Holding Limited.
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*/
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#include <dt-bindings/clock/light-fm-ap-clock.h>
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#include <dt-bindings/clock/light-audiosys.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/types.h>
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#include "clk-gate.h"
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#include "../clk.h"
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static struct clk *gates[LIGHT_CLKGEN_AUDIO_CLK_END];
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static struct clk_onecell_data clk_gate_data;
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static int light_audiosys_clk_probe(struct platform_device *pdev)
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{
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struct regmap *audiosys_regmap;
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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int ret;
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audiosys_regmap = syscon_regmap_lookup_by_phandle(np, "audiosys-regmap");
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if (IS_ERR(audiosys_regmap)) {
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dev_err(&pdev->dev, "cannot find regmap for vi system register\n");
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return PTR_ERR(audiosys_regmap);
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}
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printk("%s audiosys_regmap=0x%px\n", __func__, audiosys_regmap);
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/* we assume that the gate clock is a root clock */
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gates[LIGHT_CLKGEN_AUDIO_CPU] = thead_gate_clk_register("clkgen_audiosys_cpu_clk", NULL,
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audiosys_regmap, 0x10, 0, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_SRAM0] = thead_gate_clk_register("clkgen_audiosys_sram0_clk", NULL,
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audiosys_regmap, 0x10, 1, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_SRAM1] = thead_gate_clk_register("clkgen_audiosys_sram1_clk", NULL,
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audiosys_regmap, 0x10, 2, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_DMA] = thead_gate_clk_register("clkgen_audiosys_dma_clk", NULL,
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audiosys_regmap, 0x10, 3, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_BSM] = thead_gate_clk_register("clkgen_audiosys_bsm_clk", NULL,
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audiosys_regmap, 0x10, 4, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_TIMER] = thead_gate_clk_register("clkgen_audiosys_timer_clk", NULL,
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audiosys_regmap, 0x10, 8, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_TIMER_CNT1] = thead_gate_clk_register("clkgen_audiosys_timer_cnt1_clk", NULL,
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audiosys_regmap, 0x10, 9, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_TIMER_CNT2] = thead_gate_clk_register("clkgen_audiosys_timer_cnt2_clk", NULL,
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audiosys_regmap, 0x10, 10, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_TIMER_CNT3] = thead_gate_clk_register("clkgen_audiosys_timer_cnt3_clk", NULL,
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audiosys_regmap, 0x10, 11, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_TIMER_CNT4] = thead_gate_clk_register("clkgen_audiosys_timer_cnt4_clk", NULL,
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audiosys_regmap, 0x10, 12, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_WDR] = thead_gate_clk_register("clkgen_audiosys_wdr_clk", NULL,
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audiosys_regmap, 0x10, 13, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_I2C0] = thead_gate_clk_register("clkgen_audiosys_i2c0_clk", NULL,
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audiosys_regmap, 0x10, 14, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_I2C1] = thead_gate_clk_register("clkgen_audiosys_i2c1_clk", NULL,
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audiosys_regmap, 0x10, 15, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_UART] = thead_gate_clk_register("clkgen_audiosys_uart_clk", NULL,
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audiosys_regmap, 0x10, 16, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_I2S0] = thead_gate_clk_register("clkgen_audiosys_i2s0_clk", NULL,
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audiosys_regmap, 0x10, 17, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_I2S1] = thead_gate_clk_register("clkgen_audiosys_i2s1_clk", NULL,
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audiosys_regmap, 0x10, 18, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_I2S2] = thead_gate_clk_register("clkgen_audiosys_i2s2_clk", NULL,
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audiosys_regmap, 0x10, 19, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_I2S8CH] = thead_gate_clk_register("clkgen_audiosys_i2s8ch_clk", NULL,
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audiosys_regmap, 0x10, 20, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_TDM] = thead_gate_clk_register("clkgen_audiosys_tdm_clk", NULL,
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audiosys_regmap, 0x10, 21, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_GPIO] = thead_gate_clk_register("clkgen_audiosys_gpio_clk", NULL,
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audiosys_regmap, 0x10, 22, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_SPDIF0] = thead_gate_clk_register("clkgen_audiosys_spdif0_clk", NULL,
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audiosys_regmap, 0x10, 23, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_SPDIF1] = thead_gate_clk_register("clkgen_audiosys_spdif1_clk", NULL,
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audiosys_regmap, 0x10, 24, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_VAD] = thead_gate_clk_register("clkgen_audiosys_vad_clk", NULL,
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audiosys_regmap, 0x10, 25, GATE_NOT_SHARED, NULL, dev);
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gates[LIGHT_CLKGEN_AUDIO_IOMUX] = thead_gate_clk_register("clkgen_audiosys_iomux_clk", NULL,
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audiosys_regmap, 0x10, 26, GATE_NOT_SHARED, NULL, dev);
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clk_gate_data.clks = gates;
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clk_gate_data.clk_num = ARRAY_SIZE(gates);
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ret = of_clk_add_provider(np, of_clk_src_onecell_get, &clk_gate_data);
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if (ret < 0) {
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dev_err(dev, "failed to register gate clks for light audiosys\n");
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goto unregister_clks;
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}
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dev_info(dev, "succeed to register audiosys gate clock provider\n");
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return 0;
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unregister_clks:
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thead_unregister_clocks(gates, ARRAY_SIZE(gates));
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return ret;
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}
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static const struct of_device_id audiosys_clk_gate_of_match[] = {
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{ .compatible = "thead,audiosys-gate-controller" },
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{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(of, audiosys_clk_gate_of_match);
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static struct platform_driver light_audiosys_clk_driver = {
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.probe = light_audiosys_clk_probe,
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.driver = {
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.name = "audiosys-clk-gate-provider",
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.of_match_table = of_match_ptr(audiosys_clk_gate_of_match),
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},
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};
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module_platform_driver(light_audiosys_clk_driver);
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MODULE_AUTHOR("nanli.yd <nanli.yd@linux.alibaba.com>");
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MODULE_DESCRIPTION("Thead Light Fullmask audiosys clock gate provider");
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MODULE_LICENSE("GPL v2");
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