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634 lines
16 KiB
C
634 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2011 Google, Inc.
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* Copyright (C) 2012 Intel, Inc.
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* Copyright (C) 2013 Intel, Inc.
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* Copyright (C) 2014 Linaro Limited
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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/* This source file contains the implementation of the legacy version of
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* a goldfish pipe device driver. See goldfish_pipe_v2.c for the current
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* version.
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*/
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/spinlock.h>
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#include <linux/miscdevice.h>
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#include <linux/platform_device.h>
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#include <linux/poll.h>
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#include <linux/sched.h>
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#include <linux/bitops.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/dma-mapping.h>
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#include <linux/mm.h>
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#include <linux/bug.h>
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#include <linux/goldfish.h>
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#include "goldfish_pipe_qemu.h"
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#include "goldfish_pipe.h"
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#define MAX_PAGES_TO_GRAB 32
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/* A value that will not be set by qemu emulator */
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#define INITIAL_BATCH_RESULT (0xdeadbeaf)
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struct goldfish_pipe_dev;
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/* This data type models a given pipe instance */
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struct goldfish_pipe {
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struct goldfish_pipe_dev *dev;
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/* The wake flags pipe is waiting for
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* Note: not protected with any lock, uses atomic operations
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* and barriers to make it thread-safe.
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*/
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unsigned long flags;
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wait_queue_head_t wake_queue;
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/* protects access to the pipe */
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struct mutex lock;
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};
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struct access_params {
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unsigned long channel;
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u32 size;
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unsigned long address;
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u32 cmd;
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u32 result;
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/* reserved for future extension */
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u32 flags;
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};
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/* The driver state. Holds a reference to the i/o page used to
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* communicate with the emulator, and a wake queue for blocked tasks
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* waiting to be awoken.
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*/
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struct goldfish_pipe_dev {
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/* Needed for the 'remove' call */
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struct goldfish_pipe_dev_base super;
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/* ptr to platform device's device struct */
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struct device *pdev_dev;
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/* the base address for MMIO */
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char __iomem *base;
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struct access_params *aps;
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struct miscdevice miscdev;
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/* Global device spinlock */
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spinlock_t lock;
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};
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static int goldfish_pipe_device_deinit(void *raw_dev,
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struct platform_device *pdev);
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static u32 goldfish_cmd_status(struct goldfish_pipe *pipe, u32 cmd)
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{
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unsigned long flags;
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u32 status;
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struct goldfish_pipe_dev *dev = pipe->dev;
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spin_lock_irqsave(&dev->lock, flags);
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gf_write_ptr(pipe, dev->base + PIPE_V1_REG_CHANNEL,
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dev->base + PIPE_V1_REG_CHANNEL_HIGH);
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writel(cmd, dev->base + PIPE_V1_REG_COMMAND);
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status = readl(dev->base + PIPE_V1_REG_STATUS);
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spin_unlock_irqrestore(&dev->lock, flags);
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return status;
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}
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static void goldfish_cmd(struct goldfish_pipe *pipe, u32 cmd)
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{
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unsigned long flags;
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struct goldfish_pipe_dev *dev = pipe->dev;
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spin_lock_irqsave(&dev->lock, flags);
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gf_write_ptr(pipe, dev->base + PIPE_V1_REG_CHANNEL,
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dev->base + PIPE_V1_REG_CHANNEL_HIGH);
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writel(cmd, dev->base + PIPE_V1_REG_COMMAND);
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spin_unlock_irqrestore(&dev->lock, flags);
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}
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/* This function converts an error code returned by the emulator through
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* the PIPE_V1_REG_STATUS i/o register into a valid negative errno value.
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*/
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static int goldfish_pipe_error_convert(int status)
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{
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switch (status) {
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case PIPE_ERROR_AGAIN:
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return -EAGAIN;
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case PIPE_ERROR_NOMEM:
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return -ENOMEM;
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case PIPE_ERROR_IO:
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return -EIO;
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default:
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return -EINVAL;
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}
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}
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/*
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* Notice: QEMU will return 0 for un-known register access, indicating
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* access_params is supported or not
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*/
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static int valid_batchbuffer_addr(struct goldfish_pipe_dev *dev,
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struct access_params *aps)
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{
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u32 aph, apl;
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u64 paddr;
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aph = readl(dev->base + PIPE_V1_REG_PARAMS_ADDR_HIGH);
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apl = readl(dev->base + PIPE_V1_REG_PARAMS_ADDR_LOW);
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paddr = ((u64)aph << 32) | apl;
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return paddr == (__pa(aps));
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}
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static int setup_access_params_addr(struct platform_device *pdev,
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struct goldfish_pipe_dev *dev)
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{
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u64 paddr;
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struct access_params *aps;
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aps = devm_kzalloc(&pdev->dev, sizeof(struct access_params),
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GFP_KERNEL);
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if (!aps)
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return -ENOMEM;
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paddr = __pa(aps);
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writel((u32)(paddr >> 32), dev->base + PIPE_V1_REG_PARAMS_ADDR_HIGH);
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writel((u32)paddr, dev->base + PIPE_V1_REG_PARAMS_ADDR_LOW);
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if (valid_batchbuffer_addr(dev, aps)) {
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dev->aps = aps;
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return 0;
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}
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devm_kfree(&pdev->dev, aps);
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return -EFAULT;
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}
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static int access_with_param(struct goldfish_pipe_dev *dev, const int cmd,
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unsigned long address, unsigned long avail,
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struct goldfish_pipe *pipe, int *status)
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{
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struct access_params *aps = dev->aps;
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if (!aps)
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return -EINVAL;
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aps->result = INITIAL_BATCH_RESULT;
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aps->channel = (unsigned long)pipe;
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aps->size = avail;
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aps->address = address;
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aps->cmd = cmd;
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writel(cmd, dev->base + PIPE_V1_REG_ACCESS_PARAMS);
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/*
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* If the aps->result has not changed, that means
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* that the batch command failed
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*/
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if (aps->result == INITIAL_BATCH_RESULT)
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return -EINVAL;
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*status = aps->result;
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return 0;
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}
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static int transfer_pages(struct goldfish_pipe_dev *dev,
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struct goldfish_pipe *pipe,
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int cmd,
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unsigned long xaddr,
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unsigned long size)
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{
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unsigned long irq_flags;
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int status = 0;
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spin_lock_irqsave(&dev->lock, irq_flags);
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if (access_with_param(dev, cmd, xaddr, size, pipe, &status)) {
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gf_write_ptr(pipe, dev->base + PIPE_V1_REG_CHANNEL,
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dev->base + PIPE_V1_REG_CHANNEL_HIGH);
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writel(size, dev->base + PIPE_V1_REG_SIZE);
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gf_write_ptr((void *)xaddr,
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dev->base + PIPE_V1_REG_ADDRESS,
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dev->base + PIPE_V1_REG_ADDRESS_HIGH);
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writel(cmd, dev->base + PIPE_V1_REG_COMMAND);
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status = readl(dev->base + PIPE_V1_REG_STATUS);
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}
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spin_unlock_irqrestore(&dev->lock, irq_flags);
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return status;
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}
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static unsigned long translate_address(const struct page *page,
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unsigned long addr)
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{
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return page_to_phys(page) | (addr & ~PAGE_MASK);
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}
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static ssize_t goldfish_pipe_read_write(struct file *filp, char __user *buffer,
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size_t bufflen, int is_write)
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{
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struct goldfish_pipe *pipe = filp->private_data;
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struct goldfish_pipe_dev *dev = pipe->dev;
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unsigned long address;
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unsigned long address_end;
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const int wake_bit = is_write ? BIT_WAKE_ON_WRITE : BIT_WAKE_ON_READ;
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const int pipe_cmd = is_write ? PIPE_CMD_WRITE : PIPE_CMD_READ;
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int count = 0;
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int ret = -EINVAL;
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/* If the emulator already closed the pipe, no need to go further */
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if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
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return -EIO;
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/* Null reads or writes succeeds */
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if (unlikely(bufflen == 0))
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return 0;
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/* Check the buffer range for access */
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if (!access_ok(buffer, bufflen))
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return -EFAULT;
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address = (unsigned long)buffer;
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address_end = address + bufflen;
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/* Serialize access to the pipe */
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if (mutex_lock_interruptible(&pipe->lock))
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return -ERESTARTSYS;
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while (address < address_end) {
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struct page *pages[MAX_PAGES_TO_GRAB];
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unsigned long page_end = (address & PAGE_MASK) + PAGE_SIZE;
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unsigned long avail;
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unsigned long xaddr;
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unsigned long xaddr_prev;
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long first_page;
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long last_page;
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long requested_pages;
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int status;
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int n_pages;
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int page_i;
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int num_contiguous_pages;
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/*
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* Attempt to grab multiple physically contiguous pages.
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*/
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first_page = address & PAGE_MASK;
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last_page = (address_end - 1) & PAGE_MASK;
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requested_pages =
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min(((last_page - first_page) >> PAGE_SHIFT) + 1,
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(long)MAX_PAGES_TO_GRAB);
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ret = get_user_pages_fast(first_page, requested_pages,
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!is_write, pages);
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if (ret < 0) {
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dev_err(dev->pdev_dev,
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"%s: get_user_pages_fast failed: %d\n",
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__func__, ret);
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break;
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} else if (!ret) {
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dev_err(dev->pdev_dev,
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"%s: error: no pages returned, requested %ld\n",
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__func__, requested_pages);
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break;
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}
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n_pages = ret;
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xaddr = translate_address(pages[0], address);
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xaddr_prev = xaddr;
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num_contiguous_pages = 1;
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for (page_i = 1; page_i < n_pages; page_i++) {
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unsigned long xaddr_i;
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xaddr_i = translate_address(pages[page_i], address);
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if (xaddr_i == xaddr_prev + PAGE_SIZE) {
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page_end += PAGE_SIZE;
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xaddr_prev = xaddr_i;
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num_contiguous_pages++;
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} else {
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dev_err(dev->pdev_dev,
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"%s: discontinuous page boundary: %d "
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"pages instead\n",
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__func__, page_i);
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break;
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}
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}
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avail = min(page_end, address_end) - address;
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status = transfer_pages(dev, pipe, pipe_cmd, xaddr, avail);
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for (page_i = 0; page_i < n_pages; page_i++) {
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if (status > 0 && !is_write &&
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page_i < num_contiguous_pages)
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set_page_dirty(pages[page_i]);
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put_page(pages[page_i]);
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}
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if (status > 0) { /* Correct transfer */
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count += status;
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address += status;
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continue;
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} else if (status == 0) { /* EOF */
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ret = 0;
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break;
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} else if (status < 0 && count > 0) {
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/*
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* An error occurred and we already transferred
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* something on one of the previous pages.
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* Just return what we already copied and log this
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* err.
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*
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* Note: This seems like an incorrect approach but
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* cannot change it until we check if any user space
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* ABI relies on this behavior.
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*/
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if (status != PIPE_ERROR_AGAIN)
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dev_err_ratelimited(dev->pdev_dev,
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"backend returned error %d on %s\n",
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status, is_write ? "write" : "read");
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ret = 0;
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break;
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}
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/*
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* If the error is not PIPE_ERROR_AGAIN, or if we are not in
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* non-blocking mode, just return the error code.
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*/
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if (status != PIPE_ERROR_AGAIN ||
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(filp->f_flags & O_NONBLOCK) != 0) {
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ret = goldfish_pipe_error_convert(status);
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break;
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}
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/*
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* The backend blocked the read/write, wait until the backend
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* tells us it's ready to process more data.
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*/
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set_bit(wake_bit, &pipe->flags);
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/* Tell the emulator we're going to wait for a wake event */
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goldfish_cmd(pipe, pipe_cmd);
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/* Unlock the pipe, then wait for the wake signal */
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mutex_unlock(&pipe->lock);
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while (test_bit(wake_bit, &pipe->flags)) {
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if (wait_event_interruptible(pipe->wake_queue,
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!test_bit(wake_bit, &pipe->flags)))
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return -ERESTARTSYS;
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if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
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return -EIO;
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}
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/* Try to re-acquire the lock */
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if (mutex_lock_interruptible(&pipe->lock))
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return -ERESTARTSYS;
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}
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mutex_unlock(&pipe->lock);
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return (ret < 0) ? ret : count;
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}
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static ssize_t goldfish_pipe_read(struct file *filp, char __user *buffer,
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size_t bufflen, loff_t *ppos)
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{
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return goldfish_pipe_read_write(filp, buffer, bufflen,
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/* is_write */ 0);
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}
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static ssize_t goldfish_pipe_write(struct file *filp,
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const char __user *buffer, size_t bufflen,
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loff_t *ppos)
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{
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return goldfish_pipe_read_write(filp, (char __user *)buffer,
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bufflen, /* is_write */ 1);
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}
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static unsigned int goldfish_pipe_poll(struct file *filp, poll_table *wait)
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{
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struct goldfish_pipe *pipe = filp->private_data;
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unsigned int mask = 0;
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int status;
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if (mutex_lock_interruptible(&pipe->lock))
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return -ERESTARTSYS;
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poll_wait(filp, &pipe->wake_queue, wait);
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status = goldfish_cmd_status(pipe, PIPE_CMD_POLL);
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mutex_unlock(&pipe->lock);
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if (status & PIPE_POLL_IN)
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mask |= POLLIN | POLLRDNORM;
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if (status & PIPE_POLL_OUT)
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mask |= POLLOUT | POLLWRNORM;
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if (status & PIPE_POLL_HUP)
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mask |= POLLHUP;
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if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
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mask |= POLLERR;
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return mask;
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}
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static irqreturn_t goldfish_pipe_interrupt(int irq, void *dev_id)
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{
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struct goldfish_pipe_dev *dev = dev_id;
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unsigned long irq_flags;
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int count = 0;
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/*
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* We're going to read from the emulator a list of (channel,flags)
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* pairs corresponding to the wake events that occurred on each
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* blocked pipe (i.e. channel).
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*/
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spin_lock_irqsave(&dev->lock, irq_flags);
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for (;;) {
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/* First read the channel, 0 means the end of the list */
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struct goldfish_pipe *pipe;
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unsigned long wakes;
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unsigned long channel = 0;
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#ifdef CONFIG_64BIT
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channel =
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(u64)readl(dev->base + PIPE_V1_REG_CHANNEL_HIGH) << 32;
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#endif
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channel |= readl(dev->base + PIPE_V1_REG_CHANNEL);
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if (!channel)
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break;
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/* Convert channel to struct pipe pointer + read wake flags */
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wakes = readl(dev->base + PIPE_V1_REG_WAKES);
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pipe = (struct goldfish_pipe *)(ptrdiff_t)channel;
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/* Did the emulator just closed a pipe? */
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if (wakes & PIPE_WAKE_CLOSED) {
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set_bit(BIT_CLOSED_ON_HOST, &pipe->flags);
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wakes |= PIPE_WAKE_READ | PIPE_WAKE_WRITE;
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}
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if (wakes & PIPE_WAKE_READ)
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clear_bit(BIT_WAKE_ON_READ, &pipe->flags);
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if (wakes & PIPE_WAKE_WRITE)
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clear_bit(BIT_WAKE_ON_WRITE, &pipe->flags);
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wake_up_interruptible(&pipe->wake_queue);
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count++;
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}
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spin_unlock_irqrestore(&dev->lock, irq_flags);
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return (count == 0) ? IRQ_NONE : IRQ_HANDLED;
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}
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/* A helper function to get the instance of goldfish_pipe_dev from file */
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static struct goldfish_pipe_dev *to_goldfish_pipe_dev(struct file *file)
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{
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struct miscdevice *miscdev = file->private_data;
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return container_of(miscdev, struct goldfish_pipe_dev, miscdev);
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}
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/**
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* goldfish_pipe_open - open a channel to the AVD
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* @inode: inode of device
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* @file: file struct of opener
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*
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* Create a new pipe link between the emulator and the use application.
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* Each new request produces a new pipe.
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*
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* Note: we use the pipe ID as a mux. All goldfish emulations are 32bit
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* right now so this is fine. A move to 64bit will need this addressing
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*/
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static int goldfish_pipe_open(struct inode *inode, struct file *file)
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{
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struct goldfish_pipe_dev *dev = to_goldfish_pipe_dev(file);
|
|
struct goldfish_pipe *pipe;
|
|
int status;
|
|
|
|
/* Allocate new pipe kernel object */
|
|
pipe = kzalloc(sizeof(*pipe), GFP_KERNEL);
|
|
if (!pipe)
|
|
return -ENOMEM;
|
|
|
|
pipe->dev = dev;
|
|
init_waitqueue_head(&pipe->wake_queue);
|
|
mutex_init(&pipe->lock);
|
|
|
|
/*
|
|
* Now, tell the emulator we're opening a new pipe. We use the
|
|
* pipe object's address as the channel identifier for simplicity.
|
|
*/
|
|
|
|
status = goldfish_cmd_status(pipe, PIPE_CMD_OPEN);
|
|
if (status < 0) {
|
|
kfree(pipe);
|
|
return status;
|
|
}
|
|
|
|
/* All is done, save the pipe into the file's private data field */
|
|
file->private_data = pipe;
|
|
return 0;
|
|
}
|
|
|
|
static int goldfish_pipe_release(struct inode *inode, struct file *filp)
|
|
{
|
|
struct goldfish_pipe *pipe = filp->private_data;
|
|
|
|
pr_debug("%s: call. pipe=%p file=%p\n", __func__, pipe, filp);
|
|
/* The guest is closing the channel, so tell the emulator right now */
|
|
goldfish_cmd(pipe, PIPE_CMD_CLOSE);
|
|
kfree(pipe);
|
|
filp->private_data = NULL;
|
|
return 0;
|
|
}
|
|
|
|
static const struct file_operations goldfish_pipe_fops = {
|
|
.owner = THIS_MODULE,
|
|
.read = goldfish_pipe_read,
|
|
.write = goldfish_pipe_write,
|
|
.poll = goldfish_pipe_poll,
|
|
.open = goldfish_pipe_open,
|
|
.release = goldfish_pipe_release,
|
|
};
|
|
|
|
static void init_miscdevice(struct miscdevice *miscdev)
|
|
{
|
|
memset(miscdev, 0, sizeof(*miscdev));
|
|
|
|
miscdev->minor = MISC_DYNAMIC_MINOR;
|
|
miscdev->name = DEVICE_NAME;
|
|
miscdev->fops = &goldfish_pipe_fops;
|
|
};
|
|
|
|
static int goldfish_pipe_device_deinit(void *raw_dev,
|
|
struct platform_device *pdev);
|
|
|
|
int goldfish_pipe_device_v1_init(struct platform_device *pdev,
|
|
void __iomem *base,
|
|
int irq)
|
|
{
|
|
struct goldfish_pipe_dev *dev;
|
|
int err;
|
|
|
|
pr_info("%s--start\n", __FUNCTION__);
|
|
dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
|
|
if (!dev)
|
|
return -ENOMEM;
|
|
|
|
dev->super.deinit = &goldfish_pipe_device_deinit;
|
|
dev->pdev_dev = &pdev->dev;
|
|
spin_lock_init(&dev->lock);
|
|
|
|
err = devm_request_irq(&pdev->dev, irq,
|
|
&goldfish_pipe_interrupt, IRQF_SHARED,
|
|
DEVICE_NAME, dev);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "unable to allocate IRQ for v1\n");
|
|
return err;
|
|
}
|
|
|
|
init_miscdevice(&dev->miscdev);
|
|
err = misc_register(&dev->miscdev);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "unable to register v1 device\n");
|
|
return err;
|
|
}
|
|
|
|
setup_access_params_addr(pdev, dev);
|
|
|
|
platform_set_drvdata(pdev, dev);
|
|
return 0;
|
|
}
|
|
|
|
static int goldfish_pipe_device_deinit(void *raw_dev,
|
|
struct platform_device *pdev)
|
|
{
|
|
struct goldfish_pipe_dev *dev = raw_dev;
|
|
|
|
misc_deregister(&dev->miscdev);
|
|
return 0;
|
|
}
|