mirror of
https://github.com/revyos/thead-kernel.git
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9e49618e75
Add a new driver npu-ax3386-gpl, default compile as module. The default generated modules are: - vha.ko - img_mem.ko - vha_info.ko Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
374 lines
13 KiB
C
374 lines
13 KiB
C
/*!
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*****************************************************************************
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* Copyright (c) Imagination Technologies Ltd.
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*
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* The contents of this file are subject to the MIT license as set out below.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* Alternatively, the contents of this file may be used under the terms of the
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* GNU General Public License Version 2 ("GPL")in which case the provisions of
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* GPL are applicable instead of those above.
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*
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* If you wish to allow use of your version of this file only under the terms
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* of GPL, and not to allow others to use your version of this file under the
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* terms of the MIT license, indicate your decision by deleting the provisions
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* above and replace them with the notice and other provisions required by GPL
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* as set out in the file called "GPLHEADER" included in this distribution. If
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* you do not delete the provisions above, a recipient may use your version of
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* this file under the terms of either the MIT license or GPL.
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*
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* This License is also included in this distribution in the file called
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* "MIT_COPYING".
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*
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*****************************************************************************/
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#ifndef VHA_IO_H
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#define VHA_IO_H
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#ifndef OSID
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#define _OSID_ 0
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#else
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#define _OSID_ OSID
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#endif
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#define _CONCAT(x, y, z) x ## y ## z
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#define OSID_TOKEN(group, osid, reg) _CONCAT(group, osid, reg)
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#define VHA_CR_OS(reg_name) \
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OSID_TOKEN(VHA_CR_OS, _OSID_, _ ## reg_name)
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/* ignore bottom 4 bits of CONFIG_ID: they identify different build variants */
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#define VHA_CR_CORE_ID_BVNC_CLRMSK (0xfffffffffffffff0ULL)
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/* value missing from vha_cr.h: value obtained from email from SS */
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#define VHA_CR_CNN_DEBUG_STATUS_CNN_DEBUG_OFFSET_ALIGNSHIFT 32
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#define IMG_UINT64_C(v) v##ULL
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#define VHA_DEAD_HW (0xdead1000dead1ULL)
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#define ADDR_CAST __force void *
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/* IO access macros */
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#define IOREAD64(b, o) vha_plat_read64((ADDR_CAST)b + (o))
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#define IOWRITE64(b, o, v) vha_plat_write64((ADDR_CAST)b + (o), v)
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#define IOREAD64_REGIO(r) vha_plat_read64((ADDR_CAST)vha->reg_base + (r))
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#define IOREAD64_CR_REGIO(r) vha_plat_read64((ADDR_CAST)vha->reg_base + (VHA_CR_##r))
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#define IOWRITE64_REGIO(v, r) vha_plat_write64((ADDR_CAST)vha->reg_base + (r), v)
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#define IOWRITE64_CR_REGIO(v, r) vha_plat_write64((ADDR_CAST)vha->reg_base + (VHA_CR_##r), v)
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/* write value to register and log into pdump file using specified reg namespace */
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#define IOWRITE64_PDUMP_REGIO(v, o, r, s) do { \
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uint64_t _val_ = v; \
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vha_plat_write64((ADDR_CAST)vha->reg_base + o + r, _val_); \
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img_pdump_printf("WRW64 :%s:%#x %#llx\n", \
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s, (r), _val_); \
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} while (0)
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/* write value to register and log into pdump file using default regspace */
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#define IOWRITE64_PDUMP(v, r) \
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IOWRITE64_PDUMP_REGIO(v, 0, r, "REG")
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#define IOWRITE64_CR_PDUMP(v, r) \
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IOWRITE64_PDUMP_REGIO(v, 0, VHA_CR_##r, "REG")
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/* read value from register and log into pdump file using specified reg namespace */
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#define IOREAD64_PDUMP_REGIO(o, r, s) ({ \
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uint64_t _val_; \
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do { \
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_val_ = vha_plat_read64((ADDR_CAST)vha->reg_base + o + r); \
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img_pdump_printf("RDW64 :%s:%#x\n", s, (r)); \
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} while (0); \
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_val_; \
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})
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/* read value from register and log into pdump file using default regspace */
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#define IOREAD64_PDUMP(r) \
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IOREAD64_PDUMP_REGIO(0, r, "REG")
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#define IOREAD64_CR_PDUMP(r) \
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IOREAD64_PDUMP_REGIO(0, VHA_CR_##r, "REG")
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#ifdef CONFIG_FUNCTION_ERROR_INJECTION
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int __IOPOLL64_RET(int ret);
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#else
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#define __IOPOLL64_RET(ret) ret
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#endif
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/* poll c-times for the exact register value(v) masked with m,
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* using d-cycles delay between polls and log into pdump file
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* using specified reg namespace */
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#ifdef CONFIG_VHA_DUMMY
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#define IOPOLL64_PDUMP_REGIO(v, c, d, m, o, r, s) \
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({ img_pdump_printf("POL64 :%s:%#x %#llx %#llx 0 %d %d\n", \
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s, (r), v & m, m, c, d); \
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__IOPOLL64_RET(0); \
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})
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/* Question: shall we generate pdump script to calculate parity in runtime? */
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#define IOPOLL64_PDUMP_REGIO_PARITY(v, c, d, m, o, r, s) \
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IOPOLL64_PDUMP_REGIO(v, c, d, m, o, r, s)
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#else /* CONFIG_VHA_DUMMY */
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#define IOPOLL64_PDUMP_REGIO(v, c, d, m, o, r, s) \
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({ int _ret_ = -EIO; \
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do { \
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uint64_t _req_ = v & m; \
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uint64_t _val_ = ~_req_; \
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int _count_ = (c < 1 ? 1 : c); \
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while (--_count_ >= 0) { \
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_val_ = vha_plat_read64( \
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(ADDR_CAST)vha->reg_base + ((o + r))) & m; \
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if (_val_ == _req_) { \
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_ret_ = 0; \
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break; \
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} \
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if (vha->freq_khz > 0) { \
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ndelay(d*1000000/vha->freq_khz); \
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} else \
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udelay(100); \
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} \
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WARN_ON(_val_ != _req_ && !vha->hw_props.dummy_dev); \
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img_pdump_printf("POL64 :%s:%#x %#llx %#llx 0 %d %d\n", \
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s, (r), _req_, m, c, d); \
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} while (0); \
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__IOPOLL64_RET(_ret_); \
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})
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#ifdef VHA_SCF
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#define _PARITY_CHECKS 4
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#define _PARITY_CHECK_VAL_IMP(val) \
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if((_parity_ok = !img_mem_calc_parity(val))) { \
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_parity_count=_PARITY_CHECKS; \
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} else { \
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if(--_parity_count==0) { \
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_ret_ = -EIO; \
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break; \
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} \
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}
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#ifdef VHA_EVENT_INJECT
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#define _PARITY_CHECK_VAL(val, reg) \
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if((vha->injection.parity_poll_err_reg == reg) && __EVENT_INJECT()) { \
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_parity_ok = false; \
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} else { \
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_PARITY_CHECK_VAL_IMP(val) \
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WARN_ON(!_parity_ok); \
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}
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#else
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#define _PARITY_CHECK_VAL(val, reg) _PARITY_CHECK_VAL_IMP(val)
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#endif
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/* poll c-times for the exact register value(v) masked with m,
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* using d-cycles delay between polls and log into pdump file
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* using specified reg namespace
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* return error if parity calculated from 4 consecutive reads
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* is wrong
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* */
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#define IOPOLL64_PDUMP_REGIO_PARITY(v, c, d, m, o, r, s) \
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({ int _ret_ = -EIO; \
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if (vha->hw_props.supported.parity && !vha->parity_disable) { \
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do { \
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bool _parity_ok = false; \
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int _parity_count=_PARITY_CHECKS; \
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uint64_t _req_ = (v) & (m); \
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uint64_t _val_ = ~_req_; \
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int _count_ = (c) < _PARITY_CHECKS ? _PARITY_CHECKS : (c); \
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while (_count_-- > 0) { \
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_val_ = vha_plat_read64( \
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(ADDR_CAST)vha->reg_base + ((o + r))); \
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_PARITY_CHECK_VAL(_val_, r); \
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_val_ &= m; \
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if (_parity_ok && _val_ == _req_) { \
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_ret_ = 0; \
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break; \
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} \
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if (vha->freq_khz > 0) { \
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ndelay(d*1000000/vha->freq_khz); \
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} else \
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udelay(100); \
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} \
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WARN_ON(_val_ != _req_); \
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img_pdump_printf("POL64 :%s:%#x %#llx %#llx 0 %d %d\n", \
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s, (r), _req_, m, c, d); \
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} while (0); \
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} else { \
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_ret_ = IOPOLL64_PDUMP_REGIO(v, c, d, m, o, r, s); \
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} \
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__IOPOLL64_RET(_ret_); \
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})
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#else /* VHA_SCF */
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#define IOPOLL64_PDUMP_REGIO_PARITY(v, c, d, m, o, r, s) \
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IOPOLL64_PDUMP_REGIO(v, c, d, m, o, r, s)
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#endif /* VHA_SCF */
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#endif /* CONFIG_VHA_DUMMY */
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/* poll c-times for the exact register value(v) masked with m,
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* using d-cycles delay between polls and log into pdump file
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* using specified reg namespace */
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#define IOPOLL64_PDUMP(v, c, d, m, r) \
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IOPOLL64_PDUMP_REGIO(v, c, d, m, 0, r, "REG")
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#define IOPOLL64_CR_PDUMP(v, c, d, m, r) \
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IOPOLL64_PDUMP_REGIO(v, c, d, m, 0, VHA_CR_##r, "REG")
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#define IOPOLL64_PDUMP_PARITY(v, c, d, m, r) \
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IOPOLL64_PDUMP_REGIO_PARITY(v, c, d, m, 0, r, "REG")
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#define IOPOLL64_CR_PDUMP_PARITY(v, c, d, m, r) \
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IOPOLL64_PDUMP_REGIO_PARITY(v, c, d, m, 0, VHA_CR_##r, "REG")
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/* write phys address of buffer to register, and log into pdump */
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#define IOWRITE_PDUMP_PHYS(buf, offset, reg) do { \
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uint64_t __maybe_unused _addr_ = vha_buf_addr(session, buf); \
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vha_plat_write64( \
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(ADDR_CAST)session->vha->reg_base + reg,\
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_addr_ + offset); \
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img_pdump_printf( \
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"WRW64 :REG:%#x "_PMEM_":BLOCK_%d:%#x -- '%s%s'\n", \
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reg, buf->id, offset, buf->name, \
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buf->pcache.valid ? "_cached" : ""); \
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} while (0)
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/* write virt address of buffer to register, and log into pdump */
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#define IOWRITE_PDUMP_VIRT(buf, offset, reg) \
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IOWRITE64_PDUMP(buf->devvirt + offset, reg)
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/* write address of buffer to register and log into pdump file */
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#define IOWRITE_PDUMP_BUFADDR(session, buf, offset, reg) do { \
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if (session->vha->mmu_mode) \
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IOWRITE_PDUMP_VIRT(buf, offset, reg); \
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else if (buf->attr & IMG_MEM_ATTR_OCM) { \
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IOWRITE_PDUMP_VIRT(buf, offset, reg); \
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} else { \
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IOWRITE_PDUMP_PHYS(buf, offset, reg); \
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} \
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} while (0)
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/* write phys address of buffer to register, and log into pdump */
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#define SET_PHYS(buf, offset, addr) do { \
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uint64_t _addr_ = vha_buf_addr(session, buf); \
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*addr = _addr_ + offset; \
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} while (0)
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/* write virt address of buffer to register, and log into pdump */
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#define SET_VIRT(buf, offset, addr) do { \
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*addr = buf->devvirt + offset; \
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} while (0)
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#define SET_BUFADDR(session, buf, offset, addr) do { \
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if (session->vha->mmu_mode) \
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SET_VIRT(buf, offset, addr); \
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else if (buf->attr & IMG_MEM_ATTR_OCM) { \
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SET_VIRT(buf, offset, addr); \
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} else { \
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SET_PHYS(buf, offset, addr); \
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} \
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} while (0)
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/* extract bitfield from a register value */
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static inline
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uint64_t _get_bits(uint64_t val, uint32_t shift, uint64_t mask)
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{
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return (val & mask) >> shift;
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}
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/* set bitfield in a register value */
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static inline
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uint64_t _set_bits(uint64_t val, uint32_t shift, uint64_t mask)
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{
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uint64_t v = val << shift;
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return v & mask;
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}
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/* utility macros for manipulating fields within registers */
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/* apply bitmask */
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#define VHA_CR_BITMASK(reg, field) \
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(~VHA_CR_##reg##_##field##_CLRMSK)
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/* get field from register */
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#define VHA_CR_GETBITS(reg, field, val) \
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_get_bits(val, \
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VHA_CR_##reg##_##field##_SHIFT, \
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VHA_CR_BITMASK(reg, field))
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/* get value of a field in a register, taking alignment into account */
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#define VHA_CR_ALIGN_GETBITS(reg, field, val) \
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(VHA_CR_GETBITS(reg, field, val) \
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<< VHA_CR_##reg##_##field##_ALIGNSHIFT)
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/* apply bitmask - OS dependent */
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#define VHA_CR_BITMASK_OS(reg, field) \
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~OSID_TOKEN(VHA_CR_OS, _OSID_, _ ## reg ## _ ## field ## _CLRMSK)
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/* get field from register - OS dependent */
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#define VHA_CR_GETBITS_OS(reg, field, val) \
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_get_bits(val, \
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OSID_TOKEN(VHA_CR_OS, _OSID_, _ ## reg ## _ ## field ## _SHIFT), \
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VHA_CR_BITMASK_OS(reg, field))
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/* get value of a field in a register, taking alignment into account - OS */
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#define VHA_CR_ALIGN_GETBITS_OS(reg, field, val) \
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(VHA_CR_GETBITS_OS(reg, field, val) \
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<< OSID_TOKEN(VHA_CR_OS, _OSID_, _ ## reg ## _ ## field ## _ALIGNSHIFT)) \
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/* max value of a field */
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#define VHA_CR_MAX(reg, field) \
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VHA_CR_GETBITS(reg, field, ~0ULL)
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/* max value of an field taking alignment into account */
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#define VHA_CR_ALIGN_MAX(reg, field) \
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(VHA_CR_MAX(reg, field) \
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<< VHA_CR_##reg##_##field##_SHIFT)
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/* max value of a field - OS dependent */
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#define VHA_CR_MAX_OS(reg, field) \
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VHA_CR_GETBITS_OS(reg, field, ~0ULL)
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/* max value of an field taking alignment into account - OS dependent */
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#define VHA_CR_ALIGN_MAX_OS(reg, field) \
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(VHA_CR_MAX_OS(reg, field) \
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<< OSID_TOKEN(VHA_CR_OS, _OSID_, _ ## reg ## _ ## field ## _SHIFT)) \
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/* set value of a field within a register */
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#define VHA_CR_SETBITS(reg, field, val) \
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_set_bits(val, \
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VHA_CR_##reg##_##field##_SHIFT, \
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VHA_CR_BITMASK(reg, field))
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/* set value of a field within a register reducing value by alignment */
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#define VHA_CR_ALIGN_SETBITS(reg, field, val) \
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VHA_CR_SETBITS( \
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reg, field, (val) \
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>> VHA_CR_##reg##_##field##_ALIGNSHIFT)
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/* set value of a field within a register - OS dependent */
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#define VHA_CR_SETBITS_OS(reg, field, val) \
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_set_bits(val, \
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OSID_TOKEN(VHA_CR_OS, _OSID_, _ ## reg ## _ ## field ## _SHIFT), \
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VHA_CR_BITMASK_OS(reg, field))
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/* set value of a field within a register reducing value by alignment - OS */
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#define VHA_CR_ALIGN_SETBITS_OS(reg, field, val) \
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VHA_CR_SETBITS_OS( \
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reg, field, (val) \
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>> OSID_TOKEN(VHA_CR_OS, _OSID_, _ ## reg ## _ ## field ## _ALIGNSHIFT)) \
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/* clear bits of a field within a register */
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#define VHA_CR_CLEARBITS(val, reg, field) \
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(val &= ~VHA_CR_BITMASK(reg, field))
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/* clear bits of a field within a register - OS dependent */
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#define VHA_CR_CLEARBITS_OS(val, reg, field) \
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(val &= ~VHA_CR_BITMASK_OS(reg, field))
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#endif /* VHA_IO_H */
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