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https://github.com/revyos/thead-kernel.git
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9e49618e75
Add a new driver npu-ax3386-gpl, default compile as module. The default generated modules are: - vha.ko - img_mem.ko - vha_info.ko Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>
192 lines
6.6 KiB
C
192 lines
6.6 KiB
C
/*!
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*****************************************************************************
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* Copyright (c) Imagination Technologies Ltd.
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*
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* The contents of this file are subject to the MIT license as set out below.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* Alternatively, the contents of this file may be used under the terms of the
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* GNU General Public License Version 2 ("GPL")in which case the provisions of
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* GPL are applicable instead of those above.
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*
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* If you wish to allow use of your version of this file only under the terms
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* of GPL, and not to allow others to use your version of this file under the
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* terms of the MIT license, indicate your decision by deleting the provisions
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* above and replace them with the notice and other provisions required by GPL
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* as set out in the file called "GPLHEADER" included in this distribution. If
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* you do not delete the provisions above, a recipient may use your version of
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* this file under the terms of either the MIT license or GPL.
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*
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* This License is also included in this distribution in the file called
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* "MIT_COPYING".
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*
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*****************************************************************************/
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#include "../vha_io.h"
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#if defined(HW_AX2)
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#include <hwdefs/vha_cr_mirage.h>
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#elif defined(HW_AX3)
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#include <hwdefs/vha_cr_aura.h>
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#else
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#error "No HW layout defined"
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#endif
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#if defined(CFG_SYS_MAGNA)
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#include <hwdefs/magna_system.h>
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#elif defined(CFG_SYS_VAGUS)
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#include <hwdefs/vagus_system.h>
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#elif defined(CFG_SYS_AURA)
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#include <hwdefs/aura_system.h>
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#elif defined(CFG_SYS_MIRAGE)
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#include <hwdefs/mirage_system.h>
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#endif
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/* HW Series AURA or MIRAGE */
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#if defined(HW_AX2)
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#define HW_SERIES (23U)
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#elif defined(HW_AX3)
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#if defined(CONFIG_VHA_NEXEF)
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/* 3NX-F use a different B. value */
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#define HW_SERIES (32U)
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#else
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#define HW_SERIES (28U)
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#endif
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#else
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#error "No HW Series defined"
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#endif
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/* Events macros definition */
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#define VHA_EVENT_TYPE(name) \
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VHA_CR_VHA_EVENT_TYPE_VHA_##name##_EN
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#if defined(HW_AX2)
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#define VHA_CNN_ERR_EVNTS (VHA_EVENT_TYPE(CNN0_ERROR) |\
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VHA_EVENT_TYPE(CNN0_MEM_WDT) |\
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VHA_EVENT_TYPE(CNN0_WDT))
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#define VHA_CORE_EVNTS (VHA_EVENT_TYPE(MMU_PAGE_FAULT) |\
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VHA_EVENT_TYPE(AXI_ERROR))
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#elif defined(HW_AX3)
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#define VHA_CNN_ERR_EVNTS (VHA_EVENT_TYPE(CNN0_ERROR) |\
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VHA_EVENT_TYPE(CNN0_MEM_WDT))
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#ifdef VHA_SCF
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#define VHA_CORE_EVNTS ( \
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VHA_EVENT_TYPE(MMU_PARITY_ERROR) |\
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VHA_EVENT_TYPE(PARITY_ERROR) |\
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VHA_EVENT_TYPE(LOCKSTEP_ERROR) |\
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VHA_EVENT_TYPE(READY) |\
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VHA_EVENT_TYPE(ERROR) |\
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VHA_EVENT_TYPE(HL_WDT) |\
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VHA_EVENT_TYPE(MMU_PAGE_FAULT) |\
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VHA_EVENT_TYPE(AXI_ERROR))
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#else /*!VHA_SCF */
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#define VHA_CORE_EVNTS ( \
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VHA_EVENT_TYPE(READY) |\
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VHA_EVENT_TYPE(ERROR) |\
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VHA_EVENT_TYPE(HL_WDT) |\
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VHA_EVENT_TYPE(MMU_PAGE_FAULT) |\
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VHA_EVENT_TYPE(AXI_ERROR))
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#endif /* VHA_SCF */
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#endif /* HW_AX3 */
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/* ignore bottom 4 bits of CONFIG_ID: they identify different build variants */
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#define VHA_CR_CORE_ID_BVNC_CLRMSK (0xfffffffffffffff0ULL)
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#define VHA_CNN_CMPLT_EVNT (VHA_EVENT_TYPE(CNN0_COMPLETE))
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#define VHA_CNN_EVNTS (VHA_CNN_ERR_EVNTS | VHA_CNN_CMPLT_EVNT)
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#define VHA_EVNTS_DEFAULT ( ( \
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VHA_CNN_EVNTS | VHA_CORE_EVNTS \
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) & VHA_CR_OS(VHA_EVENT_ENABLE_MASKFULL))
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#define VHA_SYS_CLOCK_MODE(name, mode) \
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VHA_CR_SYS_CLK_CTRL0_##name##_##mode \
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#define VHA_SYS_CLOCKS_DEFAULT(mode) ( (\
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VHA_SYS_CLOCK_MODE(SLC, mode) \
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) & VHA_CR_SYS_CLK_CTRL0_MASKFULL)
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/* Clocks macros definition */
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#define VHA_MAIN_CLOCK_MODE(name, mode) \
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VHA_CR_CLK_CTRL0_##name##_##mode \
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#if defined(HW_AX2)
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#define VHA_MAIN_CLOCKS_DEFAULT(mode) ( (\
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VHA_MAIN_CLOCK_MODE(CNN_EWO, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_PACK, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_OIN, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_POOL, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_SB, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_XBAR, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_NORM, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_ACT, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_ACCUM, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_CNV, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_CBUF, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_IBUF, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_CMD, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN, mode) | \
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VHA_MAIN_CLOCK_MODE(SLC, mode) | \
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VHA_MAIN_CLOCK_MODE(BIF, mode) \
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) & VHA_CR_CLK_CTRL0_MASKFULL)
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#elif defined(HW_AX3)
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#define VHA_MAIN_CLOCKS_DEFAULT(mode) ( (\
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VHA_MAIN_CLOCK_MODE(CNN_CORE_XBAR, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_MMM, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_EWO, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_PACK, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_OIN, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_POOL, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_SB, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_NORM, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_ACT, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_ACCUM, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_CNV, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_CBUF, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_IBUF, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_CMD, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_TRS_A, mode) | \
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VHA_MAIN_CLOCK_MODE(CNN_TRS_B, mode) | \
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VHA_MAIN_CLOCK_MODE(SLC, mode) | \
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VHA_MAIN_CLOCK_MODE(BIF, mode) \
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) & VHA_CR_CLK_CTRL0_MASKFULL)
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#endif
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/* Reset macros definition */
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#define VHA_RESET_EN(name) \
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VHA_CR_RESET_CTRL_VHA_##name##_EN
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#define VHA_RESET_DEFAULT ( ( \
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VHA_RESET_EN(SYS_SOFT_RESET) | \
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VHA_RESET_EN(AXI_SOFT_RESET) | \
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VHA_RESET_EN(CNN0_SOFT_RESET) | \
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VHA_RESET_EN(SLC_SOFT_RESET) | \
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VHA_RESET_EN(BIF_SOFT_RESET) | \
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VHA_RESET_EN(SOFT_RESET) \
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) & VHA_CR_RESET_CTRL_MASKFULL)
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/* NN_SYS register macros */
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#define NN_SYS_CR_BASE \
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(_REG_NNSYS_START)
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#define NN_SYS_CR(reg) \
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(_REG_NNSYS_START + NN_SYS_CR_##reg)
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