#ifndef APSYS_SYSREG_REG_OFFSET_DEFINE_H
#define APSYS_SYSREG_REG_OFFSET_DEFINE_H

#define APSYS_REG_BASE		0xFFFF019000

#define REG_C910_CORE0_RVBA_L	(APSYS_REG_BASE + 0x50)
#define REG_C910_CORE0_RVBA_H	(APSYS_REG_BASE + 0x54)
#define REG_C910_CORE1_RVBA_L	(APSYS_REG_BASE + 0x58)
#define REG_C910_CORE1_RVBA_H	(APSYS_REG_BASE + 0x5C)
#define REG_C910_CORE2_RVBA_L	(APSYS_REG_BASE + 0x60)
#define REG_C910_CORE2_RVBA_H	(APSYS_REG_BASE + 0x64)
#define REG_C910_CORE3_RVBA_L	(APSYS_REG_BASE + 0x68)
#define REG_C910_CORE3_RVBA_H	(APSYS_REG_BASE + 0x6C)


#endif