mirror of
https://github.com/revyos/th1520-vendor-uboot.git
synced 2026-09-17 21:02:04 +02:00
129 lines
3.6 KiB
C
129 lines
3.6 KiB
C
/*
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* Copyright (C) 2017-2020 Alibaba Group Holding Limited
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <linux/sizes.h>
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// #define DEBUG
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#define SPL_SSEG0_BASEADDRESS 0x40000000
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#define SSEG0_BASEADDRESS 0x40000000
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#define SSEG1_BASEADDRESS 0xe0000000
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_BOARD_EARLY_INIT_R
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_SYS_HZ 1000
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/*
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* LSP : Timer UART
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* HSP : SPI0 EMMC
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*/
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#ifdef CONFIG_IS_ASIC
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#define CPU_DEFAULT_FREQ 1000000000
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#define HSP_DEFAULT_FREQ 250000000
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#define LSP_DEFAULT_FREQ 62500000
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#else
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#define CPU_DEFAULT_FREQ 50000000
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#define HSP_DEFAULT_FREQ 50000000
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#define LSP_DEFAULT_FREQ 50000000
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#endif
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#define LSP_CLOCK (LSP_DEFAULT_FREQ / 1000000)
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#define CONFIG_SYS_CLK_FREQ CPU_DEFAULT_FREQ
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/* Physical Memory Map */
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#define PHYS_SRAM_1 0xfe400000
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#define PHYS_SDRAM_1 0x40000000
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#define PHYS_SDRAM_1_SIZE 0x18000000 /* 384M */
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#define CONFIG_SYS_TEXT_BASE 0x57800000
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#define CONFIG_SYS_LOAD_ADDR 0x80000000
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x80000 - 0x8)
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#define CONFIG_SYS_MALLOC_LEN SZ_2M
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#define CONFIG_SYS_BOOTM_LEN SZ_32M
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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#define CONFIG_SPL_STACK (PHYS_SRAM_1 + 0x8000 - 0x8)
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#define CONFIG_SPL_MAX_FOOTPRINT 0x4000
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#ifdef CONFIG_SPL_BUILD
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#define INTC_BASEADDRESS 0xfe3f0000
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#define TIMER_BASEADDRESS 0xfff70000
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#define ERAGON_MMC0_BASE 0xfffb0000
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#else
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#define INTC_BASEADDRESS 0xbe3f0000
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#define TIMER_BASEADDRESS 0xbff70000
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#define ERAGON_MMC0_BASE 0xbffb0000
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#endif
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#define UBOOT_INTERNAL_VERSION "0.3"
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#define CONFIG_C810_CSKY
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#define CONFIG_BOARD_PRINTF_SUPPORT
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#define CONFIG_BOARD_CONSOLE_SUPPORT
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#define CONFIG_BOARD_MMC_SUPPORT
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#define CONFIG_BOARD_SPIFLASH_SUPPORT
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#define CONFIG_SUPPORT_EMMC_BOOT
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#define HAVE_BLOCK_DEVICE
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#define TIMER_ID 0
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#define TIME_IRQ 4
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#define CONFIG_BAUDRATE 115200
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#define TIMEOUT_COUNT_TIMER TIMER0
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#define TIMEOUT_VALUE 500
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#define CONFIG_SYS_CBSIZE 256 /* This is Console Buffer size */
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#define CONFIG_SYS_MAXARGS 16
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/* NAND configuration */
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_ERAGON 1
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#define CONFIG_SYS_ERAGON_NAND_HWECC
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x4e000000
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#endif
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/* Network Configuration */
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#define CONFIG_DW_ALTDESCRIPTOR
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#define CONFIG_MII 1
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#define CONFIG_PHY_MARVELL 1
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#define CONFIG_NET_RETRY_COUNT 20
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#define PHYS_FLASH_1 0x00200000 /* Flash Bank #0 */
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000)
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#define CONFIG_SYS_MMC_ENV_DEV 0
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/* Image address in Flash */
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#define FLASH_SPL_READ_ADDR 0x100000 /* 1M */
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#define FLASH_SPL_SIZE 0x010000 /* 64K */
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#define FLASH_FDT_READ_ADDR 0x130000 /* 1M+192K */
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#define FLASH_FDT_SIZE 0x010000
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#define FLASH_UBOOT_READ_ADDR 0x140000 /* 1M+256K */
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#define FLASH_UBOOT_SIZE 0x080000
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/* Environment options */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"dtb_load_addr_virt=0x8f000000\0" \
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"dtb_load_addr_phys=0x4f000000\0" \
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"linux_load_addr_virt=0x90000000\0" \
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"linux_load_addr_phys=0x50000000\0"
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#undef CONFIG_BOOTCOMMAND
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#define CONFIG_BOOTCOMMAND \
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"bootm ${linux_load_addr_virt} "
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#endif /* __CONFIG_H */
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