mirror of
https://github.com/revyos/th1520-vendor-uboot.git
synced 2026-09-16 12:22:14 +02:00
486 lines
11 KiB
Plaintext
486 lines
11 KiB
Plaintext
/dts-v1/;
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/ {
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model = "T-HEAD c910 light";
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compatible = "thead,c910_light";
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#address-cells = <2>;
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#size-cells = <2>;
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memory@0 {
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device_type = "memory";
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reg = <0x0 0xc0000000 0x0 0x40000000>;
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};
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aliases {
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spi0 = &spi0;
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spi1 = &qspi0;
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spi2 = &qspi1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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timebase-frequency = <3000000>;
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u-boot,dm-pre-reloc;
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cpu@0 {
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device_type = "cpu";
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reg = <0>;
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status = "okay";
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compatible = "riscv";
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riscv,isa = "rv64imafdcvsu";
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mmu-type = "riscv,sv39";
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u-boot,dm-pre-reloc;
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};
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};
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "simple-bus";
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ranges;
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u-boot,dm-pre-reloc;
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dummy_apb: apb-clock {
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compatible = "fixed-clock";
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clock-frequency = <62500000>;
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clock-output-names = "dummy_apb";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_ahb: ahb-clock {
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compatible = "fixed-clock";
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clock-frequency = <250000000>;
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clock-output-names = "core";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_spi: spi-clock {
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compatible = "fixed-clock";
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clock-frequency = <396000000>;
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clock-output-names = "dummy_spi";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_qspi0: qspi0-clock {
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compatible = "fixed-clock";
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clock-frequency = <792000000>;
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clock-output-names = "dummy_qspi0";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_uart_sclk: uart-sclk-clock {
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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clock-output-names = "dummy_uart_sclk";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_i2c_icclk: i2c-icclk-clock {
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compatible = "fixed-clock";
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clock-frequency = <50000000>;
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clock-output-names = "dummy_i2c_icclk";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_dpu_pixclk: dpu-pix-clock {
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compatible = "fixed-clock";
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clock-frequency = <74250000>;
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clock-output-names = "dummy_dpu_pixclk";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_dphy_refclk: dphy-ref-clock {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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clock-output-names = "dummy_dpu_refclk";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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i2c0: i2c@ffe7f20000 {
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compatible = "snps,designware-i2c";
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reg = <0xff 0xe7f20000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c1: i2c@ffe7f24000{
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compatible = "snps,designware-i2c";
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reg = <0xff 0xe7f24000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c2: i2c@ffec00c000{
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compatible = "snps,designware-i2c";
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reg = <0xff 0xec00c000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c3: i2c@ffec014000{
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compatible = "snps,designware-i2c";
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reg = <0xff 0xec014000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c4: i2c@ffe7f28000{
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compatible = "snps,designware-i2c";
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reg = <0xff 0xe7f28000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcal6408ahk_a: gpio@20 {
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compatible = "nxp,pca9554";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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i2c5: i2c@fff7f2c000{
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compatible = "snps,designware-i2c";
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reg = <0xff 0xf7f2c000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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serial@ffe7014000 {
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compatible = "snps,dw-apb-uart";
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reg = <0xff 0xe7014000 0x0 0x400>;
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clocks = <&dummy_uart_sclk>;
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clock-frequency = <100000000>;
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clock-names = "baudclk";
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reg-shift = <2>;
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reg-io-width = <4>;
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u-boot,dm-pre-reloc;
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};
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gmac0: ethernet@ffe7070000 {
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compatible = "snps,dwmac";
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reg = <0xff 0xe7070000 0x0 0x2000>;
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clocks = <&dummy_apb>;
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clock-names = "stmmaceth";
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snps,pbl = <32>;
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snps,fixed-burst;
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phy-mode = "rgmii-id";
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phy-handle = <&phy_88E1111_a>;
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status = "okay";
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mdio0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy_88E1111_a: ethernet-phy@1 {
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reg = <0x1>;
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};
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phy_88E1111_b: ethernet-phy@2 {
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reg = <0x2>;
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};
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};
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};
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gmac1: ethernet@ffe7060000 {
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compatible = "snps,dwmac";
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reg = <0xff 0xe7060000 0x0 0x2000>;
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clocks = <&dummy_apb>;
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clock-names = "stmmaceth";
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snps,pbl = <32>;
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snps,fixed-burst;
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phy-mode = "rgmii-id";
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phy-handle = <&phy_88E1111_b>;
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status = "disabled";
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};
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emmc: sdhci@ffe7080000 {
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compatible = "snps,dwcmshc-sdhci";
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reg = <0xff 0xe7080000 0x0 0x10000>;
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index = <0x0>;
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clocks = <&dummy_ahb>;
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clock-frequency = <198000000>;
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clock-names = "core";
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max-frequency = <198000000>;
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sdhci-caps-mask = <0x0 0x1000000>;
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mmc-hs400-1_8v;
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non-removable;
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no-sdio;
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no-sd;
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bus-width = <8>;
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voltage= "1.8v";
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pull_up;
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io_fixed_1v8;
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fifo-mode;
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u-boot,dm-pre-reloc;
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};
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sdhci0: sd@ffe7090000 {
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compatible = "snps,dwcmshc-sdhci";
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reg = <0xff 0xe7090000 0x0 0x10000>;
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index = <0x1>;
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clocks = <&dummy_ahb>;
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clock-frequency = <198000000>;
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max-frequency = <198000000>;
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sd-uhs-sdr104;
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pull_up;
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clock-names = "core";
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bus-width = <4>;
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voltage= "3.3v";
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};
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qspi0: spi@ffea000000 {
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compatible = "snps,dw-apb-ssi-quad";
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reg = <0xff 0xea000000 0x0 0x1000>;
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clocks = <&dummy_qspi0>;
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num-cs = <1>;
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cs-gpio = <&gpio2_porta 3 0>; // GPIO_ACTIVE_HIGH: 0
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spi-max-frequency = <100000000>;
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#address-cells = <1>;
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#size-cells =<0>;
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status = "disabled";
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spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-nand";
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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reg = <0>;
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};
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};
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qspi1: spi@fff8000000 {
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compatible = "snps,dw-apb-ssi-quad";
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reg = <0xff 0xf8000000 0x0 0x1000>;
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clocks = <&dummy_spi>;
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num-cs = <1>;
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cs-gpio = <&gpio0_porta 1 0>; // GPIO_ACTIVE_HIGH: 0
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spi-max-frequency = <66000000>;
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#address-cells = <1>;
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#size-cells =<0>;
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status = "disabled";
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spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-nand";
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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reg = <0>;
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};
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};
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spi0: spi@ffe700c000 {
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compatible = "snps,dw-apb-ssi";
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reg = <0xff 0xe700c000 0x0 0x1000>;
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clocks = <&dummy_spi>;
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cs-gpio = <&gpio2_porta 15 0>;
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spi-max-frequency = <100000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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};
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};
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gpio2: gpio@ffe7f34000 {
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compatible = "snps,dw-apb-gpio";
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reg = <0xff 0xe7f34000 0x0 0x1000>;
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clocks = <&dummy_apb>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio2_porta: gpio-controller@0 {
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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#gpio-cells = <2>;
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snps,nr-gpios = <32>;
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reg = <0>;
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};
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};
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gpio0: gpio@ffec005000 {
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compatible = "snps,dw-apb-gpio";
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reg = <0xff 0xec005000 0x0 0x1000>;
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clocks = <&dummy_apb>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio0_porta: gpio-controller@0 {
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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#gpio-cells = <2>;
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snps,nr-gpios = <32>;
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reg = <0>;
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};
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};
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gpio1: gpio@ffec006000 {
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compatible = "snps,dw-apb-gpio";
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reg = <0xff 0xec006000 0x0 0x1000>;
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clocks = <&dummy_apb>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio1_porta: gpio-controller@0 {
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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#gpio-cells = <2>;
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snps,nr-gpios = <32>;
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reg = <0>;
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};
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};
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pwm: pwm@ffec01c000 {
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compatible = "thead,pwm-light";
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reg = <0xff 0xec01c000 0x0 0x4000>;
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#pwm-cells = <2>;
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};
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dsi_regs: dsi-controller@ffef500000 {
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compatible = "thead,light-dsi-regs", "syscon";
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reg = <0xff 0xef500000 0x0 0x10000>;
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status = "okay";
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};
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vosys_regs: vosys@ffef528000 {
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compatible = "thead,light-vo-subsys", "syscon";
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reg = <0xff 0xef528000 0x0 0x1000>;
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status = "okay";
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};
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dpu: dc8200@ffef600000 {
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compatible = "verisilicon,dc8200";
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reg = <0xff 0xef600000 0x0 0x100>;
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};
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axiscr {
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compatible = "thead,axiscr";
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reg = <0xff 0xff004000 0x0 0x1000>;
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lock-read = "okay";
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lock-write = "okay";
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#address-cells = <2>;
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#size-cells = <2>;
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u-boot,dm-pre-reloc;
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axiscr0: axisrc@0 {
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device_type = "axiscr";
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region = <0x00 0x00000000 0x00 0x80000000>; // 4KB align
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status = "disabled";
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#address-cells = <2>;
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#size-cells = <2>;
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u-boot,dm-pre-reloc;
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};
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axiscr1: axisrc@1 {
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device_type = "axiscr";
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region = <0x00 0x80000000 0x00 0x80000000>; // 4KB align
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status = "disabled";
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#address-cells = <2>;
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#size-cells = <2>;
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u-boot,dm-pre-reloc;
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};
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axiscr2: axisrc@2 {
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device_type = "axiscr";
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region = <0x01 0x00000000 0x00 0x80000000>; // 4KB align
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status = "disabled";
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#address-cells = <2>;
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#size-cells = <2>;
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u-boot,dm-pre-reloc;
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};
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};
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axiparity {
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compatible = "thead,axiparity";
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reg = <0xff 0xff00c000 0x0 0x1000>;
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lock = "okay";
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#address-cells = <2>;
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#size-cells = <2>;
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u-boot,dm-pre-reloc;
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axiparity0: axiparity@0 {
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device_type = "axiparity";
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region = <0x00 0x00000000 0x01 0x0000000>; // 4KB align
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status = "disabled";
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#address-cells = <2>;
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#size-cells = <2>;
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u-boot,dm-pre-reloc;
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};
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axiparity1: axiparity@1 {
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device_type = "axiparity";
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region = <0x01 0x00000000 0x01 0x00000000>; // 4KB align
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status = "disabled";
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#address-cells = <2>;
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#size-cells = <2>;
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u-boot,dm-pre-reloc;
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};
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};
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dsi_bridge: dsi-bridge {
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compatible = "thead,light-dsi-bridge";
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clocks = <&dummy_dpu_pixclk>;
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clock-names = "pix-clk";
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phys = <&dsi_dphy>;
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phy-names = "dphy";
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};
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dsi_host: dsi-host {
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compatible = "synopsys,dw-mipi-dsi";
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regmap = <&dsi_regs>;
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status = "okay";
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};
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dsi_dphy: dsi-dphy {
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compatible = "synopsys,dw-dphy";
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regmap = <&dsi_regs>;
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vosys-regmap = <&vosys_regs>;
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clocks = <&dummy_dpu_pixclk>, <&dummy_dphy_refclk>;
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clock-names = "pix-clk", "ref-clk";
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#phy-cells = <0>;
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status = "okay";
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};
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lcd_backlight: pwm-backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <7>;
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};
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ili9881c_panel {
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compatible = "ilitek,ili9881c";
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backlight = <&lcd_backlight>;
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reset-gpios = <&gpio1_porta 5 1>; /* active low */
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lcd-en-gpios = <&gpio1_porta 9 0>; /* active high */
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lcd-bias-en-gpios = <&gpio1_porta 10 0>;/* active high */
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};
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};
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chosen {
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bootargs = "console=ttyS0,115200";
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stdout-path = "/soc/serial@ffe7014000:115200";
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};
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};
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