mirror of
https://github.com/thead-yocto-mirror/vpu-vc8000d-kernel
synced 2026-06-21 17:02:34 +02:00
204 lines
8.2 KiB
C
204 lines
8.2 KiB
C
/****************************************************************************
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2014 - 2021 VERISILICON
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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*****************************************************************************
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*
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* The GPL License (GPL)
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*
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* Copyright (C) 2014 - 2021 VERISILICON
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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*****************************************************************************
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*
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* Note: This software is released under dual MIT and GPL licenses. A
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* recipient may use this file under the terms of either the MIT license or
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* GPL License. If you wish to use only one license not the other, you can
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* indicate your decision by deleting one of the above license notices in your
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* version of this file.
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*
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*****************************************************************************/
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#include "subsys.h"
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/******************************************************************************/
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/* subsystem configuration */
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/******************************************************************************/
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/* List of subsystems */
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struct SubsysDesc subsys_array[] = {
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/* {slice_index, index, base} */
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{0, 0, 0xffecc00000},
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// {0, 1, 0x700000}
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};
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/* List of all HW cores. */
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struct CoreDesc core_array[] = {
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/* {slice, subsys, core_type, offset, iosize, irq, has_apbfilter} */
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#if 0
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{0, 0, HW_VC8000DJ, 0x600000, 0, 0},
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{0, 0, HW_VC8000D, 0x602000, 0, 0},
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{0, 0, HW_L2CACHE, 0x604000, 0, 0},
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{0, 0, HW_DEC400, 0x606000, 0, 0},
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{0, 0, HW_BIGOCEAN, 0x608000, 0, 0},
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{0, 0, HW_NOC,0x60a000, 0, 0},
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{0, 0, HW_AXIFE, 0x60c000, 0, 0}
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#endif
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{0, 0, HW_VCMD, 0x0, 27*4, 12},
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{0, 0, HW_VC8000D, 0x1000, 1023*4, -1, 0},
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{0, 0, HW_L2CACHE, 0x2000, 231*4, -1, 0},
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{0, 0, HW_MMU, 0x3000, 228*4, -1, 0},
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//{0, 0, HW_MMU_WR, 0x4000, 228*4, -1, 0},
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//{0, 0, HW_AXIFE, 0x5000, 64*4, -1, 1},
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{0, 0, HW_DEC400, 0x6000, 1568*4, -1, 0},
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//{0, 1, HW_VCMD, 0x0, 27*4, -1, 0},
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//{0, 1, HW_VC8000D, 0x1000, 503*4, -1, 1},
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//{0, 1, HW_L2CACHE, 0x2000, 231*4, -1, 0},
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//{0, 1, HW_MMU, 0x3000, 228*4, -1, 0},
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//{0, 1, HW_MMU_WR, 0x4000, 228*4, -1, 0},
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//{0, 1, HW_AXIFE, 0x5000, 64*4, -1, 1},
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//{0, 1, HW_DEC400, 0x6000, 1568*4, -1, 0},
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};
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extern struct vcmd_config vcmd_core_array[MAX_SUBSYS_NUM];
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extern int total_vcmd_core_num;
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extern unsigned long multicorebase[];
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extern int irq[];
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extern unsigned int iosize[];
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extern int reg_count[];
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/*
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If VCMD is used, convert core_array to vcmd_core_array, which are used in
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hantor_vcmd.c.
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Otherwise, covnert core_array to multicore_base/irq/iosize, which are used in
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hantro_dec.c
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VCMD:
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- struct vcmd_config vcmd_core_array[MAX_SUBSYS_NUM]
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- total_vcmd_core_num
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NON-VCMD:
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- multicorebase[HXDEC_MAX_CORES]
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- irq[HXDEC_MAX_CORES]
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- iosize[HXDEC_MAX_CORES]
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*/
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void CheckSubsysCoreArray(struct subsys_config *subsys, int *vcmd) {
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int num = sizeof(subsys_array)/sizeof(subsys_array[0]);
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int i, j;
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memset(subsys, 0, sizeof(subsys[0])*MAX_SUBSYS_NUM);
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for (i = 0; i < num; i++) {
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subsys[i].base_addr = subsys_array[i].base;
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subsys[i].irq = -1;
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for (j = 0; j < HW_CORE_MAX; j++) {
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subsys[i].submodule_offset[j] = 0xffff;
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subsys[i].submodule_iosize[j] = 0;
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subsys[i].submodule_hwregs[j] = NULL;
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}
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}
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total_vcmd_core_num = 0;
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for (i = 0; i < sizeof(core_array)/sizeof(core_array[0]); i++) {
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if (!subsys[core_array[i].subsys].base_addr) {
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/* undefined subsystem */
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continue;
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}
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subsys[core_array[i].subsys].submodule_offset[core_array[i].core_type]
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= core_array[i].offset;
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subsys[core_array[i].subsys].submodule_iosize[core_array[i].core_type]
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= core_array[i].iosize;
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if (subsys[core_array[i].subsys].irq != -1 && core_array[i].irq != -1) {
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if (subsys[core_array[i].subsys].irq != core_array[i].irq) {
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printk(KERN_INFO "hantrodec: hw core type %d irq %d != subsystem irq %d\n",
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core_array[i].core_type,
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core_array[i].irq,
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subsys[core_array[i].subsys].irq);
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printk(KERN_INFO "hantrodec: hw cores of a subsystem should have same irq\n");
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}
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} else if (core_array[i].irq != -1) {
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subsys[core_array[i].subsys].irq = core_array[i].irq;
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}
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subsys[core_array[i].subsys].has_apbfilter[core_array[i].core_type] = core_array[i].has_apb;
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/* vcmd found */
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if (core_array[i].core_type == HW_VCMD) {
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*vcmd = 1;
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total_vcmd_core_num++;
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}
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}
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printk(KERN_INFO "hantrodec: vcmd = %d\n", *vcmd);
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/* To plug into hantro_vcmd.c */
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if (*vcmd) {
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for (i = 0; i < total_vcmd_core_num; i++) {
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vcmd_core_array[i].vcmd_base_addr = subsys[i].base_addr;
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vcmd_core_array[i].vcmd_iosize = subsys[i].submodule_iosize[HW_VCMD];
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vcmd_core_array[i].vcmd_irq = subsys[i].irq;
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vcmd_core_array[i].sub_module_type = 2; /* TODO(min): to be fixed */
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vcmd_core_array[i].submodule_main_addr = subsys[i].submodule_offset[HW_VC8000D];
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vcmd_core_array[i].submodule_dec400_addr = subsys[i].submodule_offset[HW_DEC400];
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vcmd_core_array[i].submodule_L2Cache_addr = subsys[i].submodule_offset[HW_L2CACHE];
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vcmd_core_array[i].submodule_MMU_addr = subsys[i].submodule_offset[HW_MMU];
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vcmd_core_array[i].submodule_MMUWrite_addr = subsys[i].submodule_offset[HW_MMU_WR];
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vcmd_core_array[i].submodule_axife_addr = subsys[i].submodule_offset[HW_AXIFE];
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}
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}
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memset(multicorebase, 0, sizeof(multicorebase[0]) * HXDEC_MAX_CORES);
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for (i = 0; i < num; i++) {
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multicorebase[i] = subsys[i].base_addr + subsys[i].submodule_offset[HW_VC8000D];
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irq[i] = subsys[i].irq;
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iosize[i] = subsys[i].submodule_iosize[HW_VC8000D];
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printk(KERN_INFO "hantrodec: [%d] multicorebase 0x%08lx, iosize %d\n", i, multicorebase[i], iosize[i]);
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}
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}
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void dump_core_array(void)
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{
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int i;
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for (i = 0; i < sizeof(core_array)/sizeof(core_array[0]); i++) {
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printk(KERN_INFO "lucz: dumping dump_core_array[%d]\n", i);
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printk(KERN_INFO " slice=%d\n", core_array[i].slice);
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printk(KERN_INFO " subsys=%d\n", core_array[i].subsys);
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printk(KERN_INFO " core_type=%d\n", core_array[i].core_type);
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printk(KERN_INFO " offset=%d\n", core_array[i].offset);
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printk(KERN_INFO " iosize=%d\n", core_array[i].iosize);
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printk(KERN_INFO " irq=%d\n", core_array[i].irq);
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printk(KERN_INFO " has_apb=%d\n", core_array[i].has_apb);
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}
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}
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