mirror of
https://github.com/thead-yocto-mirror/xtensa_dsp
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67 lines
2.3 KiB
C
67 lines
2.3 KiB
C
/*
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* @Author: your name
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* @Date: 2022-03-25 12:36:07
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* @LastEditTime: 2022-03-25 12:36:08
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* @LastEditors: your name
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* @Description: 打开koroFileHeader查看配置 进行设置: https://github.com/OBKoro1/koro1FileHeader/wiki/%E9%85%8D%E7%BD%AE
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* @FilePath: /workspace/thead-build/light-fm/tmp-glibc/work/riscv64-oe-linux/xtensa-dsp/1.0-r0/git/driver/xrp-kernel/xrp_hw_simple_dsp_interface.h
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*/
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/*
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* XRP interface between hardware-specific linux and DSP parts of example
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* hardware
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*
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* Copyright (c) 2017 Cadence Design Systems, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* Alternatively you can use and distribute this file under the terms of
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* the GNU General Public License version 2 or later.
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*/
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#ifndef _XRP_KERNEL_SIMPLE_HW_DSP_INTERFACE
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#define _XRP_KERNEL_SIMPLE_HW_DSP_INTERFACE
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#include "xrp_ring_buffer.h"
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enum {
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XRP_DSP_SYNC_IRQ_MODE_NONE = 0x0,
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XRP_DSP_SYNC_IRQ_MODE_LEVEL = 0x1,
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XRP_DSP_SYNC_IRQ_MODE_EDGE = 0x2,
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};
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struct xrp_hw_simple_sync_data {
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__u32 device_mmio_base;
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__u32 host_irq_mode;
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__u32 host_irq_offset;
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__u32 host_irq_bit;
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__u32 device_irq_mode;
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__u32 device_irq_offset;
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__u32 device_irq_bit;
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__u32 device_irq;
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};
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struct xrp_hw_panic {
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__u32 panic;
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__u32 ccount;
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__u32 reserved[2];
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struct xrp_ring_buffer rb;
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};
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#endif
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