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add suspend patch
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cuu
parent
7824e393b3
commit
70b4e41f03
188
Code/patch/armbian_build_a06/patch/kernel-006-panel.patch
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188
Code/patch/armbian_build_a06/patch/kernel-006-panel.patch
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@ -0,0 +1,188 @@
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diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
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index d0c9610ad..c7a40ee6c 100644
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--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
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+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
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@@ -243,6 +243,8 @@ struct dw_mipi_dsi_rockchip {
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struct dw_mipi_dsi *dmd;
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const struct rockchip_dw_dsi_chip_data *cdata;
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struct dw_mipi_dsi_plat_data pdata;
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+
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+ bool dsi_bound;
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};
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struct dphy_pll_parameter_map {
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@@ -752,11 +754,11 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
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&dsi->encoder);
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if (mux < 0)
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return;
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-
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+ /*
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pm_runtime_get_sync(dsi->dev);
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if (dsi->slave)
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pm_runtime_get_sync(dsi->slave->dev);
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-
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+ */
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/*
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* For the RK3399, the clk of grf must be enabled before writing grf
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* register. And for RK3288 or other soc, this grf_clk must be NULL,
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@@ -774,7 +776,7 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
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clk_disable_unprepare(dsi->grf_clk);
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}
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-
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+/*
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static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder)
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{
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struct dw_mipi_dsi_rockchip *dsi = to_dsi(encoder);
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@@ -783,12 +785,12 @@ static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder)
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pm_runtime_put(dsi->slave->dev);
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pm_runtime_put(dsi->dev);
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}
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-
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+*/
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static const struct drm_encoder_helper_funcs
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dw_mipi_dsi_encoder_helper_funcs = {
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.atomic_check = dw_mipi_dsi_encoder_atomic_check,
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.enable = dw_mipi_dsi_encoder_enable,
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- .disable = dw_mipi_dsi_encoder_disable,
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+// .disable = dw_mipi_dsi_encoder_disable,
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};
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static int rockchip_dsi_drm_create_encoder(struct dw_mipi_dsi_rockchip *dsi,
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@@ -917,11 +919,16 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev,
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dw_mipi_dsi_set_slave(dsi->dmd, dsi->slave->dmd);
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put_device(second);
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}
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-
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+
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+ pm_runtime_get_sync(dsi->dev);
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+ if(dsi->slave)
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+ pm_runtime_get_sync(dsi->slave->dev);
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+
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ret = clk_prepare_enable(dsi->pllref_clk);
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if (ret) {
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DRM_DEV_ERROR(dev, "Failed to enable pllref_clk: %d\n", ret);
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- return ret;
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+// return ret;
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+ goto out_pm_runtime;
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}
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/*
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@@ -933,7 +940,8 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev,
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ret = clk_prepare_enable(dsi->grf_clk);
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if (ret) {
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DRM_DEV_ERROR(dsi->dev, "Failed to enable grf_clk: %d\n", ret);
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- return ret;
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+// return ret;
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+ goto out_pll_clk;
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}
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dw_mipi_dsi_rockchip_config(dsi);
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@@ -945,16 +953,29 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev,
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ret = rockchip_dsi_drm_create_encoder(dsi, drm_dev);
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if (ret) {
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DRM_DEV_ERROR(dev, "Failed to create drm encoder\n");
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- return ret;
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+// return ret;
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+ goto out_pll_clk;
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}
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ret = dw_mipi_dsi_bind(dsi->dmd, &dsi->encoder);
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if (ret) {
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DRM_DEV_ERROR(dev, "Failed to bind: %d\n", ret);
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- return ret;
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+// return ret;
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+ goto out_pll_clk;
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}
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+
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+ dsi->dsi_bound = true;
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return 0;
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+out_pll_clk:
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+ clk_disable_unprepare(dsi->pllref_clk);
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+out_pm_runtime:
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+ pm_runtime_put(dsi->dev);
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+ if (dsi->slave)
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+ pm_runtime_put(dsi->slave->dev);
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+
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+ return ret;
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+
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}
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static void dw_mipi_dsi_rockchip_unbind(struct device *dev,
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@@ -965,10 +986,16 @@ static void dw_mipi_dsi_rockchip_unbind(struct device *dev,
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if (dsi->is_slave)
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return;
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+
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+ dsi->dsi_bound = false;
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dw_mipi_dsi_unbind(dsi->dmd);
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clk_disable_unprepare(dsi->pllref_clk);
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+
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+ pm_runtime_put(dsi->dev);
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+ if (dsi->slave)
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+ pm_runtime_put(dsi->slave->dev);
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}
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static const struct component_ops dw_mipi_dsi_rockchip_ops = {
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@@ -1126,16 +1153,48 @@ static int dw_mipi_dsi_rockchip_probe(struct platform_device *pdev)
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if (ret != -EPROBE_DEFER)
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DRM_DEV_ERROR(dev,
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"Failed to probe dw_mipi_dsi: %d\n", ret);
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- goto err_clkdisable;
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+// goto err_clkdisable;
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+ return ret;
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}
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return 0;
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-
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+/*
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err_clkdisable:
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clk_disable_unprepare(dsi->pllref_clk);
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return ret;
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+*/
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+}
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+
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+static int __maybe_unused dw_mipi_dsi_rockchip_resume(struct device *dev)
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+{
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+ struct dw_mipi_dsi_rockchip *dsi = dev_get_drvdata(dev);
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+ int ret;
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+
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+ /*
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+ * Re-configure DSI state, if we were previously initialized. We need
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+ * to do this before rockchip_drm_drv tries to re-enable() any panels.
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+ */
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+ if (dsi->dsi_bound) {
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+ ret = clk_prepare_enable(dsi->grf_clk);
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+ if (ret) {
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+ DRM_DEV_ERROR(dsi->dev, "Failed to enable grf_clk: %d\n", ret);
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+ return ret;
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+ }
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+
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+ dw_mipi_dsi_rockchip_config(dsi);
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+ if (dsi->slave)
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+ dw_mipi_dsi_rockchip_config(dsi->slave);
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+
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+ clk_disable_unprepare(dsi->grf_clk);
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+ }
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+
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+ return 0;
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}
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+static const struct dev_pm_ops dw_mipi_dsi_rockchip_pm_ops = {
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+ SET_LATE_SYSTEM_SLEEP_PM_OPS(NULL, dw_mipi_dsi_rockchip_resume)
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+};
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+
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static int dw_mipi_dsi_rockchip_remove(struct platform_device *pdev)
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{
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struct dw_mipi_dsi_rockchip *dsi = platform_get_drvdata(pdev);
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@@ -1249,6 +1308,7 @@ struct platform_driver dw_mipi_dsi_rockchip_driver = {
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.remove = dw_mipi_dsi_rockchip_remove,
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.driver = {
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.of_match_table = dw_mipi_dsi_rockchip_dt_ids,
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+ .pm = &dw_mipi_dsi_rockchip_pm_ops,
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.name = "dw-mipi-dsi-rockchip",
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},
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};
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