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https://github.com/LNH-team/pico-loader.git
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76 lines
2.7 KiB
C
76 lines
2.7 KiB
C
#pragma once
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#include "common.h"
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#include <libtwl/card/card.h>
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/// libtwl workaround. Certain DSTT clones need bytewise access to MCCMD
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#define REG_MCCMD0_U8 ((vu8*)®_MCCMD0)
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/// Common DSTT MCCNT1 flags.
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#define DSTT_CTRL_BASE (MCCNT1_ENABLE | MCCNT1_RESET_OFF | MCCNT1_LATENCY2(24) | MCCNT1_LATENCY1(0))
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#define DSTT_CTRL_READ_4B (DSTT_CTRL_BASE | MCCNT1_LEN_4)
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#define DSTT_CTRL_SET_CARD_MODE (DSTT_CTRL_READ_4B | MCCNT1_CMD_SCRAMBLE | MCCNT1_CLOCK_SCRAMBLER | MCCNT1_READ_DATA_DESCRAMBLE)
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/// Common MCCNT1 LATENCY1.
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/// During SDIO init SD host commands have a higher latency; in all other cases this is 0.
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#define DSTT_CTRL_SD_LOW_CLK_LATENCY 0x1000
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/// SD host related commands.
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///
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/// Note:
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/// While this is where the SDIO happens, it isn't always SDIO.
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/// Thus, it can sometimes be 0.
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///
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/// Command structure:
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/// 51 AA AA AA AA BB CC 00
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/// AAAAAAAA = SDIO parameter
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/// BB = SDIO command
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/// CC = SD host mode, see DSTTSdHostModes enum.
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#define DSTT_CMD_SD_HOST_PARAM 0x51
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/// SD host miscellaneous commands.
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/// return 0 == idle
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/// return non-0 == not idle
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#define DSTT_CMD_SD_HOST_BUSY 0x50
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/// Retrieves the response from previous SD host param.
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/// Returns a value if the sent mode is 1 or 2.
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#define DSTT_CMD_SD_HOST_RESPONSE 0x52
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/// Command to write to host register. The register bits can be found below.
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#define DSTT_CMD_SD_HOST_SET_REGISTER 0x5F
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/// SD host modes.
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/// Used with DSTT_CMD_SD_HOST_PARAM command.
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enum DSTTSdHostModes
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{
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DSTT_SD_HOST_NORESPONSE = 0,
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DSTT_SD_HOST_READ_4B = 1,
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DSTT_SD_HOST_READ_4B_MULTI = 2, // use mode 3 to continue this read
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DSTT_SD_HOST_NEXT_4B = 3,
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DSTT_SD_HOST_SEND_CLK = 4,
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DSTT_SD_HOST_SEND_STOP_CLK = 5,
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DSTT_SD_HOST_READ_DATABLOCK = 6,
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DSTT_SD_HOST_NEXT_DATABLOCK = 7,
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DSTT_SD_HOST_CMD17_READ_DATA = 8, // Send SDIO CMD17 & read data
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DSTT_SD_HOST_CMD18_READ_DATA = 9, // Send SDIO CMD18 & read data until stop
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DSTT_SD_HOST_COMMIT_FIFO_DATA = 0xA, // commit data in FIFO to SD card
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DSTT_SD_HOST_CMD24_WRITE_DATA = 0xB, // Send SDIO CMD24 & send data in SRAM buffer
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DSTT_SD_HOST_WAIT_BUSY = 0xC // wait until data transfer ends
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};
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/// SD host control registers.
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/// The 0x5F sets raw registers related to the SD host, which is a single u8.
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/// Bits:
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/// 0: Reset
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/// 1: Set 400k low clk
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/// 2: Use 0xB7 as alternative of 0x5B for ROM reads
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/// 3: Set SDHC mode
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/// 4-5: 1
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/// 6-7: 0
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#define DSTT_SD_HOST_REG_CLEAR_ALL 0
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#define DSTT_SD_HOST_REG_RESET BIT(0)
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#define DSTT_SD_HOST_REG_400KHZ_CLK BIT(1)
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#define DSTT_SD_HOST_REG_CLEAN_ROM_MODE BIT(2)
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#define DSTT_SD_HOST_REG_SDHC BIT(3)
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