add automatic external link icon using CSS

Signed-off-by: Michel-FK <michel.stempin@funkey-project.com>
This commit is contained in:
Michel-FK 2021-01-31 17:07:55 +01:00
parent c2c9d149fd
commit a9f55422b6
19 changed files with 193 additions and 185 deletions

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@ -90,6 +90,7 @@ body {
}
}
/* Font for FunKey S keys */
@font-face {
font-family: 'FunKey-S-Keys';
src: url('/assets/fonts/FunKey-S-Keys.eot?b52ver');
@ -102,6 +103,7 @@ body {
font-display: block;
}
/* Class for FunKey S keys */
[class^="funkey-"], [class*=" funkey-"] {
/* use !important to prevent issues with browser extensions that change fonts */
font-family: 'FunKey-S-Keys' !important;
@ -113,54 +115,104 @@ body {
font-size: 1rem;
line-height: 1;
/* Better Font Rendering =========== */
/* Better Font Rendering */
-webkit-font-smoothing: antialiased;
-moz-osx-font-smoothing: grayscale;
}
/* FunKey S "A" key */
.funkey-A:before {
content: "\e900";
}
/* FunKey S "B" key */
.funkey-B:before {
content: "\e902";
}
/* FunKey S "X" key */
.funkey-X:before {
content: "\e904";
}
/* FunKey S "Y" key */
.funkey-Y:before {
content: "\e906";
}
/* FunKey S "UP" key */
.funkey-up:before {
content: "\e908";
}
/* FunKey S "DOWN" key */
.funkey-down:before {
content: "\e909";
}
/* FunKey S "LEFT" key */
.funkey-left:before {
content: "\e90a";
}
/* FunKey S "RIGHT" key */
.funkey-right:before {
content: "\e90b";
}
/* FunKey S "L" key */
.funkey-L:before {
content: "\e90c";
}
/* FunKey S "R" key */
.funkey-R:before {
content: "\e90d";
}
/* FunKey S "START" key */
.funkey-start:before {
content: "\e90e";
}
/* FunKey S "Fn" key */
.funkey-fn:before {
content: "\e90f";
}
/* FunKey S "MENU" key */
.funkey-menu:before {
content: "\e912";
}
.md-typeset span.twemoji {
display: inline-block;
height: 0.5em;
vertical-align: super;
/* External link icon */
:root {
/*
line left
line right
line bottom
line top
arrow left
arrow right
arrow diagonal
*/
--icon-external-link: url('data:image/svg+xml,\
<svg xmlns="http://www.w3.org/2000/svg" viewBox="0 0 20 20"> \
<g style="stroke:rgb(35,82,124);stroke-width:1"> \
<line x1="5" y1="5" x2="5" y2="14" /> \
<line x1="14" y1="9" x2="14" y2="14" /> \
<line x1="5" y1="14" x2="14" y2="14" /> \
<line x1="5" y1="5" x2="9" y2="5" /> \
<line x1="10" y1="2" x2="17" y2="2" /> \
<line x1="17" y1="2" x2="17" y2="9" /> \
<line x1="10" y1="9" x2="17" y2="2" style="stroke-width:1.5" /> \
</g> \
</svg>');
}
/* Append external link icon on all links starting with "http://" or "https://" */
a[href^="http://"]::after, a[href^="https://"]::after {
content: '';
background: no-repeat var(--icon-external-link);
padding-right: 0.7em;
}

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@ -26,16 +26,14 @@ A 3D rendering of the PCBA done in KiCAD produces the images below:
## BOM
An interactive BOM is available in the [next section][4].
An interactive BOM is available in the [next section][1].
## Schematics and Layout
All the hardware design and production files required to build the
[**FunKey S** retro-gaming
console:fontawesome-solid-external-link-alt:][1] electronic PCBA using
the [KiCAD ECAD tools:fontawesome-solid-external-link-alt:][2] are
available as Open Hardware in the [FunKey S Hardware
repository:fontawesome-solid-external-link-alt:][3].
[**FunKey S** retro-gaming console][2] electronic PCBA using the
[KiCAD ECAD tools][3] are available as Open Hardware in the [FunKey S
Hardware repository][4].
???+ note "Topological vs. logical schematic symbols"
@ -70,10 +68,10 @@ repository:fontawesome-solid-external-link-alt:][3].
The schematics will be discussed function by function in the following
sections.
[1]: https://www.funkey-project.com/
[2]: https://kicad.org/
[3]: https://github.com/FunKey-Project/FunKey-S-Hardware
[4]: https://htmlpreview.github.io/?https://github.com/FunKey-Project/FunKey-S-Hardware/blob/master/BOM/ibom.html
[1]: https://htmlpreview.github.io/?https://github.com/FunKey-Project/FunKey-S-Hardware/blob/master/BOM/ibom.html
[2]: https://www.funkey-project.com/
[3]: https://kicad.org/
[4]: https://github.com/FunKey-Project/FunKey-S-Hardware
--8<--
includes/glossary.md

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@ -28,18 +28,16 @@ headphones either.
![Speaker](/assets/images/Speaker.png){: align=left }
The best solution we have found consists in using a single tiny [CUI
CDM-10008:fontawesome-solid-external-link-alt:][1] speaker, that is
able to output 72 dB spl @ 1m from a 0.3W input power, with relatively
modest dimensions: 10 mm diameter and only a 2.9 mm thickness, out of
which 1.4 mm can be inserted into a PCB hole, thus only having a
height above PCB of only 1.5 mm.
CDM-10008][1] speaker, that is able to output 72 dB spl @ 1m from a
0.3W input power, with relatively modest dimensions: 10 mm diameter
and only a 2.9 mm thickness, out of which 1.4 mm can be inserted into
a PCB hole, thus only having a height above PCB of only 1.5 mm.
Connections are not easy though, since this speaker is meant to have
wires soldered to its pads, but we used 2x
[castellated:fontawesome-solid-external-link-alt:][2] (half-round
plated holes) pads with a placement just over the speaker pads that
enables manual soldering between the speaker and the PCB with a solder
blob.
wires soldered to its pads, but we used 2x [castellated][2]
(half-round plated holes) pads with a placement just over the speaker
pads that enables manual soldering between the speaker and the PCB
with a solder blob.
## Schematic
@ -48,11 +46,10 @@ contains an analog stereo audio codec (coder/decoder): we only have to
take one of its headphone output channel (left or right) and feed it
to a mono audio amplifier.
We chose the [Diodes
Inc. PAM8301:fontawesome-solid-external-link-alt:][3] chip because of
its cheap price, good availability, its more than sufficient output
power of 1.5W and its filterless operation, meaning that no bulky
series capacitor is required to drive the speaker.
We chose the [Diodes Inc. PAM8301][3] chip because of its cheap price,
good availability, its more than sufficient output power of 1.5W and
its filterless operation, meaning that no bulky series capacitor is
required to drive the speaker.
Here is the corresponding schematic:

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@ -11,28 +11,26 @@ As can be seen in the page on the [PMIC][1], the soft "ON/OFF" button
is directly connected to the power management chip, so we are left
with 4 + 4 + 2 = 12 buttons for game control.
After testing tactile domes in our [**FunKey
Zero**:fontawesome-solid-external-link-alt:][2] prototype, we decided
to go back to integrated tactile switches, as their placement is much
easier using a regular SMT pick & place machine like any other
After testing tactile domes in our [**FunKey Zero**][2] prototype, we
decided to go back to integrated tactile switches, as their placement
is much easier using a regular SMT pick & place machine like any other
components on the PCB, whereas the separate tactile domes required an
adhesive tape to be place manually with less accuracy.
![EVBPBB1AAB000](/assets/images/EVPBB1AAB000.png){: align=left }
The [Mitsumi BYS-055A1x12:fontawesome-solid-external-link-alt:][3] is
the same footprint (2.5mm x 1.6mm x 0.55mm) as the more expensive
Panasonic EVBBBxAAB00 tactile switches, with a 1.2N actuating force
for the "**+**" and "**X**" pads, and a 1.6N actuating force for the
"Start", "Fn" and "ON/OFF" buttons. We found these actuating force the
best match to provide a good feedback to the user.
The [Mitsumi BYS-055A1x12][3] is the same footprint (2.5mm x 1.6mm x
0.55mm) as the more expensive Panasonic EVBBBxAAB00 tactile switches,
with a 1.2N actuating force for the "**+**" and "**X**" pads, and a
1.6N actuating force for the "Start", "Fn" and "ON/OFF" buttons. We
found these actuating force the best match to provide a good feedback
to the user.
![EVP-AEBB2A-1](/assets/images/EVP-AEBB2A-1.jpg){: align=left }
For the rear left and right shoulder buttons, we exeperimented several
models between PCBA rev. C, D and E, until we eventually decided for a
[replacement for the expensive Panasonic
EVP-AEBB2A-1:fontawesome-solid-external-link-alt:][4]:
[replacement for the expensive Panasonic EVP-AEBB2A-1][4]:
This one as an actuating force of 1.6N.
@ -59,11 +57,10 @@ PCB routing, at such a point that we decided to use a dedicated I2C
GPIO expander chip to relieve the burden from the main V3s CPU.
We use a common chip for this purpose, that is well supported in the
Linux kernel: the [NXP
PCAL6416AHF.128:fontawesome-solid-external-link-alt:][5]. It is
marketed as a "low-voltage translating 16-bit I2C-bus/SMBus I/O
expander with interrupt output, reset, and configuration registers"
that just matches exactly our needs.
Linux kernel: the [NXP PCAL6416AHF.128][5]. It is marketed as a
"low-voltage translating 16-bit I2C-bus/SMBus I/O expander with
interrupt output, reset, and configuration registers" that just
matches exactly our needs.
As a bonus, this chip features software-controlable internal
pull-up/pull-down resistors, so we don't need to add external ones to

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@ -4,16 +4,14 @@ As discussed in the [Design Constraints section][1], a CPU with
external DRAM chips would take too much real-estate on the PCB, so we
had to find a CPU with integrated DRAM.
There are [several options:fontawesome-solid-external-link-alt:][2]
for integrating RAM in a SoC:
There are [several options][2] for integrating RAM in a SoC:
- use SRAM: not possible because of the small amount of memory
available (64Mbit max.)
- embedded DRAM on the same chip: This is the solution used in the
[Apple M1 chip:fontawesome-solid-external-link-alt:][3], but this
chip is not available for retail and no other solutions seems
readily available
[Apple M1 chip][3], but this chip is not available for retail and
no other solutions seems readily available
- Stacked Chip-on-Chip (PoP): This is the solution used on some
Raspberry Pi boards, but this solution is only available for custom
@ -23,17 +21,14 @@ for integrating RAM in a SoC:
- DRAM die in SiP: with capacities ranging from 64Mbit to 1Gbit
We found only 2 manufacturers providing the last option:
[Microchip:fontawesome-solid-external-link-alt:][4] and [Allwinner
Technology:fontawesome-solid-external-link-alt:][5]. Microchip
solutions are too limited in term of CPU power for our needs
(ARM926EJ-S or Cortex A5), so we did not consider them.
[Microchip][4] and [Allwinner Technology][5]. Microchip solutions are
too limited in term of CPU power for our needs (ARM926EJ-S or Cortex
A5), so we did not consider them.
And with the exception of the mostly similar Allwinner S3 CPU which
features the same characteristics but with 128MB DDR3 DRAM in an
FBGA234 package, the [Allwinner
V3s:fontawesome-solid-external-link-alt:][6] is the CPU with
integrated DRAM having the highest memory capacity (512Mbit / 64MB
DDR2 DRAM):
FBGA234 package, the [Allwinner V3s][6] is the CPU with integrated
DRAM having the highest memory capacity (512Mbit / 64MB DDR2 DRAM):
![Allwinner V3s SoC](/assets/images/Allwinner_V3s.jpeg)
@ -153,19 +148,16 @@ glitches.
The SD Card interface is almost a direct connection between the chip
and the dedicated SD Card connector. Only a single series resistor
**R8** is required on the high-speed clock line in order to [prevent
ringing:fontawesome-solid-external-link-alt:][7].
ringing][7].
## Crystals
The V3s chips requires 2 crystals:
- one low-frequency [32.768 kHz
crystal:fontawesome-solid-external-link-alt:][8] **Y1** for the RTC
clock
- one low-frequency [32.768 kHz crystal][8] **Y1** for the RTC clock
- one high-frequency [24 MHz
crystal:fontawesome-solid-external-link-alt:][9] **Y2** for deriving
the 1.2 GHz clock
- one high-frequency [24 MHz crystal][9] **Y2** for deriving the 1.2
GHz clock
The 24 MHz crystal is used by an internal oscillator to lock the phase
of the 1.2 GHz oscillator using a PLL (Phase-Locked Loop).
@ -183,21 +175,19 @@ The 32.768 kHz crystal features an additional high-value resistor
thus reduce further the RTC timer power consumption.
For more details on crystal oscillator design, please check [this
application note from STM:fontawesome-solid-external-link-alt:][10].
application note from STM][10].
## DRAM
The DRAM within the V3s chip is a [DDR2
one:fontawesome-solid-external-link-alt:][11], meaning that its data
lines are clocked using both edges of an up to 400 MHz clock signal.
The DRAM within the V3s chip is a [DDR2 one][11], meaning that its
data lines are clocked using both edges of an up to 400 MHz clock
signal.
At these high frequencies, even short wires have a length that is of
the same order of magnitude as the signal's
[wavelength:fontawesome-solid-external-link-alt:][12] and thus each
signal should be considered as a [transmission
line:fontawesome-solid-external-link-alt:][13], for which impedance
must be matched to avoid signal reflections, requiring termination
resistors on the data lines DQx.
the same order of magnitude as the signal's [wavelength][12] and thus
each signal should be considered as a [transmission line][13], for
which impedance must be matched to avoid signal reflections, requiring
termination resistors on the data lines DQx.
DDR2 or DDR3 DRAMs feature merged drivers and dynamic on-chip
termination like this ("VDDQ/2" is labeled "SVREF" in our schematic):
@ -211,8 +201,7 @@ resistor **R11** connected internally like this:
![Pull-Up Calibration](/assets/images/Pull-Up_Calibration.png){.lightbox}
More information on the DDR2 DRAM ZQ Calibration subject can be found
in this [Micron Application
Note:fontawesome-solid-external-link-alt:][14].
in this [Micron Application Note][14].
[1]: /developers/hardware/design/#design-constraints
[2]: https://www.electronicsweekly.com/news/products/memory/how-to-guide-for-on-chip-memory-2012-06/

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@ -23,7 +23,7 @@ something quite usual for a keychain...
We found only a unique plastic-molded model which almost meets our
low-profile requirements of 1.5 mm (1.6 mm height!): the [Standex
Meder MK24:fontawesome-solid-external-link-alt:][1].
Meder MK24][1].
Here is the corresponding schematics, already covered in the PMIC
discussion:

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@ -18,12 +18,11 @@ output voltage.
### Shunt Regulator
The simplest voltage regulator is the [shunt
regulator:fontawesome-solid-external-link-alt:][1], built around a
Zener diode which most interesting characteristic is to maintain a
constant voltage across itself when the current through it is
sufficient to take it into the Zener breakdown region. A simple shunt
regulator looks like this:
The simplest voltage regulator is the [shunt regulator][1], built
around a Zener diode which most interesting characteristic is to
maintain a constant voltage across itself when the current through it
is sufficient to take it into the Zener breakdown region. A simple
shunt regulator looks like this:
![Zener Regulator](/assets/images/Zener_Regulator.gif)
@ -33,8 +32,7 @@ By adding a emitter-follower transistor to the simple shunt regulator,
the small base current of the transistor forms a very light load on
the Zener, thereby minimizing variation in Zener voltage due to
variation in the load, resulting in a better regulation. Here is a
schematic for this [series
regulator:fontawesome-solid-external-link-alt:][2]:
schematic for this [series regulator][2]:
![Series Regualtor](/assets/images/Series_Regulator.gif)
@ -122,14 +120,14 @@ following:
![Buck Converter](/assets/images/Buck_Converter.gif)
The way this converter works is described in details
[here:fontawesome-solid-external-link-alt:][3]. Basically, when the
switch is closed, the inductor will produce an opposing voltage across
its terminals in response to the changing current, reducing the output
voltage, and meanwhile the inductor stores this energy in the form of
a magnetic field. When the switch is opened, the current will decrease
and will produce a voltage drop across the inductor, and now the
inductor becomes a current source, where the stored energy in the
inductor's magnetic field is restored and fed to the load.
[here][3]. Basically, when the switch is closed, the inductor will
produce an opposing voltage across its terminals in response to the
changing current, reducing the output voltage, and meanwhile the
inductor stores this energy in the form of a magnetic field. When the
switch is opened, the current will decrease and will produce a voltage
drop across the inductor, and now the inductor becomes a current
source, where the stored energy in the inductor's magnetic field is
restored and fed to the load.
!!! warning
In this converter too, the output voltage is not isolated from the

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@ -102,8 +102,7 @@ capacitors:
One exception is the Allwinner V3s CPU HPR/HPL circuit which features
an RC-to-ground circuit between the amplifier and the preamplifier
input with the resistor **R27** and capacitors **C79** and **C81**, as
recommended in the [V3s hardware design
guide:fontawesome-solid-external-link-alt:][5].
recommended in the [V3s hardware design guide][5].
The only other remarkable point left in this schematic is the resistor
divider **R25**/**R28** which provides a reference voltage at half the

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@ -1,5 +1,5 @@
A separate [Sylergy SY8088:fontawesome-solid-external-link-alt:][1]
Buck DC/DC SMPS chip is used to provide the DDR2 +1V8 DDR2 DRAM power.
A separate [Sylergy SY8088][1] Buck DC/DC SMPS chip is used to provide
the DDR2 +1V8 DDR2 DRAM power.
This is because the AXP20x is originally the PMU (Power Management
Unit) used by most Allwinner SoCs (A10, A13 and A20), which do not
@ -15,7 +15,7 @@ We thus have to design a separate SMPS (DC-DC) power supply for
providing the +1.8V 1A required for the DDR2 DRAM power supply.
For this purpose, we followed closely the [Allwinner Reference
Design:fontawesome-solid-external-link-alt:][2].
Design][2].
Here is the corresponding DRAM Power schematics:

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@ -7,16 +7,14 @@ requirements to:
- SMPS for +1.8V / 1A for the DDR2 DRAM power supply
- SMPS for +1.25V / 1.6 A for the core power supply
On the [LicheePi Zero board:fontawesome-solid-external-link-alt:][1]
used in our **[FunKey Zero:fontawesome-solid-external-link-alt:][2]**
prototype, a triple SMPS
[EA3036:fontawesome-solid-external-link-alt:][3] is used for
generating these +3.3V, +1.8V and +1.2V voltages, with an additional
[XC6206:fontawesome-solid-external-link-alt:][4] LDO for the +3.0V
(the +3.3V Always On is connected directly to +3.3V). Although compact
(the EA3036 is a tiny 3 mm x 3 mm QFN20 package), this solution is not
ideal as it does not provide a battery charger and monitoring
capability, which is a requirement for the **FunKey S** device.
On the [LicheePi Zero board][1] used in our **[FunKey Zero][2]**
prototype, a triple SMPS [EA3036][3] is used for generating these
+3.3V, +1.8V and +1.2V voltages, with an additional [XC6206][4] LDO
for the +3.0V (the +3.3V Always On is connected directly to
+3.3V). Although compact (the EA3036 is a tiny 3 mm x 3 mm QFN20
package), this solution is not ideal as it does not provide a battery
charger and monitoring capability, which is a requirement for the
**FunKey S** device.
## PMICs
@ -24,8 +22,7 @@ As it is generally the case with such a complex SoC requiring multiple
voltages, high current and proper voltage sequencing, all major
manufacturers provide dedicated companion chips called PMICs (Power
Management Integrated Circuits), in charge of these tasks. Allwinner
is not an exception through its sister company
[X-Powers:fontawesome-solid-external-link-alt:][5].
is not an exception through its sister company [X-Powers][5].
Their AXP20x products are highly-integrated PMICs that are optimized
for applications requiring single-cell Li-battery (Li-Ion/Polymer),
@ -74,9 +71,7 @@ The AXP20x features:
output to GPIO0)
Looking at their datasheets, it is difficult to tell the difference
between the [AXP202:fontawesome-solid-external-link-alt:][6],
[AXP203:fontawesome-solid-external-link-alt:][7] and
[AXP209:fontawesome-solid-external-link-alt:][8] (any hint
between the [AXP202][6], [AXP203][7] and [AXP209][8] (any hint
welcome!). In the **FunKey S** design, we use an AXP209 because it is
the one that comes along with the V3s when you buy it on AliExpress.
@ -88,8 +83,7 @@ the manufacturer, as the internals of the chips are seldom fully
disclosed, so you need to take their word on some of the external
component values to use.
The [Allwinner V3s Reference
Design:fontawesome-solid-external-link-alt:][9] contains on page 6 the
The [Allwinner V3s Reference Design][9] contains on page 6 the
schematics for using an AXP203 to supply the power to a V3s-based
dashboard camera design. It follows closely the application diagram
provided in the AXP20x datasheets:
@ -97,7 +91,7 @@ provided in the AXP20x datasheets:
![AXP20x Application Diagram](/assets/images/AXP20x_Application_Diagram.png){.lightbox}
More hints are provided in our self-translated [V3s Hardware Design
Guide:fontawesome-solid-external-link-alt:][10] (page 7) too.
Guide][10] (page 7) too.
## PMIC Schematics
@ -173,11 +167,10 @@ operation:
### DC-DC1 PWM Battery Charger (North East side)
The battery is connected to J5 (a [2-pin JST 1.0 mm pitch
receptacle:fontawesome-solid-external-link-alt:][11]) and uses **R21**
as a precision current sense resistor, with **C53**/**C56**/**C60**
filter capacitors and **L5** (a low-profile ferrite-core power
inductor rated with a saturation current of 1.2A and low < 0.1
resistance).
receptacle][11]) and uses **R21** as a precision current sense
resistor, with **C53**/**C56**/**C60** filter capacitors and **L5** (a
low-profile ferrite-core power inductor rated with a saturation
current of 1.2A and low < 0.1 resistance).
!!! Warning
The battery is not protected on the board against reversing
@ -188,11 +181,10 @@ resistance).
temperature, as the chosen LiPo battery does not feature this
temperature sensor.
A user-programmable (through the I2C interface) charge
[LED:fontawesome-solid-external-link-alt:][12] **D30** is provided,
with its current-limiting resistor **R26**, as well as a TVS diode
**d31** to prevent ESD, as the LED body will be indirectly accessible
to user.
A user-programmable (through the I2C interface) charge [LED][12]
**D30** is provided, with its current-limiting resistor **R26**, as
well as a TVS diode **d31** to prevent ESD, as the LED body will be
indirectly accessible to user.
### DC-DC2 +1.25V / 1.6A (West side)

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@ -2,7 +2,7 @@ Looking back at the section on the [CPU schematics][1], the **FunKey
S** device clearly needs a sophisticated power supply in order to
fulfill the CPU power requirements. They are recalled below, along
with the maximum current requirements found in the [Allwinner V3s
reference design:fontawesome-solid-external-link-alt:][2] (page 3):
reference design][2] (page 3):
- +3.3V / 1.2A for the I/O power supply
- +3.3V_AO / 30 mA for the Always-On power supply (RTC timer)

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@ -52,9 +52,8 @@ RGB565 (2 bytes / pixel), this requires a ~44 MHz SPI clock rate,
which is rather high.
Once again, we were fortunate as both the V3s CPU and the screen
built-in controller (a Sitronix
[ST7789V:fontawesome-solid-external-link-alt:][1]) both support this
high clock speed (after checking with the manufacturer and despite the
built-in controller (a Sitronix [ST7789V][1]) both support this high
clock speed (after checking with the manufacturer and despite the
controller datasheet that specifies only a serial clock cycle (Write)
of 66 ns or 15 MHz!).
@ -66,8 +65,8 @@ current directly from a CPU GPIO and the backlight will require an
additional transistor to interface to the LCD backlight.
Its flex cable requires a mating Hirose 0.4 mm pitch
[DF37NB-24DS-0.4V:fontawesome-solid-external-link-alt:][2] dual row
SMT connector, out of which only one single row is actually used.
[DF37NB-24DS-0.4V][2] dual row SMT connector, out of which only one
single row is actually used.
## Customization
@ -75,10 +74,9 @@ Unfortunately, the flex cable for the stock LCD screen we found does
not match our particular **FunKey S** mechanical design.
For the prototypes, we designed custom flex extension cables for a ~
$100 cost, but we had to design [our own custom
flex:fontawesome-solid-external-link-alt:][3] and have this standard
screen assembly attached to it for mass production, with a one-time
tooling fee of ~ $800.
$100 cost, but we had to design [our own custom flex][3] and have this
standard screen assembly attached to it for mass production, with a
one-time tooling fee of ~ $800.
## Schematic

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@ -16,17 +16,14 @@ the specifications.
The SD Card physical interface is provided in the "<i>SD
specifications, part 1, Physical Layer Specification version 2.00, May
9, 2006</i>", for which a simplified version is available
[here:fontawesome-solid-external-link-alt:][1].
9, 2006</i>", for which a simplified version is available [here][1].
The MMC phyiscal interface can be found in the "<i>Multi Media Card
System Specification version 4.3, JESD84-A43, November 2007</i>",
available [here:fontawesome-solid-external-link-alt:][2] (registration
required).
available [here][2] (registration required).
But a good summary of the requirements is given in the "[<i>AN10911
SD(HC)-memory card and MMC Interface
conditioning</i>:fontawesome-solid-external-link-alt:][3]" application
But a good summary of the requirements is given in the "_[AN10911
SD(HC)-memory card and MMC Interface conditioning][3]_" application
note from NXP, from which this schematic is taken:
![SD MMC Interface](/assets/images/SD_MMC_Interface.png){.lightbox}
@ -88,9 +85,9 @@ The FunKey SD Card interface schematic is the following:
![TF-110](/assets/images/TF-110.png){: align=left }
As can be expected, the main component is the [Micro SD (TF Card)
Push/Pull connector:fontawesome-solid-external-link-alt:][5] **J4**,
which has been selected for its low-profile (1.3 mm height)
characteristic and overall minimal dimensions.
Push/Pull connector][5] **J4**, which has been selected for its
low-profile (1.3 mm height) characteristic and overall minimal
dimensions.
!!! Tip

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@ -14,12 +14,11 @@ the cable wiring which role we must take.
![U02-BFD3111B0-009](/assets/images/U02-BFD3111B0-009.png){: align=left }
The main part is of course the [Micro USB edge-mounted
connector:fontawesome-solid-external-link-alt:][1] **J2**, which we
chose in order to "mask out" its already low-profile height into the
PCB thickness. And with its "harpoon-like" through-hole legs, it
should avoid tearing it off the board if the user don't pull the chord
straight.
The main part is of course the [Micro USB edge-mounted connector][1]
**J2**, which we chose in order to "mask out" its already low-profile
height into the PCB thickness. And with its "harpoon-like"
through-hole legs, it should avoid tearing it off the board if the
user don't pull the chord straight.
The USB schematic is the following:
@ -43,12 +42,10 @@ maximum bulk capacitance value to 10 µF in order to avoid power supply
excessive droops when plugin in a device with a discharged large bulk
capacitor.
**D15** is a [NXP
PRTR5V0U2X,215:fontawesome-solid-external-link-alt:][2] combined TVS
protection diode for the VBUS pin and a set of clamping diodes that
will limit the voltage on D+ and D- pins to stay between GND and VBUS
levels to in order to protect the V3s USB driver from under /
over-voltages.
**D15** is a [NXP PRTR5V0U2X,215][2] combined TVS protection diode for
the VBUS pin and a set of clamping diodes that will limit the voltage
on D+ and D- pins to stay between GND and VBUS levels to in order to
protect the V3s USB driver from under / over-voltages.
[1]: https://github.com/FunKey-Project/FunKey-S-Hardware/blob/master/Datasheets/C40958_MICRO5P%E6%B2%89%E6%9D%BF%E5%BC%8F0.8%E5%9B%9B%E8%84%9A%E5%85%A8%E6%8F%92%E6%97%A0%E5%AF%BC%E4%BD%8D%E6%9C%89%E5%AD%94%E8%80%90%E9%AB%98%E6%B8%A9_2016-05-20.PDF
[2]: https://github.com/FunKey-Project/FunKey-S-Hardware/blob/master/Datasheets/C12333_PRTR5V0U2X%2C215_2017-10-31.PDF

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@ -10,17 +10,17 @@ your data.
## Download the latest FunKey-OS image file
Get the latest "***FunKey-rootfs-x.y.z.img***" SD card image file
directly from [here:fontawesome-solid-external-link-alt:][1] or from
the bottom of the latest release page in the "assets" section:
directly from [here][1] or from the bottom of the latest release page
in the "assets" section:
[https://github.com/FunKey-Project/FunKey-OS/releases/latest:fontawesome-solid-external-link-alt:][2]{target=_blank}
[https://github.com/FunKey-Project/FunKey-OS/releases/latest][2]{target=_blank}
![Github Release](/assets/images/github_sd_card_image.png){.lightbox}
## Flash the micro-SD card with balenaEtcher
- Download and install balenaEtcher for Windows/Mac OS/Linux from
[balena.io:fontawesome-solid-external-link-alt:][3]{:target="blank"}
[balena.io][3]{target=_blank}
- Run balenaEtcher and click on "Flash from file" to select the
FunKey-OS image file

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@ -4,13 +4,10 @@ Yes legally! Despite the general opinion, it is perfectly possible to
purchase and play famous ROMs legally such as Sonic, Castlevania,
Megaman and more, read the note below for more details.
**The FunKey Wiki** maintains
[lists:fontawesome-solid-external-link-alt:][1]{target=_blank} of
legal sources for ROMs, including [freeware
ROMs:fontawesome-solid-external-link-alt:][2]{target=_blank},
[commercial
ROMs:fontawesome-solid-external-link-alt:][3]{target=_blank}, and
[utilities:fontawesome-solid-external-link-alt:][4]{target=_blank}.
**The FunKey Wiki** maintains [lists][1]{target=_blank} of legal
sources for ROMs, including [freeware ROMs][2]{target=_blank},
[commercial ROMs][3]{target=_blank}, and
[utilities][4]{target=_blank}.
!!! note "Note about ROM emulation"
@ -29,7 +26,7 @@ ROMs:fontawesome-solid-external-link-alt:][3]{target=_blank}, and
retro-games online as ROMs.
For example, it is perfectly legal to purchase the SEGA Mega Drive
and Genesis Classics on [Steam][5]{:target="blank"} and play Sonic
and Genesis Classics on [Steam][5]{target=_blank} and play Sonic
on your **FunKey S**.
# Add ROMs to the FunKey S

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@ -8,11 +8,9 @@ does not require installation to be able to run them.
In the current (2.0.0) release of the FunKey-OS, the **OPK** files
are only available for the gmenu2x launcher, and not in RetroFE.
[7-Zip:fontawesome-solid-external-link-alt:][1] can be used to extract
**OPK** files, and [Open Package Creator
(v1.1.2):fontawesome-solid-external-link-alt:][2] is a useful tool if
you want to re-package an **OPK** or customize icons, add additional
games and much more.
[7-Zip][1] can be used to extract **OPK** files, and [Open Package
Creator (v1.1.2)][2] is a useful tool if you want to re-package an
**OPK** or customize icons, add additional games and much more.
Connect your **FunKey S** console to your computer and add **OPK**
files as simply as you would do it with a simple USB memory stick:

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@ -1,9 +1,8 @@
# Palette description
The default **FunKey S** Game Boy emulator:
_[gnuboy:fontawesome-solid-external-link-alt:][1]_ allows to set the
palette used for grayscale when running DMG (original mono Gameboy)
ROMs.
The default **FunKey S** Game Boy emulator: _[gnuboy][1]_ allows to
set the palette used for grayscale when running DMG (original mono
Gameboy) ROMs.
There are four variables for this purpose, allowing the background,
window, and both sprite palettes to be colored differently. Each one

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@ -2,10 +2,10 @@ A firmware upgrade can be performed simply over USB without opening
the **FunKey S** console.
Get the latest "**_FunKey-rootfs-x.y.z.fwu_**" firmware update file
directly from [here:fontawesome-solid-external-link-alt:][1] or from
the bottom of the latest release page in the "assets" section:
directly from [here][1] or from the bottom of the latest release page
in the "assets" section:
[https://github.com/FunKey-Project/FunKey-OS/releases/latest:fontawesome-solid-external-link-alt:][2]{target=_blank}
[https://github.com/FunKey-Project/FunKey-OS/releases/latest][2]{target=_blank}
![Github Release](/assets/images/Github_Release.png){.lightbox}