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Author	SHA1	Message	Date
kub	e8a462c058	32x, speed improvement	2020-07-04 14:49:27 +02:00
kub	2e88630a6a	sh2 drc: speed optimization and bugfixing	2020-07-04 14:49:27 +02:00
kub	242e81baca	sh2 drc: fix i386 regression	2020-07-04 14:49:27 +02:00
kub	ea96d35b89	sh2 drc: bug fixing and optimization in register cache and branch handling	2020-07-04 14:49:27 +02:00
kub	45bc81f286	sh2 drc: drc exit, block linking and branch handling revised (overlooked commit)	2020-07-04 14:49:27 +02:00
kub	675cad8ce7	sh2 drc: drc exit, block linking and branch handling revised	2020-07-04 14:49:27 +02:00
kub	072737b2fe	sh2 drc: improved RTS call stack cache	2020-07-04 14:49:27 +02:00
kub	5ae77d6e73	sh2 drc: rework of register cache to implement basic loop optmization	2020-07-04 14:49:27 +02:00
kub	97706c3ee0	various smallish optimizations, cleanups, and bug fixes	2020-07-04 14:49:27 +02:00
kub	f98ab2655d	cleanup and microoptimizations in SH2 hw handling	2020-07-04 14:49:27 +02:00
kub	69c6012a8f	some drawing code C optimisations	2020-07-04 14:49:27 +02:00
kub	05052e59c5	bug fix in comm poll fifo, and back to -O3	2020-07-04 14:49:27 +02:00
kub	173fc3f6de	pff... README, 2nd try	2020-07-04 14:49:27 +02:00
kub	6afb2662bd	configuration changes and README	2020-07-04 14:49:27 +02:00
kub	7abc11c714	cleanup config files, copyright stuff	2020-07-04 14:49:27 +02:00
kub	6a38d505d6	fix for mkoffsets without multiarch binutils	2020-07-04 14:49:26 +02:00
kub	e666ac97c4	various small fixes and optimsations	2020-07-04 14:49:26 +02:00
kub	57f76d2cb7	sh2 drc: add aarch64 backend for A64	2020-07-04 14:49:26 +02:00
kub	57f65578f4	sh2 drc: add mipsel backend for MIPS32 Release 1 (for JZ47xx)	2020-07-04 14:49:26 +02:00
kub	a34b8bed7e	SH2 drc: register cache overhaul (bugfixing, speed, readability)	2020-07-04 14:49:26 +02:00
kub	141566aa23	SH2 drc: bug fixing and small speed improvements	2020-07-04 14:49:26 +02:00
kub	9cb4ef1907	32X: memory access and polling bug fixes	2020-07-04 14:49:26 +02:00
kub	721f9c3385	sh2 drc, x86 code emitter: use x86-64 registers R8-R15	2020-07-04 14:49:26 +02:00
kub	e2015483a1	32x DMA memory copy performance optimisation	2020-07-04 14:49:26 +02:00
kub	862f2f2def	sh2 drc, change utils abi to pass sh2 PC in arg0 (reduces compiled code size)	2020-07-04 14:49:26 +02:00
kub	57f2c6a5c7	sh2 drc, keep T bit in host flags as long as possible	2020-07-04 14:49:26 +02:00
kub	1cf16a7c51	add xSR/RTS call stack cache to sh2 drc	2020-07-04 14:49:26 +02:00
kub	ad4aa3e9fa	polling detection: communication poll fifo to avoid comm data loss	2020-07-04 14:49:26 +02:00
kub	f08d47500b	sh2 memory access improvements, revive ARM asm memory functions	2020-07-04 14:49:26 +02:00
kub	79f45561fe	sh2 drc, register cache optimisations	2020-07-04 14:49:26 +02:00
kub	e9a3de1ed4	sh2 drc, block management bugfixes and cleanup	2020-07-04 14:49:26 +02:00
kub	835adf871d	sh2 drc, add detection for in-memory polling	2020-07-04 14:49:26 +02:00
kub	0b520c1014	sh2 drc, add loop detector, handle delay/idle loops	2020-07-04 14:49:26 +02:00
kub	a0bef37586	sh2 drc, code emitter cleanup, add ARM reorder stage to reduce interlock	2020-07-04 14:49:26 +02:00
kub	6caa1fa6e1	sh2 drc, make B/W read functions signed (reduces generated code size)	2020-07-04 14:49:26 +02:00
kub	74385d04c3	sh2 drc, improved constant handling and register allocator	2020-07-04 14:49:26 +02:00
kub	77569b214f	speed improvement and fixes for 32x ARM asm draw	2020-07-04 14:49:26 +02:00
kub	c77e3bf5e7	add literal pool to sh2 drc (for armv[456] without MOVT/W)	2020-07-04 14:49:26 +02:00
kub	87316e5941	sh2 drc, reuse blocks if already previously compiled (speedup for Virtua *)	2020-07-04 14:49:26 +02:00
kub	1f8cc9c081	various small improvements and fixes	2020-07-04 14:49:26 +02:00
kub	48fdcb0390	overhaul of translation cache and sh2 literals handling	2020-07-04 14:49:25 +02:00
kub	65072b8181	added branch cache to sh2 drc to improve cross-tcache jump speed	2020-07-04 14:49:25 +02:00
kub	5f166c638c	sh2 memory interface optimzations	2020-07-04 14:49:25 +02:00
kub	24f21f3b8a	overhaul of the register cache (improves generated code by some 10+%)	2020-07-04 14:49:25 +02:00
kub	2d133c17d6	debug stuff, bug fixing	2020-07-04 14:49:25 +02:00
kub	94eb72693c	move saving SH2 SR into memory access and do so only if needed	2020-07-04 14:49:25 +02:00
kub	38e9622eb6	add 32bit memory access functions for SH2	2020-07-04 14:49:25 +02:00
kub	4eb73cb54b	sh2 drc: sh2 addr modes generalization, more const propagation, code gen optimizations	2020-07-04 14:49:25 +02:00
kub	771d8aca0f	DRC: reworked scan_block (fix register usage masks, better block and literals detection)	2020-07-04 14:49:25 +02:00
kub	30e28fd63c	minor changes	2020-07-04 14:49:25 +02:00