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Added 8087 support

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This commit is contained in:
ceriel
1989-11-27 16:19:15 +00:00
parent c6d60cb24f
commit 61c646a496
4 changed files with 151 additions and 0 deletions
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3
mach/i86/as/mach1.c
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@@ -10,7 +10,10 @@
#define low6(z) (z & 077)
#define fit6(z) (low6(z) == z)
#define low3(z) (z & 07)
#define fit3(z) (low3(z) == z)
#define FESC 0xD8 /* escape for 8087 processor */
extern int mrg_1,mrg_2;
extern expr_t exp_1,exp_2;
#ifndef ASLD

10
mach/i86/as/mach2.c
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@@ -30,3 +30,13 @@
%token <y_word> XCHG
%token <y_word> TEST
%token <y_word> MOV
/* Intel 8087 coprocessor tokens */
%token <y_word> FNOOP
%token <y_word> FMEM
%token <y_word> FST_I
%token <y_word> FST_ST
%token <y_word> FST_ST2
%token <y_word> ST
%type <y_valu> st_i

114
mach/i86/as/mach3.c
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@@ -178,3 +178,117 @@
0, TEST, 1, "test",
0, MOV, 0, "movb",
0, MOV, 1, "mov",
/* Intel 8087 coprocessor keywords */
0, ST, 0, "st",
0, FNOOP, FESC+1+(0xF0<<8), "f2xm1",
0, FNOOP, FESC+1+(0xE1<<8), "fabs",
0, FNOOP, FESC+1+(0xE0<<8), "fchs",
0, FNOOP, FESC+3+(0xE2<<8), "fclex",
0, FNOOP, FESC+6+(0xD9<<8), "fcompp",
0, FNOOP, FESC+1+(0xF6<<8), "fdecstp",
0, FNOOP, FESC+3+(0xE1<<8), "fdisi",
0, FNOOP, FESC+3+(0xE0<<8), "feni",
0, FNOOP, FESC+1+(0xF7<<8), "fincstp",
0, FNOOP, FESC+3+(0xE3<<8), "finit",
0, FNOOP, FESC+1+(0xE8<<8), "fld1",
0, FNOOP, FESC+1+(0xEA<<8), "fldl2e",
0, FNOOP, FESC+1+(0xE9<<8), "fldl2t",
0, FNOOP, FESC+1+(0xEC<<8), "fldlg2",
0, FNOOP, FESC+1+(0xED<<8), "fldln2",
0, FNOOP, FESC+1+(0xEB<<8), "fldpi",
0, FNOOP, FESC+1+(0xEE<<8), "fldz",
0, FNOOP, FESC+1+(0xD0<<8), "fnop",
0, FNOOP, FESC+1+(0xF3<<8), "fpatan",
0, FNOOP, FESC+1+(0xF8<<8), "fprem",
0, FNOOP, FESC+1+(0xF2<<8), "fptan",
0, FNOOP, FESC+1+(0xFC<<8), "frndint",
0, FNOOP, FESC+1+(0xFD<<8), "fscale",
0, FNOOP, FESC+1+(0xFA<<8), "fsqrt",
/* 0, FNOOP, FESC+7+(0xE0<<8), "fstswax", /* 80287 */
0, FNOOP, FESC+1+(0xE4<<8), "ftst",
0, FNOOP, FESC+1+(0xE5<<8), "fxam",
0, FNOOP, FESC+1+(0xF4<<8), "fxtract",
0, FNOOP, FESC+1+(0xF1<<8), "fyl2x",
0, FNOOP, FESC+1+(0xF9<<8), "fyl2pi",
0, FMEM, FESC+6+(0<<11), "fiadds",
0, FMEM, FESC+2+(0<<11), "fiaddl",
0, FMEM, FESC+0+(0<<11), "fadds",
0, FMEM, FESC+4+(0<<11), "faddd",
0, FMEM, FESC+7+(4<<11), "fbld",
0, FMEM, FESC+7+(6<<11), "fbstp",
0, FMEM, FESC+6+(2<<11), "ficoms",
0, FMEM, FESC+2+(2<<11), "ficoml",
0, FMEM, FESC+0+(2<<11), "fcoms",
0, FMEM, FESC+4+(2<<11), "fcomd",
0, FMEM, FESC+6+(3<<11), "ficomps",
0, FMEM, FESC+2+(3<<11), "ficompl",
0, FMEM, FESC+0+(3<<11), "fcomps",
0, FMEM, FESC+4+(3<<11), "fcompd",
0, FMEM, FESC+6+(6<<11), "fidivs",
0, FMEM, FESC+2+(6<<11), "fidivl",
0, FMEM, FESC+0+(6<<11), "fdivs",
0, FMEM, FESC+4+(6<<11), "fdivd",
0, FMEM, FESC+6+(7<<11), "fidivrs",
0, FMEM, FESC+2+(7<<11), "fidivrl",
0, FMEM, FESC+0+(7<<11), "fdivrs",
0, FMEM, FESC+4+(7<<11), "fdivrd",
0, FMEM, FESC+7+(5<<11), "fildq",
0, FMEM, FESC+7+(0<<11), "filds",
0, FMEM, FESC+3+(0<<11), "fildl",
0, FMEM, FESC+1+(0<<11), "flds",
0, FMEM, FESC+5+(0<<11), "fldd",
0, FMEM, FESC+3+(5<<11), "fldx",
0, FMEM, FESC+1+(5<<11), "fldcw",
0, FMEM, FESC+1+(4<<11), "fldenv",
0, FMEM, FESC+6+(1<<11), "fimuls",
0, FMEM, FESC+2+(1<<11), "fimull",
0, FMEM, FESC+0+(1<<11), "fmuls",
0, FMEM, FESC+4+(1<<11), "fmuld",
0, FMEM, FESC+5+(4<<11), "frstor",
0, FMEM, FESC+5+(6<<11), "fsave",
0, FMEM, FESC+7+(2<<11), "fists",
0, FMEM, FESC+3+(2<<11), "fistl",
0, FMEM, FESC+1+(2<<11), "fsts",
0, FMEM, FESC+5+(2<<11), "fstd",
0, FMEM, FESC+7+(7<<11), "fistpq",
0, FMEM, FESC+7+(3<<11), "fistps",
0, FMEM, FESC+3+(3<<11), "fistpl",
0, FMEM, FESC+1+(3<<11), "fstps",
0, FMEM, FESC+5+(3<<11), "fstpd",
0, FMEM, FESC+3+(7<<11), "fstpx",
0, FMEM, FESC+1+(7<<11), "fstcw",
0, FMEM, FESC+1+(6<<11), "fstenv",
0, FMEM, FESC+5+(7<<11), "fstsw",
0, FMEM, FESC+6+(4<<11), "fisubs",
0, FMEM, FESC+2+(4<<11), "fisubl",
0, FMEM, FESC+0+(4<<11), "fsubs",
0, FMEM, FESC+4+(4<<11), "fsubd",
0, FMEM, FESC+6+(5<<11), "fisubrs",
0, FMEM, FESC+2+(5<<11), "fisubrl",
0, FMEM, FESC+0+(5<<11), "fsubrs",
0, FMEM, FESC+4+(5<<11), "fsubrd",
0, FST_I, FESC+1+(0xC0<<8), "fld",
0, FST_I, FESC+5+(0xD0<<8), "fst",
0, FST_I, FESC+5+(0xC8<<8), "fstp",
0, FST_I, FESC+1+(0xC8<<8), "fxch",
0, FST_I, FESC+0+(0xD0<<8), "fcom",
0, FST_I, FESC+0+(0xD8<<8), "fcomp",
0, FST_I, FESC+5+(0xC0<<8), "ffree",
0, FST_ST, FESC+0+(0xC0<<8), "fadd",
0, FST_ST, FESC+2+(0xC0<<8), "faddp",
0, FST_ST2, FESC+0+(0xF0<<8), "fdiv",
0, FST_ST2, FESC+2+(0xF0<<8), "fdivp",
0, FST_ST2, FESC+0+(0xF8<<8), "fdivr",
0, FST_ST2, FESC+2+(0xF8<<8), "fdivrp",
0, FST_ST, FESC+0+(0xC8<<8), "fmul",
0, FST_ST, FESC+2+(0xC8<<8), "fmulp",
0, FST_ST2, FESC+0+(0xE0<<8), "fsub",
0, FST_ST2, FESC+2+(0xE0<<8), "fsubp",
0, FST_ST2, FESC+0+(0xE8<<8), "fsubr",
0, FST_ST2, FESC+2+(0xE8<<8), "fsubrp",

24
mach/i86/as/mach4.c
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@@ -84,6 +84,30 @@ oper : NOOP_1
{ test($1);}
| MOV ea_ea
{ mov($1);}
/* Intel 8087 coprocessor instructions */
| FNOOP
{ emit1($1); emit1($1>>8);}
| FMEM mem
{ emit1($1); ea_2(($1>>8)&070);}
| FST_I st_i
{ emit1($1); emit1(($1>>8)|$2); }
| FST_I ST
{ emit1($1); emit1($1>>8); }
| FST_ST ST ',' st_i
{ emit1($1); emit1(($1>>8)|$4); }
| FST_ST st_i ',' ST
{ emit1($1|4); emit1((($1>>8)|$2)); }
| FST_ST2 st_i ',' ST
{ emit1($1|4); emit1((($1>>8)|$2)^010); }
;
st_i : ST '(' absexp ')'
{ if (!fit3($3)) {
serror("illegal index in FP stack");
}
$$ = $3;
}
;
mem : '(' expr ')'
{ mrg_2 = 6; exp_2 = $2;
RELOMOVE(rel_2, relonami);