o add custom chip for mmio

This commit is contained in:
David Voswinkel 2009-05-17 08:48:44 -07:00
parent c66828729f
commit 1075795ef4
12 changed files with 541 additions and 280 deletions

View File

@ -1,9 +1,9 @@
# SDK Config
PLATFORM=mac
PLATFORM=$(shell uname)
ifeq ($(PLATFORM),linux)
ifeq ($(PLATFORM),Linux)
# Linux Wine
SDK=/home/david/.wine/drive_c/65xx_FreeSDK
WINE=wine

View File

@ -29,10 +29,8 @@ void main(void) {
word crc01;
word crc02;
padStatus pad1;
char line_header[32] = "BANK CRC ADDR 123456789ABCDEF";
char line[32] = " ";
char test_buffer[] = "da";
unsigned long addr;
char line_header[32] = "OK";
char packet[4] = "TEST";
initInternalRegisters();
*(byte*) 0x2105 = 0x01; // MODE 1 value
@ -41,9 +39,14 @@ void main(void) {
*(byte*) 0x2100 = 0x0f; // enable background
enableDebugScreen();
writeln(line_header,0);
for (i=0;i<4;i++){
*(byte*) 0x3000=packet[i];
*(byte*) 0x700010=packet[i];
}
//writeln(line_header,1);
while(1){
while(!pad1.start) {
waitForVBlank();

View File

@ -3,7 +3,7 @@
<plist version="1.0">
<dict>
<key>currentDocument</key>
<string>tools/bsnes/memory/memory.cpp</string>
<string>tools/bsnes/ppu/bppu/bppu_mmio.cpp</string>
<key>documents</key>
<array>
<dict>
@ -18,7 +18,7 @@
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<key>metaData</key>
<dict>
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@ -105,6 +105,62 @@
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<key>snes/mmio/data.h</key>
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<key>tools/bsnes/cart/cart.cpp</key>
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@ -133,12 +189,40 @@
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<key>tools/bsnes/memory/memory.cpp</key>
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@ -203,10 +287,107 @@
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<key>columnSelection</key>
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<key>firstVisibleLine</key>
<integer>134</integer>
<key>selectFrom</key>
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<key>openDocuments</key>
<array>
<string>tools/bsnes/memory/memory.cpp</string>
<string>tools/bsnes/ppu/ppu.cpp</string>
<string>tools/bsnes/ppu/bppu/bppu.cpp</string>
<string>tools/bsnes/ppu/bppu/bppu_mmio.cpp</string>
<string>tools/bsnes/ppu/bppu/bppu.hpp</string>
<string>tools/bsnes/ppu/bppu/bppu_render_mode7.cpp</string>
<string>tools/bsnes/cc.sh</string>
<string>snes/mmio/main.c</string>
<string>snes/mmio/data.h</string>
<string>snes/mmio/debug.h</string>
<string>snes/mmio/debug.c</string>
<string>tools/bsnes/memory/memory.hpp</string>
</array>
<key>showFileHierarchyDrawer</key>
<false/>
@ -220,7 +401,7 @@
<true/>
<key>subItems</key>
<dict>
<key>scripts</key>
<key>snes</key>
<dict>
<key>isExpanded</key>
<true/>
@ -244,23 +425,7 @@
<key>isExpanded</key>
<true/>
<key>subItems</key>
<dict>
<key>ruby</key>
<dict>
<key>isExpanded</key>
<true/>
<key>subItems</key>
<dict>
<key>video</key>
<dict>
<key>isExpanded</key>
<true/>
<key>subItems</key>
<dict/>
</dict>
</dict>
</dict>
</dict>
<dict/>
</dict>
<key>memory</key>
<dict>
@ -269,6 +434,21 @@
<key>subItems</key>
<dict/>
</dict>
<key>ppu</key>
<dict>
<key>isExpanded</key>
<true/>
<key>subItems</key>
<dict>
<key>bppu</key>
<dict>
<key>isExpanded</key>
<true/>
<key>subItems</key>
<dict/>
</dict>
</dict>
</dict>
<key>ui_qt</key>
<dict>
<key>isExpanded</key>
@ -284,6 +464,6 @@
</dict>
</dict>
<key>windowFrame</key>
<string>{{0, 60}, {720, 818}}</string>
<string>{{0, 58}, {720, 820}}</string>
</dict>
</plist>

View File

@ -126,7 +126,7 @@ link += $(if $(findstring input.rawinput,$(ruby)),$(call mklib,xinput) $(call mk
objects = libco ruby libfilter string \
reader cart cheat \
memory smemory cpu scpu smp ssmp sdsp ppu bppu snes \
bsx srtc sdd1 spc7110 cx4 dsp1 dsp2 dsp3 dsp4 obc1 st010
bsx srtc sdd1 spc7110 cx4 dsp1 dsp2 dsp3 dsp4 obc1 st010 cmmio
ifeq ($(enable_gzip),true)
#objects += adler32 compress crc32 deflate gzio inffast inflate inftrees ioapi trees unzip zip zutil
@ -236,6 +236,8 @@ obj/dsp3.$(obj) : chip/dsp3/dsp3.cpp chip/dsp3/*
obj/dsp4.$(obj) : chip/dsp4/dsp4.cpp chip/dsp4/*
obj/obc1.$(obj) : chip/obc1/obc1.cpp chip/obc1/*
obj/st010.$(obj) : chip/st010/st010.cpp chip/st010/*
obj/cmmio.$(obj) : chip/cmmio/cmmio.cpp chip/cmmio/*
############
### zlib ###

View File

@ -9,3 +9,4 @@
#include "dsp4/dsp4.hpp"
#include "obc1/obc1.hpp"
#include "st010/st010.hpp"
#include "cmmio/cmmio.hpp"

View File

@ -0,0 +1,35 @@
#include <../base.hpp>
#include <../cart/cart.hpp>
#include "cmmio.hpp"
void CMMIO::init() {
}
void CMMIO::enable() {
memory::mmio.map(0x3000, *this);
memory::mmio.map(0x3001, *this);
memory::mmio.map(0x3002, *this);
memory::mmio.map(0x3004, *this);
}
void CMMIO::power() {
reset();
}
void CMMIO::reset() {
}
uint8 CMMIO::mmio_read(unsigned addr) {
addr &= 0xffff;
printf("CMMIO::mmio_read 0x%x",addr);
return cpu.regs.mdr;
}
void CMMIO::mmio_write(unsigned addr, uint8 data) {
addr &= 0xffff;
printf("CMMIO::mmio_write 0x%x 0x%x",addr,data);
}
CMMIO::CMMIO() {
}

View File

@ -0,0 +1,16 @@
class CMMIO : public MMIO {
public:
void init();
void enable();
void power();
void reset();
uint8 mmio_read (unsigned addr);
void mmio_write(unsigned addr, uint8 data);
CMMIO();
};
extern CMMIO cmmio;

View File

@ -483,6 +483,14 @@ void sCPU::mmio_write(unsigned addr, uint8 data) {
port_write(addr & 3, data);
return;
}
printf("sCPU::mmio_write 0x%x 0x%x",addr,data);
/*custom area*/
if((addr & 0xff00) == 0x3000) { //$3000-$30ff
printf("sCPU::mmio_write 0x%x 0x%x",addr,data);
return;
}
//DMA
if((addr & 0xff80) == 0x4300) { //$4300-$437f

View File

@ -14,12 +14,18 @@ namespace memory {
};
uint8 UnmappedMemory::read(unsigned) { return cpu.regs.mdr; }
void UnmappedMemory::write(unsigned, uint8) {}
void UnmappedMemory::write(unsigned addr, uint8 val) {
printf("UnmappedMemory::write 0x%x 0x%x\n",addr,val);
}
uint8 UnmappedMMIO::mmio_read(unsigned) { return cpu.regs.mdr; }
void UnmappedMMIO::mmio_write(unsigned, uint8) {}
void UnmappedMMIO::mmio_write(unsigned addr, uint8 val) {
printf("UnmappedMemory::write 0x%x 0x%x\n",addr,val);
}
void MMIOAccess::map(unsigned addr, MMIO &access) {
//printf("MMIOAccess::map 0x%x\n",addr);
//MMIO: $[00-3f]:[2000-5fff]
mmio[(addr - 0x2000) & 0x3fff] = &access;
}
@ -34,7 +40,8 @@ uint8 MMIOAccess::read(unsigned addr) {
}
void MMIOAccess::write(unsigned addr, uint8 data) {
//printf("MMIOAccess::write 0x%x %x\n",addr,data);
printf("MMIOAccess::write 0x%x %x\n",addr,data);
mmio[(addr - 0x2000) & 0x3fff]->mmio_write(addr, data);
}

View File

@ -12,6 +12,10 @@ void sBus::map_system() {
map(MapDirect, 0x00, 0x3f, 0x2000, 0x5fff, memory::mmio);
map(MapDirect, 0x80, 0xbf, 0x2000, 0x5fff, memory::mmio);
map(MapDirect, 0x80, 0xbf, 0x2000, 0x5fff, memory::mmio);
/* custom memmap */
map(MapDirect, 0x70, 0x7f, 0x0000, 0x01ff, memory::mmio);
map(MapLinear, 0x00, 0x3f, 0x0000, 0x1fff, memory::wram, 0x000000, 0x002000);
map(MapLinear, 0x80, 0xbf, 0x0000, 0x1fff, memory::wram, 0x000000, 0x002000);

View File

@ -1,254 +1,254 @@
class bPPU : public PPU {
public:
void enter();
void add_clocks(unsigned clocks);
uint8 region;
unsigned line;
enum { NTSC = 0, PAL = 1 };
enum { BG1 = 0, BG2 = 1, BG3 = 2, BG4 = 3, OAM = 4, BACK = 5, COL = 5 };
enum { SC_32x32 = 0, SC_64x32 = 1, SC_32x64 = 2, SC_64x64 = 3 };
class bPPU : public PPU {
public:
void enter();
void add_clocks(unsigned clocks);
uint8 region;
unsigned line;
enum { NTSC = 0, PAL = 1 };
enum { BG1 = 0, BG2 = 1, BG3 = 2, BG4 = 3, OAM = 4, BACK = 5, COL = 5 };
enum { SC_32x32 = 0, SC_64x32 = 1, SC_32x64 = 2, SC_64x64 = 3 };
struct {
bool interlace;
bool overscan;
} display;
bool overscan;
} display;
struct {
//open bus support
uint8 ppu1_mdr, ppu2_mdr;
//bg line counters
uint16 bg_y[4];
//$2100
bool display_disabled;
uint8 display_brightness;
//$2101
uint8 oam_basesize;
uint8 oam_nameselect;
uint16 oam_tdaddr;
//$2102-$2103
uint16 oam_baseaddr;
uint16 oam_addr;
bool oam_priority;
uint8 oam_firstsprite;
//$2104
uint8 oam_latchdata;
//$2105
bool bg_tilesize[4];
bool bg3_priority;
uint8 bg_mode;
//$2106
uint8 mosaic_size;
bool mosaic_enabled[4];
uint16 mosaic_countdown;
//$2107-$210a
uint16 bg_scaddr[4];
uint8 bg_scsize[4];
//$210b-$210c
uint16 bg_tdaddr[4];
//$210d-$2114
uint8 bg_ofslatch;
uint16 m7_hofs, m7_vofs;
uint16 bg_hofs[4];
uint16 bg_vofs[4];
//$2115
bool vram_incmode;
uint8 vram_mapping;
uint8 vram_incsize;
//$2116-$2117
uint16 vram_addr;
//$211a
uint8 mode7_repeat;
bool mode7_vflip;
bool mode7_hflip;
//$211b-$2120
uint8 m7_latch;
uint16 m7a, m7b, m7c, m7d, m7x, m7y;
//$2121
uint16 cgram_addr;
//$2122
uint8 cgram_latchdata;
//$2123-$2125
bool window1_enabled[6];
bool window1_invert [6];
bool window2_enabled[6];
bool window2_invert [6];
//$2126-$2129
uint8 window1_left, window1_right;
uint8 window2_left, window2_right;
//$212a-$212b
uint8 window_mask[6];
//$212c-$212d
bool bg_enabled[5], bgsub_enabled[5];
//$212e-$212f
bool window_enabled[5], sub_window_enabled[5];
//$2130
uint8 color_mask, colorsub_mask;
bool addsub_mode;
bool direct_color;
//$2131
bool color_mode, color_halve;
bool color_enabled[6];
//$2132
uint8 color_r, color_g, color_b;
uint16 color_rgb;
//$2133
//overscan and interlace are checked once per frame to
//determine if entire frame should be interlaced/non-interlace
//and overscan adjusted. therefore, the variables act sort of
//like a buffer, but they do still affect internal rendering
bool mode7_extbg;
bool pseudo_hires;
bool overscan;
uint16 scanlines;
bool oam_interlace;
bool interlace;
//$2137
uint16 hcounter, vcounter;
bool latch_hcounter, latch_vcounter;
bool counters_latched;
//$2139-$213a
uint16 vram_readbuffer;
//$213e
bool time_over, range_over;
uint16 oam_itemcount, oam_tilecount;
} regs;
struct {
//$2101
uint8 oam_basesize;
uint8 oam_nameselect;
uint16 oam_tdaddr;
//open bus support
uint8 ppu1_mdr, ppu2_mdr;
//bg line counters
uint16 bg_y[4];
//$2100
bool display_disabled;
uint8 display_brightness;
//$2101
uint8 oam_basesize;
uint8 oam_nameselect;
uint16 oam_tdaddr;
//$2102-$2103
uint16 oam_baseaddr;
uint16 oam_addr;
bool oam_priority;
uint8 oam_firstsprite;
//$2104
uint8 oam_latchdata;
//$2105
bool bg_tilesize[4];
bool bg3_priority;
uint8 bg_mode;
//$2106
uint8 mosaic_size;
bool mosaic_enabled[4];
uint16 mosaic_countdown;
//$2107-$210a
uint16 bg_scaddr[4];
uint8 bg_scsize[4];
//$210b-$210c
uint16 bg_tdaddr[4];
//$210d-$2114
uint8 bg_ofslatch;
uint16 m7_hofs, m7_vofs;
uint16 bg_hofs[4];
uint16 bg_vofs[4];
//$2115
bool vram_incmode;
uint8 vram_mapping;
uint8 vram_incsize;
//$2116-$2117
uint16 vram_addr;
//$211a
uint8 mode7_repeat;
bool mode7_vflip;
bool mode7_hflip;
//$211b-$2120
uint8 m7_latch;
uint16 m7a, m7b, m7c, m7d, m7x, m7y;
//$2121
uint16 cgram_addr;
//$2122
uint8 cgram_latchdata;
//$2123-$2125
bool window1_enabled[6];
bool window1_invert [6];
bool window2_enabled[6];
bool window2_invert [6];
//$2126-$2129
uint8 window1_left, window1_right;
uint8 window2_left, window2_right;
//$212a-$212b
uint8 window_mask[6];
//$212c-$212d
bool bg_enabled[5], bgsub_enabled[5];
//$212e-$212f
bool window_enabled[5], sub_window_enabled[5];
//$2130
uint8 color_mask, colorsub_mask;
bool addsub_mode;
bool direct_color;
//$2131
bool color_mode, color_halve;
bool color_enabled[6];
//$2132
uint8 color_r, color_g, color_b;
uint16 color_rgb;
//$2133
//overscan and interlace are checked once per frame to
//determine if entire frame should be interlaced/non-interlace
//and overscan adjusted. therefore, the variables act sort of
//like a buffer, but they do still affect internal rendering
bool mode7_extbg;
bool pseudo_hires;
bool overscan;
uint16 scanlines;
bool oam_interlace;
bool interlace;
//$2137
uint16 hcounter, vcounter;
bool latch_hcounter, latch_vcounter;
bool counters_latched;
//$2139-$213a
uint16 vram_readbuffer;
//$213e
bool time_over, range_over;
uint16 oam_itemcount, oam_tilecount;
} regs;
struct {
//$2101
uint8 oam_basesize;
uint8 oam_nameselect;
uint16 oam_tdaddr;
} cache;
alwaysinline bool interlace() const { return display.interlace; }
alwaysinline bool overscan() const { return display.overscan; }
alwaysinline bool hires() const { return (regs.pseudo_hires || regs.bg_mode == 5 || regs.bg_mode == 6); }
uint16 get_vram_address();
uint8 vram_mmio_read (uint16 addr);
void vram_mmio_write (uint16 addr, uint8 data);
uint8 oam_mmio_read (uint16 addr);
void oam_mmio_write (uint16 addr, uint8 data);
uint8 cgram_mmio_read (uint16 addr);
void cgram_mmio_write(uint16 addr, uint8 data);
void mmio_w2100(uint8 value); //INIDISP
void mmio_w2101(uint8 value); //OBSEL
void mmio_w2102(uint8 value); //OAMADDL
void mmio_w2103(uint8 value); //OAMADDH
void mmio_w2104(uint8 value); //OAMDATA
void mmio_w2105(uint8 value); //BGMODE
void mmio_w2106(uint8 value); //MOSAIC
void mmio_w2107(uint8 value); //BG1SC
void mmio_w2108(uint8 value); //BG2SC
void mmio_w2109(uint8 value); //BG3SC
void mmio_w210a(uint8 value); //BG4SC
void mmio_w210b(uint8 value); //BG12NBA
void mmio_w210c(uint8 value); //BG34NBA
void mmio_w210d(uint8 value); //BG1HOFS
void mmio_w210e(uint8 value); //BG1VOFS
void mmio_w210f(uint8 value); //BG2HOFS
void mmio_w2110(uint8 value); //BG2VOFS
void mmio_w2111(uint8 value); //BG3HOFS
void mmio_w2112(uint8 value); //BG3VOFS
void mmio_w2113(uint8 value); //BG4HOFS
void mmio_w2114(uint8 value); //BG4VOFS
void mmio_w2115(uint8 value); //VMAIN
void mmio_w2116(uint8 value); //VMADDL
void mmio_w2117(uint8 value); //VMADDH
void mmio_w2118(uint8 value); //VMDATAL
void mmio_w2119(uint8 value); //VMDATAH
void mmio_w211a(uint8 value); //M7SEL
void mmio_w211b(uint8 value); //M7A
void mmio_w211c(uint8 value); //M7B
void mmio_w211d(uint8 value); //M7C
void mmio_w211e(uint8 value); //M7D
void mmio_w211f(uint8 value); //M7X
void mmio_w2120(uint8 value); //M7Y
void mmio_w2121(uint8 value); //CGADD
void mmio_w2122(uint8 value); //CGDATA
void mmio_w2123(uint8 value); //W12SEL
void mmio_w2124(uint8 value); //W34SEL
void mmio_w2125(uint8 value); //WOBJSEL
void mmio_w2126(uint8 value); //WH0
void mmio_w2127(uint8 value); //WH1
void mmio_w2128(uint8 value); //WH2
void mmio_w2129(uint8 value); //WH3
void mmio_w212a(uint8 value); //WBGLOG
void mmio_w212b(uint8 value); //WOBJLOG
void mmio_w212c(uint8 value); //TM
void mmio_w212d(uint8 value); //TS
void mmio_w212e(uint8 value); //TMW
void mmio_w212f(uint8 value); //TSW
void mmio_w2130(uint8 value); //CGWSEL
void mmio_w2131(uint8 value); //CGADDSUB
void mmio_w2132(uint8 value); //COLDATA
void mmio_w2133(uint8 value); //SETINI
uint8 mmio_r2134(); //MPYL
uint8 mmio_r2135(); //MPYM
uint8 mmio_r2136(); //MPYH
uint8 mmio_r2137(); //SLHV
uint8 mmio_r2138(); //OAMDATAREAD
uint8 mmio_r2139(); //VMDATALREAD
uint8 mmio_r213a(); //VMDATAHREAD
uint8 mmio_r213b(); //CGDATAREAD
uint8 mmio_r213c(); //OPHCT
uint8 mmio_r213d(); //OPVCT
uint8 mmio_r213e(); //STAT77
uint8 mmio_r213f(); //STAT78
uint8 mmio_read(unsigned addr);
void mmio_write(unsigned addr, uint8 data);
void latch_counters();
//PPU render functions
#include "bppu_render.hpp"
uint16 light_table_b[16][32];
uint16 light_table_gr[16][32 * 32];
uint16 mosaic_table[16][4096];
void render_line();
void update_oam_status();
//required functions
void run();
void scanline();
void render_scanline();
void frame();
void power();
void reset();
bPPU();
~bPPU();
};
uint16 get_vram_address();
uint8 vram_mmio_read (uint16 addr);
void vram_mmio_write (uint16 addr, uint8 data);
uint8 oam_mmio_read (uint16 addr);
void oam_mmio_write (uint16 addr, uint8 data);
uint8 cgram_mmio_read (uint16 addr);
void cgram_mmio_write(uint16 addr, uint8 data);
void mmio_w2100(uint8 value); //INIDISP
void mmio_w2101(uint8 value); //OBSEL
void mmio_w2102(uint8 value); //OAMADDL
void mmio_w2103(uint8 value); //OAMADDH
void mmio_w2104(uint8 value); //OAMDATA
void mmio_w2105(uint8 value); //BGMODE
void mmio_w2106(uint8 value); //MOSAIC
void mmio_w2107(uint8 value); //BG1SC
void mmio_w2108(uint8 value); //BG2SC
void mmio_w2109(uint8 value); //BG3SC
void mmio_w210a(uint8 value); //BG4SC
void mmio_w210b(uint8 value); //BG12NBA
void mmio_w210c(uint8 value); //BG34NBA
void mmio_w210d(uint8 value); //BG1HOFS
void mmio_w210e(uint8 value); //BG1VOFS
void mmio_w210f(uint8 value); //BG2HOFS
void mmio_w2110(uint8 value); //BG2VOFS
void mmio_w2111(uint8 value); //BG3HOFS
void mmio_w2112(uint8 value); //BG3VOFS
void mmio_w2113(uint8 value); //BG4HOFS
void mmio_w2114(uint8 value); //BG4VOFS
void mmio_w2115(uint8 value); //VMAIN
void mmio_w2116(uint8 value); //VMADDL
void mmio_w2117(uint8 value); //VMADDH
void mmio_w2118(uint8 value); //VMDATAL
void mmio_w2119(uint8 value); //VMDATAH
void mmio_w211a(uint8 value); //M7SEL
void mmio_w211b(uint8 value); //M7A
void mmio_w211c(uint8 value); //M7B
void mmio_w211d(uint8 value); //M7C
void mmio_w211e(uint8 value); //M7D
void mmio_w211f(uint8 value); //M7X
void mmio_w2120(uint8 value); //M7Y
void mmio_w2121(uint8 value); //CGADD
void mmio_w2122(uint8 value); //CGDATA
void mmio_w2123(uint8 value); //W12SEL
void mmio_w2124(uint8 value); //W34SEL
void mmio_w2125(uint8 value); //WOBJSEL
void mmio_w2126(uint8 value); //WH0
void mmio_w2127(uint8 value); //WH1
void mmio_w2128(uint8 value); //WH2
void mmio_w2129(uint8 value); //WH3
void mmio_w212a(uint8 value); //WBGLOG
void mmio_w212b(uint8 value); //WOBJLOG
void mmio_w212c(uint8 value); //TM
void mmio_w212d(uint8 value); //TS
void mmio_w212e(uint8 value); //TMW
void mmio_w212f(uint8 value); //TSW
void mmio_w2130(uint8 value); //CGWSEL
void mmio_w2131(uint8 value); //CGADDSUB
void mmio_w2132(uint8 value); //COLDATA
void mmio_w2133(uint8 value); //SETINI
uint8 mmio_r2134(); //MPYL
uint8 mmio_r2135(); //MPYM
uint8 mmio_r2136(); //MPYH
uint8 mmio_r2137(); //SLHV
uint8 mmio_r2138(); //OAMDATAREAD
uint8 mmio_r2139(); //VMDATALREAD
uint8 mmio_r213a(); //VMDATAHREAD
uint8 mmio_r213b(); //CGDATAREAD
uint8 mmio_r213c(); //OPHCT
uint8 mmio_r213d(); //OPVCT
uint8 mmio_r213e(); //STAT77
uint8 mmio_r213f(); //STAT78
uint8 mmio_read(unsigned addr);
void mmio_write(unsigned addr, uint8 data);
void latch_counters();
//PPU render functions
#include "bppu_render.hpp"
uint16 light_table_b[16][32];
uint16 light_table_gr[16][32 * 32];
uint16 mosaic_table[16][4096];
void render_line();
void update_oam_status();
//required functions
void run();
void scanline();
void render_scanline();
void frame();
void power();
void reset();
bPPU();
~bPPU();
};

View File

@ -23,7 +23,7 @@ DSP3 dsp3;
DSP4 dsp4;
OBC1 obc1;
ST010 st010;
CMMIO cmmio;
#include "scheduler/scheduler.cpp"
#include "tracer/tracer.cpp"
@ -56,6 +56,7 @@ void SNES::init() {
video.init();
audio.init();
input.init();
cmmio.init();
snesinterface.init();
}
@ -94,6 +95,8 @@ void SNES::power() {
if(cartridge.has_dsp4()) dsp4.power();
if(cartridge.has_obc1()) obc1.power();
if(cartridge.has_st010()) st010.power();
cmmio.power();
for(unsigned i = 0x2100; i <= 0x213f; i++) memory::mmio.map(i, ppu);
for(unsigned i = 0x2140; i <= 0x217f; i++) memory::mmio.map(i, cpu);
@ -117,6 +120,8 @@ void SNES::power() {
if(cartridge.has_obc1()) obc1.enable();
if(cartridge.has_st010()) st010.enable();
cmmio.enable();
input.port_set_device(0, snes.config.controller_port1);
input.port_set_device(1, snes.config.controller_port2);
input.update();