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refactor testing code

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This commit is contained in:
David Voswinkel 2009-08-06 21:16:58 +02:00
parent decb810bcc
commit 1282e93334
5 changed files with 143 additions and 77 deletions
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2
avr/usbload/Makefile
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@ -33,7 +33,7 @@ ifeq ($(DEBUG),1)
OBJECTS = usbdrv/usbdrv.o usbdrv/usbdrvasm.o usbdrv/oddebug.o \
main.o usb_bulk.o uart.o fifo.o sram.o crc.o debug.o \
dump.o timer.o watchdog.o rle.c loader.o info.o shared_memory.o \
command.o
command.o testing.o
else
LDFLAGS = -Wl,-u
CFLAGS = -Iusbdrv -I. -DDEBUG_LEVEL=0 -DNO_DEBUG -DNO_INFO

4
avr/usbload/command.h
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@ -19,8 +19,8 @@
*/
#ifndef __CRC_H__
#define __CRC_H__
#ifndef __COMMAND_H__
#define __COMMAND_H__
void send_reset();
void send_irq();

77
avr/usbload/main.c
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@ -42,7 +42,10 @@
#include "watchdog.h"
#include "rle.h"
#include "loader.h"
#include "command.h"
#include "shared_memory.h"
#include "testing.h"
extern const char _rom[] PROGMEM;
@ -242,80 +245,6 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
* -------------------------------------------------------------------------
*/
void test_read_write()
{
uint8_t i;
uint32_t addr;
avr_bus_active();
addr = 0x000000;
i = 1;
while (addr++ <= 0x0000ff) {
sram_write(addr, i++);
}
addr = 0x000000;
while (addr++ <= 0x0000ff) {
info("read addr=0x%08lx %x\n", addr, sram_read(addr));
}
}
void test_bulk_read_write()
{
uint8_t i;
uint32_t addr;
avr_bus_active();
addr = 0x000000;
i = 0;
sram_bulk_write_start(addr);
while (addr++ <= 0x8000) {
sram_bulk_write(i++);
sram_bulk_write_next();
}
sram_bulk_write_end();
addr = 0x000000;
sram_bulk_read_start(addr);
while (addr <= 0x8000) {
info("addr=0x%08lx %x\n", addr, sram_bulk_read());
sram_bulk_read_next();
addr++;
}
sram_bulk_read_end();
}
void test_non_zero_memory(uint32_t bottom_addr, uint32_t top_addr)
{
uint32_t addr = 0;
uint8_t c;
sram_bulk_read_start(bottom_addr);
for (addr = bottom_addr; addr < top_addr; addr++) {
c = sram_bulk_read();
if (c != 0xff)
info("addr=0x%08lx c=0x%x\n", addr, c);
sram_bulk_read_next();
}
sram_bulk_read_end();
}
void test_crc()
{
info("test_crc: clear\n");
avr_bus_active();
sram_bulk_set(0x000000, 0x10000, 0xff);
info("test_crc: crc\n");
crc_check_bulk_memory(0x000000, 0x10000, 0x8000);
info("test_crc: check\n");
test_non_zero_memory(0x000000, 0x10000);
}
void usb_connect()
{

106
avr/usbload/testing.c Normal file
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@ -0,0 +1,106 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#include <stdlib.h>
#include <stdint.h>
#include <util/delay.h>
#include "shared_memory.h"
#include "config.h"
#include "sram.h"
#include "debug.h"
#include "crc.h"
#include "info.h"
void test_read_write()
{
uint8_t i;
uint32_t addr;
avr_bus_active();
addr = 0x000000;
i = 1;
while (addr++ <= 0x0000ff) {
sram_write(addr, i++);
}
addr = 0x000000;
while (addr++ <= 0x0000ff) {
info("read addr=0x%08lx %x\n", addr, sram_read(addr));
}
}
void test_bulk_read_write()
{
uint8_t i;
uint32_t addr;
avr_bus_active();
addr = 0x000000;
i = 0;
sram_bulk_write_start(addr);
while (addr++ <= 0x8000) {
sram_bulk_write(i++);
sram_bulk_write_next();
}
sram_bulk_write_end();
addr = 0x000000;
sram_bulk_read_start(addr);
while (addr <= 0x8000) {
info("addr=0x%08lx %x\n", addr, sram_bulk_read());
sram_bulk_read_next();
addr++;
}
sram_bulk_read_end();
}
void test_non_zero_memory(uint32_t bottom_addr, uint32_t top_addr)
{
uint32_t addr = 0;
uint8_t c;
sram_bulk_read_start(bottom_addr);
for (addr = bottom_addr; addr < top_addr; addr++) {
c = sram_bulk_read();
if (c != 0xff)
info("addr=0x%08lx c=0x%x\n", addr, c);
sram_bulk_read_next();
}
sram_bulk_read_end();
}
void test_crc()
{
info("test_crc: clear\n");
avr_bus_active();
sram_bulk_set(0x000000, 0x10000, 0xff);
info("test_crc: crc\n");
crc_check_bulk_memory(0x000000, 0x10000, 0x8000);
info("test_crc: check\n");
test_non_zero_memory(0x000000, 0x10000);
}

31
avr/usbload/testing.h Normal file
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@ -0,0 +1,31 @@
/*
* =====================================================================================
*
* ________ .__ __ ________ ____ ________
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
* \__> \/ \/ \/ \/ \/
*
* www.optixx.org
*
*
* Version: 1.0
* Created: 07/21/2009 03:32:16 PM
* Author: david@optixx.org
*
* =====================================================================================
*/
#ifndef __TESTING_H__
#define __TESTING_H__
void test_read_write();
void test_bulk_read_write();
void test_non_zero_memory(uint32_t bottom_addr, uint32_t top_addr);
void test_crc();
#endif