cleanup
This commit is contained in:
optixx
parent
ec555efafd
commit
2e59b07d7d
@ -1,77 +0,0 @@
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# SDK Config
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PLATFORM=$(shell uname)
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ifeq ($(PLATFORM),Linux)
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# Linux Wine
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SDK=/home/david/.wine/drive_c/65xx_FreeSDK
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WINE=wine
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EMU=../../tools/bsnes/bsnes
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DISASM=/home/david/Devel/arch/snes/devkit/bin/disasm
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UCON=ucon64
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else
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# Mac Wine
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SDK=/Users/david/.wine/drive_c/65xx_FreeSDK
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WINE=wine
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EMU=zsnes
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DISASM=/Users/david/Devel/arch/snes/devkit/bin/disasm
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UCON=ucon64
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endif
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CC=$(WINE) $(SDK)/bin/WDC816CC.exe
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AS=$(WINE) $(SDK)/bin/WDC816AS.exe
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LD=$(WINE) $(SDK)/bin/WDCLN.exe
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PADBIN=$(WINE) tools/padbin.exe
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# Project
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INC=$(SDK)/include
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LIBS=-L$(SDK)/lib/cc
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#-L$(SDK)/lib/c134
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OBJS=StartupSnes.obj main.obj pad.obj PPU.obj debug.obj ressource.obj
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APP=loadertest.smc
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GFX=debugfont
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all: $(APP)
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run:
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$(EMU) $(APP)
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disasm: $(APP)
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rm -rf $(APP)
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$(DISASM) $(APP) > $(APP).asm
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upload: header
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ucon64 --port=usb --xsnesram $(APP)
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repair: $(APP)
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$(UCON) -snes -chk $(APP) 2>&1 >/dev/null
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rm -rf *.bak
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header: $(APP)
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$(UCON) -smc $(APP)
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rm -rf *.bak
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StartupSnes.obj: StartupSnes.asm
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$(AS) -V $?
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ressource.obj: ressource.asm
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$(AS) -V $?
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%.obj: %.c
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$(CC) -wl -wp -sop -MC -I $(INC) $?
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$(APP): $(OBJS)
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$(LD) -B -HB -M21 -V -T -Pff \
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-C008000,0000 -U0000,0000 \
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-Avectors=FFE4,7FE4 \
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-Aregistration_data=FFB0,7FB0 \
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-Aressource=18000,8000 \
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-N $(OBJS) $(LIBS) -O $@
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$(PADBIN) 0x20000 $(APP)
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clean:
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rm -vf $(APP) *.obj *.TMP
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@ -1,90 +0,0 @@
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#include "data.h"
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byte tileMapLocation[4];
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word characterLocation[4];
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void waitForVBlank(void)
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{
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byte Status;
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do {
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Status = *(byte *) 0x4210;
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} while (!(Status & 0x80));
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}
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void setTileMapLocation(word vramDst, byte screenProp, byte bgNumber)
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{
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tileMapLocation[bgNumber] = ((vramDst >> 8) & 0xfc) | (screenProp & 0x03);
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*(byte *) (0x2107 + bgNumber) = tileMapLocation[bgNumber];
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}
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void restoreTileMapLocation(byte bgNumber)
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{
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*(byte *) (0x2107 + bgNumber) = tileMapLocation[bgNumber];
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}
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void setCharacterLocation(word vramDst, byte bgNumber)
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{
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characterLocation[bgNumber] = vramDst;
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if (bgNumber < 2) {
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*(byte *) 0x210b =
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(characterLocation[1] >> 8 & 0xf0) + (characterLocation[0] >> 12);
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} else {
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*(byte *) 0x210c =
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(characterLocation[3] >> 8 & 0xf0) + (characterLocation[2] >> 12);
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}
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}
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void restoreCharacterLocation(byte bgNumber)
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{
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setCharacterLocation(characterLocation[bgNumber], bgNumber);
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}
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void VRAMByteWrite(byte value, word vramDst)
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{
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*(byte *) 0x2115 = 0x80;
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*(word *) 0x2116 = vramDst;
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*(byte *) 0x2118 = value;
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}
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void VRAMLoad(word src, word vramDst, word size)
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{
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// set address in VRam for read or write ($2116) + block size transfer ($2115)
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*(byte *) 0x2115 = 0x80;
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*(word *) 0x2116 = vramDst;
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*(word *) 0x4300 = 0x1801; // set DMA control register (1 word inc)
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// and destination ($21xx xx -> 0x18)
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*(word *) 0x4302 = src; // DMA channel x source address offset
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// (low $4302 and high $4303 optimisation)
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*(byte *) 0x4304 = 0x01; // DMA channel x source address bank
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*(word *) 0x4305 = size; // DMA channel x transfer size
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// (low $4305 and high $4306 optimisation)
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// Turn on DMA transfer for this channel
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waitForVBlank();
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*(byte *) 0x2100 = 0x80;
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*(byte *) 0x420b = 0x01;
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*(byte *) 0x2100 = 0x00;
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}
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void CGRAMLoad(word src, byte cgramDst, word size)
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{
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// set address in VRam for read or write + block size
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*(byte *) 0x2121 = cgramDst;
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*(word *) 0x4300 = 0x2200; // set DMA control register (1 byte inc)
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// and destination ($21xx xx -> 022)
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*(word *) 0x4302 = src; // DMA channel x source address offset
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// (low $4302 and high $4303 optimisation)
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*(byte *) 0x4304 = 0x01; // DMA channel x source address bank
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*(word *) 0x4305 = size; // DMA channel x transfer size
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// (low $4305 and high $4306 optimisation)
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// Turn on DMA transfer for this channel
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waitForVBlank();
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*(byte *) 0x2100 = 0x80;
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*(byte *) 0x420b = 0x01;
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*(byte *) 0x2100 = 0x00;
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}
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@ -1,11 +0,0 @@
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extern byte tileMapLocation[4];
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extern word characterLocation[4];
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void waitForVBlank(void);
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void setTileMapLocation(word vramDst, byte screenProp, byte bgNumber);
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void restoreTileMapLocation(byte bgNumber);
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void setCharacterLocation(word vramDst, byte bgNumber);
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void restoreCharacterLocation(byte bgNumber);
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void VRAMByteWrite(byte value, word vramDst);
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void VRAMLoad(word src, word vramDst, word size);
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void CGRAMLoad(word src, byte cgramDst, word size);
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@ -1,240 +0,0 @@
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; SNES ROM startup code
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;******************************************************************************
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;*** Define a special section in case most of the code is not in bank 0. ***
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;******************************************************************************
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;STACK EQU $01ff ;CHANGE THIS FOR YOUR SYSTEM
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;STARTUP SECTION OFFSET $008000
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CODE
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XDEF START
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START:
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XREF _~main
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sei ; Disabled interrupts
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clc ; clear carry to switch to native mode
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xce ; Xchange carry & emulation bit. native mode
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rep #$18 ; Binary mode (decimal mode off), X/Y 16 bit
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LONGI ON
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ldx #$1FFF ; set stack to $1FFF
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txs
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rep #$30
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longa on
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longi on
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; Init data used for heap
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; see heap definition below
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XREF _~_heap_top
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XREF _~_mem_start
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stz _~_heap_top
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stz _~_mem_start
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XREF _~preInit
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jsr >_~preInit
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sep #$30 ; X,Y,A are 8 bit numbers
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LONGA OFF
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LONGI OFF
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lda #$8F ; screen off, full brightness
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sta $2100 ; brightness + screen enable register
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stz $2101 ; Sprite register (size + address in VRAM)
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stz $2102 ; Sprite registers (address of sprite memory [OAM])
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stz $2103 ; "" ""
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stz $2105 ; Mode 0, = Graphic mode register
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stz $2106 ; noplanes, no mosaic, = Mosaic register
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stz $2107 ; Plane 0 map VRAM location
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stz $2108 ; Plane 1 map VRAM location
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stz $2109 ; Plane 2 map VRAM location
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stz $210A ; Plane 3 map VRAM location
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stz $210B ; Plane 0+1 Tile data location
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stz $210C ; Plane 2+3 Tile data location
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stz $210D ; Plane 0 scroll x (first 8 bits)
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stz $210D ; Plane 0 scroll x (last 3 bits) #$0 - #$07ff
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stz $210E ; Plane 0 scroll y (first 8 bits)
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stz $210E ; Plane 0 scroll y (last 3 bits) #$0 - #$07ff
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stz $210F ; Plane 1 scroll x (first 8 bits)
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stz $210F ; Plane 1 scroll x (last 3 bits) #$0 - #$07ff
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stz $2110 ; Plane 1 scroll y (first 8 bits)
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stz $2110 ; Plane 1 scroll y (last 3 bits) #$0 - #$07ff
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stz $2111 ; Plane 2 scroll x (first 8 bits)
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stz $2111 ; Plane 2 scroll x (last 3 bits) #$0 - #$07ff
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stz $2112 ; Plane 2 scroll y (first 8 bits)
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stz $2112 ; Plane 2 scroll y (last 3 bits) #$0 - #$07ff
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stz $2113 ; Plane 3 scroll x (first 8 bits)
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stz $2113 ; Plane 3 scroll x (last 3 bits) #$0 - #$07ff
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stz $2114 ; Plane 3 scroll y (first 8 bits)
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stz $2114 ; Plane 3 scroll y (last 3 bits) #$0 - #$07ff
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lda #$80 ; increase VRAM address after writing to $2119
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sta $2115 ; VRAM address increment register
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stz $2116 ; VRAM address low
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stz $2117 ; VRAM address high
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stz $211A ; Initial Mode 7 setting register
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stz $211B ; Mode 7 matrix parameter A register (low)
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lda #$01
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sta $211B ; Mode 7 matrix parameter A register (high)
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stz $211C ; Mode 7 matrix parameter B register (low)
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stz $211C ; Mode 7 matrix parameter B register (high)
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stz $211D ; Mode 7 matrix parameter C register (low)
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stz $211D ; Mode 7 matrix parameter C register (high)
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stz $211E ; Mode 7 matrix parameter D register (low)
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sta $211E ; Mode 7 matrix parameter D register (high)
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stz $211F ; Mode 7 center position X register (low)
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stz $211F ; Mode 7 center position X register (high)
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stz $2120 ; Mode 7 center position Y register (low)
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stz $2120 ; Mode 7 center position Y register (high)
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stz $2121 ; Color number register ($0-ff)
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stz $2123 ; BG1 & BG2 Window mask setting register
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stz $2124 ; BG3 & BG4 Window mask setting register
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stz $2125 ; OBJ & Color Window mask setting register
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stz $2126 ; Window 1 left position register
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stz $2127 ; Window 2 left position register
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stz $2128 ; Window 3 left position register
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stz $2129 ; Window 4 left position register
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stz $212A ; BG1, BG2, BG3, BG4 Window Logic register
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stz $212B ; OBJ, Color Window Logic Register (or,and,xor,xnor)
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sta $212C ; Main Screen designation (planes, sprites enable)
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stz $212D ; Sub Screen designation
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stz $212E ; Window mask for Main Screen
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stz $212F ; Window mask for Sub Screen
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lda #$30
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sta $2130 ; Color addition & screen addition init setting
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stz $2131 ; Add/Sub sub designation for screen, sprite, color
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lda #$E0
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sta $2132 ; color data for addition/subtraction
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stz $2133 ; Screen setting (interlace x,y/enable SFX data)
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stz $4200 ; Enable V-blank, interrupt, Joypad register
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lda #$FF
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sta $4201 ; Programmable I/O port
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stz $4202 ; Multiplicand A
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stz $4203 ; Multiplier B
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stz $4204 ; Multiplier C
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stz $4205 ; Multiplicand C
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stz $4206 ; Divisor B
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stz $4207 ; Horizontal Count Timer
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stz $4208 ; Horizontal Count Timer MSB (most significant bit)
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stz $4209 ; Vertical Count Timer
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stz $420A ; Vertical Count Timer MSB
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stz $420B ; General DMA enable (bits 0-7)
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stz $420C ; Horizontal DMA (HDMA) enable (bits 0-7)
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stz $420D ; Access cycle designation (slow/fast rom)
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cli ; Enable interrupts
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rep #$30
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longa on
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longi on
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jsr >_~main
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brk
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XDEF IRQ
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IRQ:
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XREF _~IRQHandler
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LONGA ON
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LONGI ON
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rep #$30
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pha
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phx
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phy
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jsr _~IRQHandler
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ply
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plx
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pla
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rti
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XDEF NMI
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NMI:
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XREF _~NMIHandler
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LONGA ON
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LONGI ON
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rep #$30
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pha
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phx
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phy
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phd
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phb
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lda #$0000
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sep #$30 ; X,Y,A are 8 bit numbers
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LONGA OFF
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LONGI OFF
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lda $4210 ; Read NMI
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LONGA ON
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LONGI ON
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rep #$30
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jsr _~NMIHandler
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plb
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pld
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ply
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plx
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pla
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rti
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DIRQ:
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rti
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ENDS
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;******************************************************************************
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;*** Heap definition ***
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;******************************************************************************
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DATA
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XDEF _~heap_start
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XDEF _~heap_end
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_~heap_start:
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WORD $1000
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_~heap_end:
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WORD $1200
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;******************************************************************************
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;*** SNES ROM Registartion Data ***
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;******************************************************************************
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REGISTRATION_DATA SECTION
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MAKER_CODE FCC /FF/
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GAME_CODE FCC /SMWJ/
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FIXED_VALUE0 BYTE $00, $00, $00, $00, $00, $00, $00
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EXPANSION_RAM_SIZE BYTE $00
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SPECIAL_VERSION BYTE $00
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CARTRIDGE_TYPE_SUB BYTE $00
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GAME_TITLE FCC /GAME TITLE !/
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;012345678901234567890;
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MAP_MODE BYTE $20
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CARTRIDGE_SIZE BYTE $00
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ROM_SIZE BYTE $09
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RAM_SIZE BYTE $00
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DESTINATION_CODE BYTE $00
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FIXED_VALUE1 BYTE $33
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MASK_ROM_VERSION BYTE $00
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COMPLEMENT_CHECK BYTE $00, $00
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CHEKSUM BYTE $00, $00
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;******************************************************************************
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;*** SNES Interrupts and Reset vector ***
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;******************************************************************************
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VECTORS SECTION
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; Native vector
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N_COP DW DIRQ
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N_BRK DW DIRQ
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N_ABORT DW DIRQ
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N_NMI DW NMI
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N_RSRVD DW DIRQ
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N_IRQ DW IRQ
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DS 4
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; Emulation vector
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E_COP DW DIRQ
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E_RSRVD DW DIRQ
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E_ABORT DW DIRQ
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E_NMI DW DIRQ
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E_RESET DW START
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E_IRQ DW DIRQ
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END
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@ -1,37 +0,0 @@
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#include "data.h"
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word crc_update(char far * data, word size)
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{
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word i;
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word j;
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word crc = 0;
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for (j = 0; j < size; j++) {
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crc = crc ^ ((word) data[j] << 8);
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for (i = 0; i < 8; i++) {
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if (crc & 0x8000)
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crc = (crc << 1) ^ 0x1021;
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else
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crc <<= 1;
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}
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}
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return crc;
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}
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word crc_update_mem(unsigned long addr, word size)
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{
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word i;
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||||
word j;
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word crc = 0;
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||||
for (j = 0; j < size; j++) {
|
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crc = crc ^ ((word) * (byte *) (addr + j) << 8);
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for (i = 0; i < 8; i++) {
|
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if (crc & 0x8000)
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crc = (crc << 1) ^ 0x1021;
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else
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crc <<= 1;
|
||||
}
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}
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return crc;
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||||
}
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@ -1,3 +0,0 @@
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word crc_update(byte * data, word size);
|
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word crc_update_mem(unsigned long, word size);
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||||
@ -1,8 +0,0 @@
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||||
#ifndef _DATA
|
||||
|
||||
typedef unsigned char byte;
|
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typedef unsigned short word;
|
||||
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||||
#define _DATA
|
||||
#endif
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@ -1,224 +0,0 @@
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#include <string.h>
|
||||
#include <stdarg.h>
|
||||
#include <stdio.h>
|
||||
#include <fcntl.h>
|
||||
|
||||
#include "debug.h"
|
||||
#include "data.h"
|
||||
#include "pad.h"
|
||||
#include "PPU.h"
|
||||
#include "ressource.h"
|
||||
|
||||
|
||||
|
||||
#define DEBUG_BUFFER_SIZE 128
|
||||
|
||||
word debugMap[0x400];
|
||||
char debug_buffer[DEBUG_BUFFER_SIZE];
|
||||
char screen_buffer[DEBUG_BUFFER_SIZE];
|
||||
|
||||
|
||||
void debug_init(void)
|
||||
{
|
||||
word i;
|
||||
for (i = 0; i < 0x400; i++) {
|
||||
debugMap[i] = 0x00;
|
||||
}
|
||||
memset(debug_buffer, 0, DEBUG_BUFFER_SIZE);
|
||||
memset(screen_buffer, 0,DEBUG_BUFFER_SIZE);
|
||||
}
|
||||
|
||||
|
||||
void debug_enable(void)
|
||||
{
|
||||
VRAMLoad((word) debugFont_pic, 0x5000, 2048);
|
||||
VRAMLoad((word) debugMap, 0x4000, 0x0800);
|
||||
setTileMapLocation(0x4000, (byte) 0x00, (byte) 0);
|
||||
setCharacterLocation(0x5000, (byte) 0);
|
||||
*(byte *) 0x2100 = 0x0f; // enable background
|
||||
|
||||
// Font Color
|
||||
// hex(24 << 10 | 24 << 5 | 24 ) = '0x6318'
|
||||
*(byte *) 0x2121 = 0x02;
|
||||
*(byte *) 0x2122 = 0xff;
|
||||
*(byte *) 0x2122 = 0x7f;
|
||||
|
||||
// Font Border Color
|
||||
*(byte *) 0x2121 = 0x00;
|
||||
*(byte *) 0x2122 = 0x00;
|
||||
*(byte *) 0x2122 = 0x00;
|
||||
|
||||
// Background Color
|
||||
*(byte *) 0x2121 = 0x01;
|
||||
*(byte *) 0x2122 = 0x05;
|
||||
*(byte *) 0x2122 = 0x29;
|
||||
|
||||
|
||||
}
|
||||
|
||||
void clears(void)
|
||||
{
|
||||
word i, y;
|
||||
for (y = 0; y < 20; y++) {
|
||||
waitForVBlank();
|
||||
for (i = 0; i < 32; i++) {
|
||||
*(byte *) 0x2115 = 0x80;
|
||||
*(word *) 0x2116 = 0x4000 + i + (y * 0x20);
|
||||
*(byte *) 0x2118 = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void _print_char(word y, word x, char c)
|
||||
{
|
||||
waitForVBlank();
|
||||
VRAMByteWrite((byte) (c - 32), (word) (0x4000 + x + (y * 0x20)));
|
||||
}
|
||||
|
||||
void _print_screen(word y, char *buffer)
|
||||
{
|
||||
char l;
|
||||
unsigned int x;
|
||||
x = y * 0x20;
|
||||
l = strlen(buffer);
|
||||
waitForVBlank();
|
||||
while (*buffer) {
|
||||
if (*buffer == '\n') {
|
||||
while (x++ < 32) {
|
||||
*(byte *) 0x2115 = 0x80;
|
||||
*(word *) 0x2116 = 0x4000 + x + (y * 0x20);
|
||||
*(byte *) 0x2118 = 0;
|
||||
}
|
||||
x = 0;
|
||||
y += 0x20;
|
||||
buffer++;
|
||||
waitForVBlank();
|
||||
continue;
|
||||
}
|
||||
*(byte *) 0x2115 = 0x80;
|
||||
*(word *) 0x2116 = 0x4000 + x;
|
||||
*(byte *) 0x2118 = *buffer - 32;
|
||||
x++;
|
||||
buffer++;
|
||||
#if 1
|
||||
waitForVBlank();
|
||||
#endif
|
||||
}
|
||||
}
|
||||
void _print_console(const char *buffer)
|
||||
{
|
||||
while (*buffer)
|
||||
*(byte *) 0x3000 = *buffer++;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
void printfc(const char *fmt, ...)
|
||||
{
|
||||
va_list ap;
|
||||
va_start(ap, fmt);
|
||||
vsprintf(debug_buffer, fmt, ap);
|
||||
va_end(ap);
|
||||
_print_console(debug_buffer);
|
||||
//memset(debug_buffer,0,DEBUG_BUFFER_SIZE);
|
||||
|
||||
}
|
||||
|
||||
void printfs(word y, const char *fmt, ...)
|
||||
{
|
||||
va_list ap;
|
||||
va_start(ap, fmt);
|
||||
vsprintf(screen_buffer, fmt, ap);
|
||||
va_end(ap);
|
||||
_print_screen(y, screen_buffer);
|
||||
//memset(screen_buffer, 0, DEBUG_BUFFER_SIZE);
|
||||
}
|
||||
|
||||
void printc_packet(unsigned long addr, unsigned int len, byte * packet)
|
||||
{
|
||||
unsigned int i, j;
|
||||
unsigned int sum = 0;
|
||||
unsigned int last_sum = 0;
|
||||
unsigned int clear = 0;
|
||||
|
||||
for (i = 0; i < len; i += 16) {
|
||||
|
||||
sum = 0;
|
||||
for (j = 0; j < 16; j++) {
|
||||
sum += packet[i + j];
|
||||
}
|
||||
if (!sum) {
|
||||
clear = 1;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (last_sum == sum) {
|
||||
clear = 1;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (clear) {
|
||||
printfc("*\n");
|
||||
clear = 0;
|
||||
}
|
||||
printfc("%06lX:", addr + i);
|
||||
for (j = 0; j < 16; j++) {
|
||||
printfc(" %02x", packet[i + j]);
|
||||
}
|
||||
printfc(" |");
|
||||
for (j = 0; j < 16; j++) {
|
||||
if (packet[i + j] >= 33 && packet[i + j] <= 126)
|
||||
printfc("%c", packet[i + j]);
|
||||
else
|
||||
printfc(".");
|
||||
}
|
||||
printfc("|\n");
|
||||
last_sum = sum;
|
||||
}
|
||||
}
|
||||
/*
|
||||
* keep the linker happy
|
||||
*/
|
||||
int open(const char *_name, int _mode)
|
||||
{
|
||||
_print_console("open called\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
int close(int fd)
|
||||
{
|
||||
_print_console("close called\n");
|
||||
return -1;
|
||||
|
||||
}
|
||||
|
||||
size_t read(int fd, void *buff, size_t len)
|
||||
{
|
||||
_print_console("read called\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
size_t write(int fd, void *buffer, size_t len)
|
||||
{
|
||||
_print_console("write called\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
long lseek(int fd, long off, int count)
|
||||
{
|
||||
_print_console("lseek called\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
int unlink(const char *name)
|
||||
{
|
||||
_print_console("unlink called\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
int isatty()
|
||||
{
|
||||
_print_console("isatty called\n");
|
||||
return 1;
|
||||
}
|
||||
@ -1,8 +0,0 @@
|
||||
#include "data.h"
|
||||
|
||||
void debug_init(void);
|
||||
void debug_enable(void);
|
||||
void printfs(word y, const char *fmt, ...);
|
||||
void printfc(const char *fmt, ...);
|
||||
void clears(void);
|
||||
void printc_packet(unsigned long addr, unsigned int len, byte * packet);
|
||||
@ -1,106 +0,0 @@
|
||||
#include <stdlib.h>
|
||||
|
||||
#include "data.h";
|
||||
#include "event.h";
|
||||
|
||||
event *events;
|
||||
|
||||
void initEvents(void)
|
||||
{
|
||||
events = NULL;
|
||||
}
|
||||
|
||||
event *createEvent(char (*callback) (word counter))
|
||||
{
|
||||
event *myEvent;
|
||||
|
||||
myEvent = (event *) malloc(sizeof(event));
|
||||
|
||||
myEvent->VBlankCount = 0;
|
||||
myEvent->callback = callback;
|
||||
myEvent->nextEvent = NULL;
|
||||
myEvent->previousEvent = NULL;
|
||||
|
||||
|
||||
return myEvent;
|
||||
}
|
||||
|
||||
event *addEvent(char (*callback) (word counter), int noDuplicateCallback)
|
||||
{
|
||||
|
||||
event *lastEvent;
|
||||
event *myEvent;
|
||||
|
||||
if (events == NULL) {
|
||||
events = createEvent(callback);
|
||||
return events;
|
||||
} else {
|
||||
lastEvent = events;
|
||||
// TODO optimise this with noduplicate
|
||||
while (lastEvent->nextEvent != NULL) {
|
||||
if (noDuplicateCallback == 1 && lastEvent->callback == *callback) {
|
||||
return NULL;
|
||||
}
|
||||
lastEvent = lastEvent->nextEvent;
|
||||
}
|
||||
if (noDuplicateCallback == 1 && lastEvent->callback == *callback) {
|
||||
return NULL;
|
||||
}
|
||||
myEvent = createEvent(callback);
|
||||
myEvent->previousEvent = lastEvent;
|
||||
lastEvent->nextEvent = myEvent;
|
||||
return myEvent;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
void removeEvent(event * eventElement)
|
||||
{
|
||||
|
||||
byte alone = 0;
|
||||
event *next, *previous;
|
||||
|
||||
next = eventElement->nextEvent;
|
||||
previous = eventElement->previousEvent;
|
||||
|
||||
if (eventElement->nextEvent != NULL && eventElement->previousEvent != NULL) {
|
||||
alone++;
|
||||
next->previousEvent = previous;
|
||||
previous->nextEvent = next;
|
||||
|
||||
} else if (eventElement->nextEvent != NULL) {
|
||||
alone++;
|
||||
next->previousEvent = NULL;
|
||||
events = next;
|
||||
|
||||
} else if (eventElement->previousEvent != NULL) {
|
||||
alone++;
|
||||
previous->nextEvent = NULL;
|
||||
}
|
||||
|
||||
free(eventElement);
|
||||
|
||||
if (alone == 0) {
|
||||
events = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
void processEvents(void)
|
||||
{
|
||||
|
||||
event *currentEvent;
|
||||
char returnValue;
|
||||
|
||||
currentEvent = events;
|
||||
while (currentEvent != NULL) {
|
||||
returnValue = currentEvent->callback(currentEvent->VBlankCount);
|
||||
if (returnValue == EVENT_CONTINUE) {
|
||||
currentEvent->VBlankCount++;
|
||||
} else {
|
||||
removeEvent(currentEvent);
|
||||
}
|
||||
currentEvent = currentEvent->nextEvent;
|
||||
}
|
||||
|
||||
}
|
||||
@ -1,17 +0,0 @@
|
||||
typedef struct event {
|
||||
word VBlankCount;
|
||||
char (*callback) (word counter);
|
||||
struct event *previousEvent;
|
||||
struct event *nextEvent;
|
||||
} event;
|
||||
|
||||
#define EVENT_STOP 0
|
||||
#define EVENT_CONTINUE 1
|
||||
|
||||
extern event *events;
|
||||
|
||||
void initEvents(void);
|
||||
extern event *addEvent(char (*callback) (word counter),
|
||||
int noDuplicateCallback);
|
||||
extern void removeEvent(event * eventElement);
|
||||
extern void processEvents(void);
|
||||
@ -1,48 +0,0 @@
|
||||
/*-------------------------------------------*/
|
||||
/*
|
||||
* Integer type definitions for FatFs module
|
||||
*/
|
||||
/*-------------------------------------------*/
|
||||
|
||||
#ifndef _INTEGER
|
||||
|
||||
|
||||
/*
|
||||
* These types must be 16-bit, 32-bit or larger integer
|
||||
*/
|
||||
typedef int INT;
|
||||
typedef unsigned int UINT;
|
||||
|
||||
/*
|
||||
* These types must be 8-bit integer
|
||||
*/
|
||||
typedef signed char CHAR;
|
||||
typedef unsigned char UCHAR;
|
||||
typedef unsigned char BYTE;
|
||||
|
||||
/*
|
||||
* These types must be 16-bit integer
|
||||
*/
|
||||
typedef short SHORT;
|
||||
typedef unsigned short USHORT;
|
||||
typedef unsigned short WORD;
|
||||
typedef unsigned short WCHAR;
|
||||
|
||||
/*
|
||||
* These types must be 32-bit integer
|
||||
*/
|
||||
typedef long LONG;
|
||||
typedef unsigned long ULONG;
|
||||
typedef unsigned long DWORD;
|
||||
|
||||
/*
|
||||
* Boolean type
|
||||
*/
|
||||
// enum { false = 0 , true } bool;
|
||||
|
||||
//typedef int BOOL;
|
||||
#define FALSE 0
|
||||
#define TRUE 1
|
||||
|
||||
#define _INTEGER
|
||||
#endif
|
||||
@ -1,93 +0,0 @@
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <time.h>
|
||||
|
||||
#include "data.h";
|
||||
#include "pad.h";
|
||||
#include "event.h";
|
||||
#include "myEvents.h";
|
||||
#include "ressource.h";
|
||||
#include "PPU.h"
|
||||
#include "debug.h"
|
||||
#include "integer.h"
|
||||
|
||||
|
||||
|
||||
typedef void (*FUNC) (void);
|
||||
|
||||
padStatus pad1;
|
||||
|
||||
void initInternalRegisters(void)
|
||||
{
|
||||
characterLocation[0] = 0x0000;
|
||||
characterLocation[1] = 0x0000;
|
||||
characterLocation[2] = 0x0000;
|
||||
characterLocation[3] = 0x0000;
|
||||
debug_init();
|
||||
}
|
||||
|
||||
void preInit(void)
|
||||
{
|
||||
|
||||
// For testing purpose ...
|
||||
// Insert code here to be executed before register init
|
||||
}
|
||||
|
||||
void halt(void)
|
||||
{
|
||||
while (1);
|
||||
}
|
||||
|
||||
void wait(void)
|
||||
{
|
||||
printfc("SNES::wait: press A to continue\n");
|
||||
enablePad();
|
||||
pad1 = readPad((byte) 0);
|
||||
while (!pad1.A) {
|
||||
waitForVBlank();
|
||||
pad1 = readPad((byte) 0);
|
||||
}
|
||||
printfc("SNES::wait: done\n");
|
||||
}
|
||||
|
||||
void boot(DWORD addr)
|
||||
{
|
||||
FUNC fn;
|
||||
//printfc("SNES::boot addr=%lx\n", addr);
|
||||
fn = (FUNC) addr;
|
||||
fn();
|
||||
|
||||
}
|
||||
|
||||
unsigned char i;
|
||||
unsigned char j;
|
||||
|
||||
void main(void)
|
||||
{
|
||||
initInternalRegisters();
|
||||
*(byte *) 0x2105 = 0x01; // MODE 1 value
|
||||
*(byte *) 0x212c = 0x01; // Plane 0 (bit one) enable register
|
||||
*(byte *) 0x212d = 0x00; // All subPlane disable
|
||||
*(byte *) 0x2100 = 0x0f; // enable background
|
||||
|
||||
debug_enable();
|
||||
i=0;
|
||||
j=0;
|
||||
while (1) {
|
||||
printfs(0,"IRQ COUNT %i", i);
|
||||
printfs(1,"NMI COUNT %i", j++);
|
||||
waitForVBlank();
|
||||
}
|
||||
}
|
||||
|
||||
void IRQHandler(void)
|
||||
{
|
||||
i = i + 1;
|
||||
}
|
||||
|
||||
void NMIHandler(void)
|
||||
{
|
||||
|
||||
// processEvents();
|
||||
}
|
||||
@ -1,103 +0,0 @@
|
||||
#include "data.h";
|
||||
#include "pad.h";
|
||||
#include "event.h";
|
||||
|
||||
extern padStatus pad1;
|
||||
extern word scrollValue;
|
||||
|
||||
char fadeOut(word counter)
|
||||
{
|
||||
static byte fadeOutValue;
|
||||
|
||||
if (counter == 0) {
|
||||
// init fade value
|
||||
fadeOutValue = 0x0f;
|
||||
} else {
|
||||
fadeOutValue--;
|
||||
}
|
||||
|
||||
*(byte *) 0x2100 = fadeOutValue;
|
||||
|
||||
if (fadeOutValue == 0x00) {
|
||||
return EVENT_STOP;
|
||||
} else {
|
||||
return EVENT_CONTINUE;
|
||||
}
|
||||
}
|
||||
|
||||
char fadeIn(word counter)
|
||||
{
|
||||
static byte fadeInValue;
|
||||
|
||||
if (counter == 0) {
|
||||
// init fade value
|
||||
fadeInValue = 0x00;
|
||||
} else {
|
||||
fadeInValue++;
|
||||
}
|
||||
|
||||
*(byte *) 0x2100 = fadeInValue;
|
||||
|
||||
if (fadeInValue >= 0x0f) {
|
||||
return EVENT_STOP;
|
||||
} else {
|
||||
return EVENT_CONTINUE;
|
||||
}
|
||||
}
|
||||
|
||||
char mosaicOut(word counter)
|
||||
{
|
||||
static byte mosaicOutValue;
|
||||
|
||||
if (counter == 0) {
|
||||
// init fade value
|
||||
mosaicOutValue = 0xff;
|
||||
} else {
|
||||
mosaicOutValue -= 0x10;
|
||||
}
|
||||
|
||||
*(byte *) 0x2106 = mosaicOutValue;
|
||||
|
||||
if (mosaicOutValue == 0x0f) {
|
||||
return EVENT_STOP;
|
||||
} else {
|
||||
return EVENT_CONTINUE;
|
||||
}
|
||||
}
|
||||
|
||||
char mosaicIn(word counter)
|
||||
{
|
||||
static byte mosaicInValue;
|
||||
|
||||
if (counter == 0) {
|
||||
// init fade value
|
||||
mosaicInValue = 0x0f;
|
||||
} else {
|
||||
mosaicInValue += 0x10;
|
||||
}
|
||||
|
||||
*(byte *) 0x2106 = mosaicInValue;
|
||||
|
||||
if (mosaicInValue == 0xff) {
|
||||
return EVENT_STOP;
|
||||
} else {
|
||||
return EVENT_CONTINUE;
|
||||
}
|
||||
}
|
||||
|
||||
char NMIReadPad(word counter)
|
||||
{
|
||||
pad1 = readPad((byte) 0);
|
||||
|
||||
return EVENT_CONTINUE;
|
||||
}
|
||||
|
||||
char scrollLeft(word counter)
|
||||
{
|
||||
scrollValue++;
|
||||
|
||||
*(byte *) 0x210d = (byte) scrollValue;
|
||||
*(byte *) 0x210d = (byte) (scrollValue >> 8);
|
||||
|
||||
return EVENT_CONTINUE;
|
||||
}
|
||||
@ -1,6 +0,0 @@
|
||||
char fadeOut(word counter);
|
||||
char fadeIn(word counter);
|
||||
char mosaicOut(word counter);
|
||||
char mosaicIn(word counter);
|
||||
char NMIReadPad(word counter);
|
||||
char scrollLeft(word counter);
|
||||
@ -1,26 +0,0 @@
|
||||
#include "data.h";
|
||||
#include "pad.h";
|
||||
#include "debug.h";
|
||||
|
||||
void enablePad(void)
|
||||
{
|
||||
// Enable pad reading and NMI
|
||||
*(byte *) 0x4200 = 0x01;
|
||||
}
|
||||
|
||||
void disablePad(void)
|
||||
{
|
||||
// Enable pad reading and NMI
|
||||
*(byte *) 0x4200 = 0x00;
|
||||
}
|
||||
|
||||
padStatus readPad(byte padNumber)
|
||||
{
|
||||
word test;
|
||||
padStatus *status;
|
||||
padNumber = padNumber << 1;
|
||||
test = (word) * (byte *) 0x4218 + padNumber << 8;
|
||||
test |= (word) * (byte *) 0x4219 + padNumber;
|
||||
status = (padStatus *) & test;
|
||||
return *status;
|
||||
}
|
||||
@ -1,20 +0,0 @@
|
||||
typedef struct padStatus {
|
||||
byte right:1;
|
||||
byte left:1;
|
||||
byte down:1;
|
||||
byte up:1;
|
||||
byte start:1; // Enter
|
||||
byte select:1; // Space
|
||||
byte Y:1; // X
|
||||
byte B:1; // C
|
||||
// --------------------------------
|
||||
byte Dummy:4;
|
||||
byte R:1; // Z
|
||||
byte L:1; // A
|
||||
byte X:1; // S
|
||||
byte A:1; // D
|
||||
} padStatus;
|
||||
|
||||
extern void enablePad(void);
|
||||
extern void disablePad(void);
|
||||
extern padStatus readPad(byte padNumber);
|
||||
@ -1,9 +0,0 @@
|
||||
ressource .section
|
||||
|
||||
|
||||
XDEF _~debugFont_pic
|
||||
_~debugFont_pic
|
||||
INSERT ressource/debugFont.pic
|
||||
|
||||
|
||||
.ends
|
||||
@ -1,2 +0,0 @@
|
||||
|
||||
extern word debugFont_pic[];
|
||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
@ -1,262 +0,0 @@
|
||||
;------------------------------------------------------------------------
|
||||
;- Written by: Neviksti
|
||||
;- If you use my code, please share your creations with me
|
||||
;- as I am always curious :)
|
||||
;------------------------------------------------------------------------
|
||||
|
||||
|
||||
;----------------------------------------------------------------------------
|
||||
; InitSNES -- my "standard" initialization of SNES memory and registers
|
||||
;----------------------------------------------------------------------------
|
||||
.MACRO InitSNES
|
||||
sei ;disable interrupts
|
||||
clc ;switch to native mode
|
||||
xce
|
||||
|
||||
REP #$38 ; mem/A = 16 bit, X/Y = 16 bit
|
||||
;decimal mode off
|
||||
|
||||
LDX #$1FFF ;Setup the stack
|
||||
TXS ;Transfer Index X to Stack Pointer Register
|
||||
|
||||
;do the rest of the initialization in a routine
|
||||
JSL $008000
|
||||
|
||||
SEP #$20 ; mem/A = 8 bit
|
||||
.ENDM
|
||||
|
||||
;----------------------------------------------------------------------------
|
||||
|
||||
.BANK 0 SLOT 0
|
||||
.ORG 0
|
||||
.SECTION "InitializeSNESCode" FORCE
|
||||
|
||||
InitializeSNES:
|
||||
PHK ;set Data Bank = Program Bank
|
||||
PLB
|
||||
|
||||
LDA #$0000 ;set Direct Page = $0000
|
||||
TCD ;Transfer Accumulator to Direct Register
|
||||
|
||||
LDX $1FFD ;we clear all the mem at one point ...
|
||||
STX $4372 ;so save the return address in a place that won't get overwritten
|
||||
LDX $1FFF
|
||||
STX $4374
|
||||
|
||||
SEP #$20 ; mem/A = 8 bit
|
||||
REP #$10
|
||||
|
||||
LDA #$8F
|
||||
STA $2100 ;turn screen off for now, set brightness to normal
|
||||
|
||||
LDX #$2101
|
||||
_Loop00: ;regs $2101-$210C
|
||||
STZ $00,X ;set Sprite,Character,Tile sizes to lowest, and set addresses to $0000
|
||||
INX
|
||||
CPX #$210D
|
||||
BNE _Loop00
|
||||
|
||||
_Loop01: ;regs $210D-$2114
|
||||
STZ $00,X ;Set all BG scroll values to $0000
|
||||
STZ $00,X
|
||||
INX
|
||||
CPX #$2115
|
||||
BNE _Loop01
|
||||
|
||||
LDA #$80 ;reg $2115
|
||||
STA $2115 ; Initialize VRAM transfer mode to word-access, increment by 1
|
||||
|
||||
STZ $2116 ;regs $2117-$2117
|
||||
STZ $2117 ;VRAM address = $0000
|
||||
|
||||
;reg $2118-$2119
|
||||
;VRAM write register... don't need to initialize
|
||||
|
||||
STZ $211A ;clear Mode7 setting
|
||||
|
||||
LDX #$211B
|
||||
_Loop02: ;regs $211B-$2120
|
||||
STZ $00,X ;clear out the Mode7 matrix values
|
||||
STZ $00,X
|
||||
INX
|
||||
CPX #$2121
|
||||
BNE _Loop02
|
||||
|
||||
;reg $2121 - Color address, doesn't need initilaizing
|
||||
;reg $2122 - Color data, is initialized later
|
||||
|
||||
LDX #$2123
|
||||
_Loop03: ;regs $2123-$2133
|
||||
STZ $00,X ;turn off windows, main screens, sub screens, color addition,
|
||||
INX ;fixed color = $00, no super-impose (external synchronization),
|
||||
CPX #$2134 ;no interlaced mode, normal resolution
|
||||
BNE _Loop03
|
||||
|
||||
;regs $2134-$2136 - multiplication result, no initialization needed
|
||||
;reg $2137 - software H/V latch, no initialization needed
|
||||
;reg $2138 - Sprite data read, no initialization needed
|
||||
;regs $2139-$213A - VRAM data read, no initialization needed
|
||||
;reg $213B - Color RAM data read, no initialization needed
|
||||
;regs $213C-$213D - H/V latched data read, no initialization needed
|
||||
|
||||
STZ $213E ;reg $213E - might not be necesary, but selects PPU master/slave mode
|
||||
;reg $213F - PPU status flag, no initialization needed
|
||||
|
||||
;reg $2140-$2143 - APU communication regs, no initialization required
|
||||
|
||||
;reg $2180 - read/write WRAM register, no initialization required
|
||||
;reg $2181-$2183 - WRAM address, no initialization required
|
||||
|
||||
;reg $4016-$4017 - serial JoyPad read registers, no need to initialize
|
||||
|
||||
|
||||
STZ $4200 ;reg $4200 - disable timers, NMI,and auto-joyread
|
||||
|
||||
LDA #$FF
|
||||
STA $4201 ;reg $4201 - programmable I/O write port, initalize to allow reading at in-port
|
||||
|
||||
;regs $4202-$4203 - multiplication registers, no initialization required
|
||||
;regs $4204-$4206 - division registers, no initialization required
|
||||
|
||||
;regs $4207-$4208 - Horizontal-IRQ timer setting, since we disabled this, it is OK to not init
|
||||
;regs $4209-$420A - Vertical-IRQ timer setting, since we disabled this, it is OK to not init
|
||||
|
||||
STZ $420B ;reg $420B - turn off all general DMA channels
|
||||
STZ $420C ;reg $420C - turn off all H-MA channels
|
||||
|
||||
STZ $420D ;reg $420D - ROM access time to slow (2.68Mhz)
|
||||
|
||||
LDA $4210 ;reg $4210 - NMI status, reading resets
|
||||
|
||||
;reg $4211 - IRQ status, no need to initialize
|
||||
;reg $4212 - H/V blank and JoyRead status, no need to initialize
|
||||
;reg $4213 - programmable I/O inport, no need to initialize
|
||||
|
||||
;reg $4214-$4215 - divide results, no need to initialize
|
||||
;reg $4216-$4217 - multiplication or remainder results, no need to initialize
|
||||
|
||||
;regs $4218-$421f - JoyPad read registers, no need to initialize
|
||||
|
||||
;regs $4300-$437F
|
||||
;no need to intialize because DMA was disabled above
|
||||
;also, we're not sure what all of the registers do, so it is better to leave them at
|
||||
;their reset state value
|
||||
|
||||
; JSR ClearVRAM ;Reset VRAM
|
||||
; JSR ClearPalette ;Reset colors
|
||||
|
||||
;**** clear Sprite tables ********
|
||||
|
||||
STZ $2102 ;sprites initialized to be off the screen, palette 0, character 0
|
||||
STZ $2103
|
||||
LDX #$0080
|
||||
LDA #$F0
|
||||
_Loop08:
|
||||
STA $2104 ;set X = 240
|
||||
STA $2104 ;set Y = 240
|
||||
STZ $2104 ;set character = $00
|
||||
STZ $2104 ;set priority=0, no flips
|
||||
DEX
|
||||
BNE _Loop08
|
||||
|
||||
LDX #$0020
|
||||
_Loop09:
|
||||
STZ $2104 ;set size bit=0, x MSB = 0
|
||||
DEX
|
||||
BNE _Loop09
|
||||
|
||||
;**** clear WRAM ********
|
||||
|
||||
STZ $2181 ;set WRAM address to $000000
|
||||
STZ $2182
|
||||
STZ $2183
|
||||
|
||||
LDX #$8008
|
||||
STX $4300 ;Set DMA mode to fixed source, BYTE to $2180
|
||||
LDX #wram_fill_byte
|
||||
STX $4302 ;Set source offset
|
||||
LDA #:wram_fill_byte
|
||||
STA $4304 ;Set source bank
|
||||
LDX #$0000
|
||||
STX $4305 ;Set transfer size to 64k bytes
|
||||
LDA #$01
|
||||
STA $420B ;Initiate transfer
|
||||
|
||||
LDA #$01 ;now set the next 64k bytes
|
||||
STA $420B ;Initiate transfer
|
||||
|
||||
PHK ;make sure Data Bank = Program Bank
|
||||
PLB
|
||||
|
||||
CLI ;enable interrupts again
|
||||
|
||||
LDX $4372 ;get our return address...
|
||||
STX $1FFD
|
||||
LDA $4374
|
||||
STA $1FFF
|
||||
RTL
|
||||
|
||||
wram_fill_byte:
|
||||
.db $00
|
||||
|
||||
;----------------------------------------------------------------------------
|
||||
; ClearVRAM -- Sets every byte of VRAM to zero
|
||||
; In: None
|
||||
; Out: None
|
||||
; Modifies: flags
|
||||
;----------------------------------------------------------------------------
|
||||
ClearVRAM:
|
||||
pha
|
||||
phx
|
||||
php
|
||||
|
||||
REP #$30 ; mem/A = 8 bit, X/Y = 16 bit
|
||||
SEP #$20
|
||||
|
||||
LDA #$80
|
||||
STA $2115 ;Set VRAM port to word access
|
||||
LDX #$1809
|
||||
STX $4300 ;Set DMA mode to fixed source, WORD to $2118/9
|
||||
LDX #$0000
|
||||
STX $2116 ;Set VRAM port address to $0000
|
||||
STX $0000 ;Set $00:0000 to $0000 (assumes scratchpad ram)
|
||||
STX $4302 ;Set source address to $xx:0000
|
||||
LDA #$00
|
||||
STA $4304 ;Set source bank to $00
|
||||
LDX #$FFFF
|
||||
STX $4305 ;Set transfer size to 64k-1 bytes
|
||||
LDA #$01
|
||||
STA $420B ;Initiate transfer
|
||||
|
||||
STZ $2119 ;clear the last byte of the VRAM
|
||||
|
||||
plp
|
||||
plx
|
||||
pla
|
||||
RTS
|
||||
|
||||
;----------------------------------------------------------------------------
|
||||
; ClearPalette -- Reset all palette colors to zero
|
||||
; In: None
|
||||
; Out: None
|
||||
; Modifies: flags
|
||||
;----------------------------------------------------------------------------
|
||||
ClearPalette:
|
||||
PHX
|
||||
PHP
|
||||
REP #$30 ; mem/A = 8 bit, X/Y = 16 bit
|
||||
SEP #$20
|
||||
|
||||
STZ $2121
|
||||
LDX #$0100
|
||||
ClearPaletteLoop:
|
||||
STZ $2122
|
||||
STZ $2122
|
||||
DEX
|
||||
BNE ClearPaletteLoop
|
||||
|
||||
PLP
|
||||
PLX
|
||||
RTS
|
||||
|
||||
.ENDS
|
||||
@ -1,7 +0,0 @@
|
||||
|
||||
|
||||
all:
|
||||
sh make.sh
|
||||
|
||||
run:
|
||||
zsnes xmsnes.smc
|
||||
@ -1,41 +0,0 @@
|
||||
;----------------------------------------------------------------------;
|
||||
; Header File ;
|
||||
; (Written By MarcTheMER) ;
|
||||
; Email: marcthemer@hotmail.com ;
|
||||
;======================================================================;
|
||||
; I had written this simple yet useful header file to help SNES ;
|
||||
; programmers with their assembly. This section of code modifies the ;
|
||||
; SNES cartridge header so it is compatable for use on zsnes or snes9x ;
|
||||
;======================================================================;
|
||||
; If you use any of my header files to create an awesome game please ;
|
||||
; email me as I am always trying to learn new programming skills. ;
|
||||
;----------------------------------------------------------------------;
|
||||
|
||||
|
||||
.SNESNATIVEVECTOR ; Defines inturupt vactor table
|
||||
COP DoNothing
|
||||
BRK DoNothing
|
||||
ABORT DoNothing
|
||||
NMI VBlank
|
||||
IRQ DoNothing
|
||||
.ENDNATIVEVECTOR
|
||||
|
||||
.SNESEMUVECTOR ; Defines inturupt vactor table
|
||||
COP DoNothing
|
||||
ABORT DoNothing
|
||||
NMI DoNothing ; I wouldn't recomend using emulation mode.
|
||||
RESET Main
|
||||
IRQBRK DoNothing
|
||||
.ENDEMUVECTOR
|
||||
|
||||
|
||||
.EMPTYFILL $00 ; fills the rom with $00
|
||||
|
||||
.BANK 0 SLOT 0
|
||||
.ORG 0
|
||||
.SECTION "EmptyVectors" SEMIFREE ; Set up interupt vector coding.
|
||||
|
||||
DoNothing:
|
||||
RTI
|
||||
|
||||
.ENDS
|
||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
@ -1,906 +0,0 @@
|
||||
; Created with eKid's pcx2snes converter ;
|
||||
|
||||
gfx_bg:
|
||||
.db $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF
|
||||
.db $FF, $FF, $FF, $FF, $FF, $FF, $FE, $FF, $FE, $FF, $FE, $FF, $FC, $FF, $FC, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF
|
||||
.db $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF
|
||||
.db $1F, $E0, $3F, $C0, $3F, $C0, $3F, $C0, $7F, $80, $7F, $80, $7F, $80, $FF, $00, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF
|
||||
.db $F0, $00, $F0, $00, $E0, $00, $E0, $00, $E0, $00, $C0, $00, $C0, $00, $C0, $00, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF
|
||||
.db $1F, $1F, $1F, $1F, $1F, $1F, $1F, $1F, $3F, $3F, $3F, $3F, $3F, $3F, $7F, $7F, $E0, $FF, $E0, $FF, $E0, $FF, $E0, $FF, $C0, $FF, $C0, $FF, $C0, $FF, $80, $FF
|
||||
.db $E0, $FF, $E0, $FF, $C0, $FF, $C0, $FF, $C0, $FF, $C0, $FF, $80, $FF, $80, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $1F, $E0, $1F, $E0, $3F, $C0, $3F, $C0, $3F, $C0, $7E, $80, $7E, $80, $7E, $80, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $80, $00, $80, $00, $00, $00, $03, $03, $03, $03, $07, $07, $07, $07, $07, $07, $00, $FF, $00, $FF, $00, $FF, $03, $FC, $03, $FC, $07, $F8, $07, $F8, $07, $F8
|
||||
.db $00, $00, $00, $00, $00, $00, $C0, $C0, $F8, $F8, $FF, $FF, $FF, $FF, $FF, $FF, $00, $FF, $00, $FF, $00, $FF, $C0, $3F, $F8, $07, $FF, $00, $FF, $00, $FF, $00
|
||||
.db $1F, $00, $01, $00, $00, $00, $00, $00, $00, $00, $00, $00, $E0, $E0, $FE, $FE, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $E0, $1F, $FE, $01
|
||||
.db $FF, $00, $FF, $00, $3F, $00, $07, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $FE, $01, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $0F, $00, $01, $00, $00, $00, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $00, $FF, $C0, $3F, $F8, $07, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $3F, $00, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $00, $FF, $00, $FF, $00, $FF, $80, $7F, $F0, $0F, $FE, $01, $FF, $00, $FF, $00, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $C0, $3F, $FC, $03, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $FF, $FF, $1F, $FF, $01, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $FF, $FF, $FF, $FF, $FF, $FF, $3F, $FF, $07, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $0F, $FF, $01, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $80, $80, $F0, $F0, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $7F, $FF, $0F, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
.db $E0, $00, $E0, $00, $E0, $00, $C0, $00, $C0, $00, $C0, $00, $C0, $00, $81, $01, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $01, $FE
|
||||
.db $7E, $7F, $7C, $7F, $7C, $7F, $FC, $FF, $F8, $FF, $F8, $FF, $F8, $FF, $F0, $FF, $7F, $80, $7F, $80, $7F, $80, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00
|
||||
.db $03, $FC, $03, $FC, $07, $F8, $07, $F8, $07, $F8, $0F, $F0, $0F, $F0, $0F, $F0, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00
|
||||
.db $FC, $00, $F8, $00, $F8, $00, $F8, $00, $F0, $00, $F0, $00, $F0, $00, $E0, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00
|
||||
.db $01, $01, $03, $03, $03, $03, $03, $03, $07, $07, $07, $07, $07, $07, $07, $07, $FE, $00, $FC, $00, $FC, $00, $FC, $00, $F8, $00, $F8, $00, $F8, $00, $F8, $00
|
||||
.db $FF, $FF, $FF, $FF, $FF, $FF, $FE, $FF, $FE, $FF, $FE, $FF, $FC, $FF, $FC, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $0F, $F0, $0F, $F0, $1F, $E0, $1F, $E0, $1F, $E0, $3F, $C0, $3F, $C0, $3F, $C0, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FE, $00, $FE, $00, $FE, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $80, $00, $80, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $01, $00, $03, $00, $03, $00, $03, $00, $07, $00, $07, $00, $07, $00, $0F, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $F0, $0F, $E0, $1F, $E0, $1F, $E0, $1F, $C0, $3F, $C0, $3F, $C0, $3F, $80, $7F, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $01, $FF, $01, $FF, $01, $FF, $03, $FF, $03, $FF, $03, $FF, $03, $FF, $07, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FE, $FE, $FE, $FE, $FE, $FE, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $01, $00, $01, $00, $01, $00
|
||||
.db $80, $80, $80, $80, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $7F, $00, $7F, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00
|
||||
.db $3F, $00, $3F, $00, $7F, $00, $7F, $00, $7F, $00, $7F, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00
|
||||
.db $C0, $3F, $80, $7F, $80, $7F, $80, $7F, $00, $FF, $00, $FF, $01, $FF, $01, $FF, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00
|
||||
.db $7C, $FC, $7C, $FC, $FC, $FC, $F8, $F8, $F8, $F8, $F8, $F8, $F0, $F0, $F0, $F0, $FC, $03, $FC, $03, $FC, $03, $F8, $07, $F8, $07, $F8, $07, $F0, $0F, $F0, $0F
|
||||
.db $0F, $00, $0F, $00, $0F, $00, $1F, $00, $1F, $00, $1F, $00, $3F, $00, $3F, $00, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $C0, $3F, $C0, $3F, $C0, $3F, $80, $7F, $80, $7F, $80, $7F, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $3F, $FF, $3F, $FF, $7F, $FF, $7F, $FF, $7F, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $C0, $C0, $80, $80, $80, $80, $80, $80, $00, $00, $00, $00, $01, $00, $01, $00, $3F, $FF, $7F, $FF, $7F, $FF, $7F, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF
|
||||
.db $F0, $00, $F0, $00, $E0, $00, $E0, $00, $E0, $00, $C0, $00, $C0, $00, $C0, $00, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF
|
||||
.db $1F, $1F, $1F, $1F, $1F, $1F, $1F, $1F, $3F, $3F, $3F, $3F, $3F, $3F, $7F, $7F, $E0, $FF, $E0, $FF, $E0, $FF, $E0, $FF, $C0, $FF, $C0, $FF, $C0, $FF, $80, $FF
|
||||
.db $E0, $FF, $E0, $FF, $E0, $FF, $C0, $FF, $C0, $FF, $C0, $FF, $80, $FF, $80, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $1F, $E0, $1F, $E0, $3F, $C0, $3F, $C0, $3F, $C0, $7E, $80, $7E, $80, $7E, $80, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $81, $01, $81, $01, $03, $03, $03, $03, $03, $03, $07, $07, $07, $07, $07, $07, $01, $FE, $01, $FE, $03, $FC, $03, $FC, $03, $FC, $07, $F8, $07, $F8, $07, $F8
|
||||
.db $F0, $FF, $F0, $FF, $E0, $FF, $E0, $FF, $E0, $FF, $E0, $FF, $C0, $FF, $C0, $FF, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00
|
||||
.db $1F, $E0, $1F, $E0, $1F, $E0, $1F, $E0, $3F, $C0, $3F, $C0, $3F, $C0, $7F, $80, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00
|
||||
.db $E0, $00, $E0, $00, $C0, $00, $C0, $00, $C0, $00, $C0, $00, $80, $00, $80, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00
|
||||
.db $0F, $0F, $0F, $0F, $0F, $0F, $1F, $1F, $1F, $1F, $1F, $1F, $3F, $3F, $3F, $3F, $F0, $00, $F0, $00, $F0, $00, $E0, $00, $E0, $00, $E0, $00, $C0, $00, $C0, $00
|
||||
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|
||||
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|
||||
.db $3F, $C0, $7F, $80, $7F, $80, $7F, $80, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $FE, $00, $FC, $00, $FC, $00, $FC, $00, $F8, $00, $F8, $00, $F8, $00, $F0, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
.db $0F, $00, $0F, $00, $0F, $00, $1F, $00, $1F, $00, $1F, $00, $3F, $00, $3F, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FE, $01, $FE, $01, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $80, $7F, $80, $7F, $80, $7F, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $07, $FF, $07, $FF, $0F, $FF, $0F, $FF, $0F, $FF, $1F, $FF, $1F, $FF, $1F, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
.db $F0, $F0, $E0, $E0, $E0, $E0, $E0, $E0, $E0, $E0, $C0, $C0, $C0, $C0, $C0, $C0, $F0, $0F, $E0, $1F, $E0, $1F, $E0, $1F, $E0, $1F, $C0, $3F, $C0, $3F, $C0, $3F
|
||||
.db $3F, $00, $7E, $01, $7E, $01, $7E, $01, $7E, $01, $FC, $03, $FC, $03, $FC, $03, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
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|
||||
.db $FE, $FE, $FE, $FE, $FE, $FE, $FC, $FC, $FC, $FC, $FC, $FC, $F8, $F8, $F8, $F8, $01, $FF, $01, $FF, $01, $FF, $03, $FF, $03, $FF, $03, $FF, $07, $FF, $07, $FF
|
||||
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|
||||
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|
||||
.db $7F, $7F, $7F, $7F, $FF, $FF, $FF, $FF, $FE, $FF, $FE, $FF, $FE, $FF, $FE, $FF, $80, $FF, $80, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
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|
||||
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|
||||
.db $0F, $0F, $0F, $0F, $0F, $0F, $0F, $0F, $1F, $1F, $1F, $1F, $1F, $1F, $3E, $3F, $0F, $F0, $0F, $F0, $0F, $F0, $0F, $F0, $1F, $E0, $1F, $E0, $1F, $E0, $3F, $C0
|
||||
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|
||||
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|
||||
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|
||||
.db $3F, $3F, $7F, $7F, $7F, $7F, $7F, $7F, $7F, $7F, $FF, $FF, $FF, $FF, $FF, $FF, $C0, $00, $80, $00, $80, $00, $80, $00, $80, $00, $00, $00, $00, $00, $00, $00
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
.db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $3F, $00, $7F, $00, $7F, $00, $7F, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $FE, $01, $FC, $03, $FC, $03, $FC, $03, $F8, $07, $F8, $07, $F8, $07, $F8, $07, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $3F, $FF, $3F, $FF, $3F, $FF, $3F, $FF, $7F, $FF, $7F, $FF, $7F, $FF, $FF, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $F0, $F0, $F0, $F0, $E0, $E0, $E0, $E0, $E0, $E0, $C0, $C0, $C0, $C0, $C0, $C0, $0F, $00, $0F, $00, $1F, $00, $1F, $00, $1F, $00, $3F, $00, $3F, $00, $3F, $00
|
||||
.db $07, $00, $07, $00, $07, $00, $0F, $00, $0F, $00, $0F, $00, $1F, $00, $1F, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00
|
||||
.db $F8, $07, $F0, $0F, $F0, $0F, $F0, $0F, $F0, $0F, $E0, $1F, $E0, $1F, $E0, $1F, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00
|
||||
.db $0F, $FF, $0F, $FF, $0F, $FF, $1F, $FF, $1F, $FF, $1F, $FF, $3E, $FE, $3E, $FE, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FE, $01, $FE, $01
|
||||
.db $81, $80, $81, $80, $81, $80, $03, $00, $03, $00, $03, $00, $07, $00, $07, $00, $80, $7F, $80, $7F, $80, $7F, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $F8, $07, $F8, $07, $F8, $07, $F0, $0F, $F0, $0F, $F0, $0F, $E0, $1F, $E0, $1F, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $07, $FF, $07, $FF, $0F, $FF, $0F, $FF, $0F, $FF, $0F, $FF, $1F, $FF, $1F, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $F8, $F8, $F0, $F0, $F0, $F0, $F0, $F0, $F0, $F0, $E0, $E0, $E0, $E0, $E0, $E0, $07, $FF, $0F, $FF, $0F, $FF, $0F, $FF, $0F, $FF, $1F, $FF, $1F, $FF, $1F, $FF
|
||||
.db $0F, $00, $0F, $00, $0F, $00, $1F, $00, $1F, $00, $1F, $00, $3F, $00, $3F, $00, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF
|
||||
.db $01, $01, $03, $03, $03, $03, $03, $03, $07, $07, $07, $07, $07, $07, $0F, $0F, $FE, $FF, $FC, $FF, $FC, $FF, $FC, $FF, $F8, $FF, $F8, $FF, $F8, $FF, $F0, $FF
|
||||
.db $FC, $FF, $FC, $FF, $FC, $FF, $F8, $FF, $F8, $FF, $F8, $FF, $F0, $FF, $F0, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $03, $FC, $03, $FC, $07, $F8, $07, $F8, $07, $F8, $0F, $F0, $0F, $F0, $0F, $F0, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $F0, $00, $F0, $00, $E0, $00, $E0, $00, $E0, $00, $C0, $00, $C0, $00, $C0, $00, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
.db $3E, $3F, $3E, $3F, $7E, $7F, $7C, $7F, $7C, $7F, $FC, $FF, $F8, $FF, $F8, $FF, $3F, $C0, $3F, $C0, $7F, $80, $7F, $80, $7F, $80, $FF, $00, $FF, $00, $FF, $00
|
||||
.db $01, $FE, $03, $FC, $03, $FC, $03, $FC, $07, $F8, $07, $F8, $07, $F8, $0F, $F0, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00
|
||||
.db $FC, $00, $FC, $00, $FC, $00, $F8, $00, $F8, $00, $F8, $00, $F0, $00, $F0, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00
|
||||
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|
||||
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|
||||
.db $80, $FF, $80, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $07, $F8, $0F, $F0, $0F, $F0, $0F, $F0, $1F, $E0, $1F, $E0, $1F, $E0, $3F, $C0, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
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|
||||
.db $C0, $00, $80, $00, $80, $00, $80, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
.db $01, $00, $01, $00, $01, $00, $03, $00, $03, $00, $03, $00, $07, $00, $07, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
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|
||||
.db $F0, $0F, $F0, $0F, $F0, $0F, $E0, $1F, $E0, $1F, $E0, $1F, $C0, $3F, $C0, $3F, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
.db $0F, $F0, $1F, $E0, $1F, $E0, $1F, $E0, $3F, $C0, $3F, $C0, $3F, $C0, $7E, $80, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF
|
||||
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|
||||
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|
||||
.db $0F, $F0, $0F, $F0, $1F, $E0, $1F, $E0, $1F, $E0, $1F, $E0, $3F, $C0, $3F, $C0, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
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|
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|
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|
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|
||||
|
||||
gfxp_bg:
|
||||
.db $DE, $7B, $BD, $77, $7B, $6F, $7B, $6F, $5A, $6B, $39, $67, $18, $63, $F7, $5E
|
||||
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|
||||
|
||||
; 896 tiles (0 spaces)
|
||||
; 28672 bytes
|
||||
@ -1,13 +0,0 @@
|
||||
; Created with eKid's pcx2snes converter ;
|
||||
|
||||
gfx_bg2:
|
||||
.db $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $00, $FF, $00, $FF, $00, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
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|
||||
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|
||||
|
||||
gfxp_bg2:
|
||||
.db $5E, $02, $DF, $7F, $91, $6E, $CE, $01, $09, $00, $17, $00, $03, $00, $00, $00
|
||||
.db $0F, $34, $16, $6C, $1C, $68, $0E, $38, $32, $03, $A8, $03, $43, $00, $00, $00
|
||||
|
||||
; 3 tiles (0 spaces)
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; 96 bytes
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@ -1,138 +0,0 @@
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; Created with eKid's pcx2snes converter ;
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gfx_bub:
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gfxp_bub:
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.db $1F, $7C, $61, $1F, $B5, $5A, $01, $3B, $D1, $4B, $07, $1D, $1B, $03, $59, $29
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.db $B7, $63, $C1, $07, $39, $67, $BE, $77, $BC, $35, $7D, $0B, $43, $00, $00, $00
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|
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; 128 tiles (0 spaces)
|
||||
; 4096 bytes
|
||||
@ -1,102 +0,0 @@
|
||||
; Created with eKid's pcx2snes converter ;
|
||||
|
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gfx_font:
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||||
.db $00, $00, $00, $00, $7C, $00, $00, $3E, $7C, $00, $00, $3E, $00, $00, $00, $00
|
||||
.db $00, $00, $20, $00, $10, $00, $08, $00, $10, $04, $20, $08, $00, $10, $00, $00
|
||||
.db $38, $00, $44, $18, $04, $02, $08, $02, $30, $04, $00, $18, $30, $00, $00, $18
|
||||
.db $7C, $00, $82, $3C, $BA, $41, $AA, $55, $BE, $41, $80, $5F, $7E, $00, $00, $3F
|
||||
.db $38, $00, $44, $18, $44, $22, $7C, $02, $44, $3A, $44, $22, $44, $22, $00, $22
|
||||
.db $78, $00, $44, $38, $44, $22, $78, $02, $44, $38, $44, $22, $78, $02, $00, $3C
|
||||
.db $38, $00, $44, $18, $40, $22, $40, $20, $40, $20, $44, $20, $38, $02, $00, $1C
|
||||
.db $78, $00, $44, $38, $44, $22, $44, $22, $44, $22, $44, $22, $78, $02, $00, $3C
|
||||
.db $7C, $00, $40, $3E, $40, $20, $78, $00, $40, $3C, $40, $20, $7C, $00, $00, $3E
|
||||
.db $7C, $00, $40, $3E, $40, $20, $78, $00, $40, $3C, $40, $20, $40, $20, $00, $20
|
||||
.db $38, $00, $44, $18, $40, $22, $4C, $20, $44, $22, $44, $22, $3C, $02, $00, $1E
|
||||
.db $44, $00, $44, $22, $44, $22, $7C, $02, $44, $3A, $44, $22, $44, $22, $00, $22
|
||||
.db $7C, $00, $10, $2E, $10, $08, $10, $08, $10, $08, $10, $08, $7C, $00, $00, $3E
|
||||
.db $7C, $00, $08, $36, $08, $04, $08, $04, $08, $04, $48, $04, $30, $04, $00, $18
|
||||
.db $44, $00, $48, $22, $50, $24, $68, $00, $48, $34, $44, $20, $44, $22, $00, $22
|
||||
.db $40, $00, $40, $20, $40, $20, $40, $20, $40, $20, $40, $20, $7C, $00, $00, $3E
|
||||
.db $44, $00, $6C, $02, $54, $22, $44, $2A, $44, $22, $44, $22, $44, $22, $00, $22
|
||||
.db $44, $00, $64, $02, $54, $22, $4C, $22, $44, $22, $44, $22, $44, $22, $00, $22
|
||||
.db $38, $00, $44, $18, $44, $22, $44, $22, $44, $22, $44, $22, $38, $02, $00, $1C
|
||||
.db $78, $00, $44, $38, $44, $22, $78, $02, $40, $3C, $40, $20, $40, $20, $00, $20
|
||||
.db $38, $00, $44, $18, $44, $22, $44, $22, $44, $22, $4C, $22, $3C, $02, $04, $1A
|
||||
.db $78, $00, $44, $38, $44, $22, $78, $02, $44, $38, $44, $22, $44, $22, $00, $22
|
||||
.db $38, $00, $44, $18, $40, $22, $38, $00, $04, $18, $44, $02, $38, $02, $00, $1C
|
||||
.db $7C, $00, $10, $2E, $10, $08, $10, $08, $10, $08, $10, $08, $10, $08, $00, $08
|
||||
.db $44, $00, $44, $22, $44, $22, $44, $22, $44, $22, $44, $22, $38, $02, $00, $1C
|
||||
.db $44, $00, $44, $22, $44, $22, $44, $22, $44, $22, $28, $02, $10, $04, $00, $08
|
||||
.db $44, $00, $44, $22, $44, $22, $44, $22, $54, $22, $54, $2A, $28, $02, $00, $14
|
||||
.db $44, $00, $44, $22, $28, $02, $10, $04, $28, $00, $44, $10, $44, $22, $00, $22
|
||||
.db $44, $00, $44, $22, $44, $22, $3C, $02, $04, $1A, $04, $02, $78, $02, $00, $3C
|
||||
.db $7C, $00, $04, $3A, $08, $02, $10, $04, $20, $08, $40, $10, $7C, $00, $00, $3E
|
||||
.db $18, $00, $10, $0C, $10, $08, $10, $08, $10, $08, $10, $08, $18, $00, $00, $0C
|
||||
.db $20, $00, $20, $10, $10, $00, $10, $08, $08, $00, $08, $04, $04, $00, $00, $02
|
||||
.db $18, $00, $08, $04, $08, $04, $08, $04, $08, $04, $08, $04, $18, $04, $00, $0C
|
||||
.db $10, $00, $28, $00, $00, $14, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $FF, $00, $00, $FF
|
||||
.db $20, $00, $10, $00, $00, $08, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $00, $00, $00, $00, $38, $00, $04, $18, $3C, $02, $44, $1A, $3C, $02, $00, $1E
|
||||
.db $40, $00, $40, $20, $78, $00, $44, $38, $44, $22, $44, $22, $78, $02, $00, $3C
|
||||
.db $00, $00, $00, $00, $3C, $00, $40, $1E, $40, $20, $40, $20, $3C, $00, $00, $1E
|
||||
.db $04, $00, $04, $02, $3C, $02, $44, $1A, $44, $22, $44, $22, $3C, $02, $00, $1E
|
||||
.db $00, $00, $00, $00, $38, $00, $44, $18, $7C, $02, $40, $3E, $3C, $00, $00, $1E
|
||||
.db $18, $00, $24, $08, $20, $12, $78, $00, $20, $1C, $20, $10, $20, $10, $00, $10
|
||||
.db $00, $00, $00, $00, $38, $00, $44, $18, $44, $22, $3C, $02, $04, $1A, $78, $04
|
||||
.db $40, $00, $40, $20, $78, $00, $44, $38, $44, $22, $44, $22, $44, $22, $00, $22
|
||||
.db $10, $00, $00, $08, $10, $00, $10, $08, $10, $08, $10, $08, $10, $08, $00, $08
|
||||
.db $10, $00, $00, $08, $10, $00, $10, $08, $10, $08, $10, $08, $10, $08, $20, $18
|
||||
.db $40, $00, $40, $20, $48, $20, $50, $24, $60, $08, $50, $20, $48, $20, $00, $24
|
||||
.db $30, $00, $10, $08, $10, $08, $10, $08, $10, $08, $10, $08, $10, $08, $00, $08
|
||||
.db $00, $00, $00, $00, $68, $00, $54, $20, $54, $2A, $54, $2A, $54, $2A, $00, $2A
|
||||
.db $00, $00, $00, $00, $78, $00, $44, $38, $44, $22, $44, $22, $44, $22, $00, $22
|
||||
.db $00, $00, $00, $00, $38, $00, $44, $18, $44, $22, $44, $22, $38, $02, $00, $1C
|
||||
.db $00, $00, $00, $00, $3C, $00, $22, $1C, $22, $11, $22, $11, $3C, $01, $20, $1E
|
||||
.db $00, $00, $00, $00, $3C, $00, $44, $1A, $44, $22, $44, $22, $3C, $02, $04, $1A
|
||||
.db $00, $00, $00, $00, $3C, $00, $20, $1E, $20, $10, $20, $10, $20, $10, $00, $10
|
||||
.db $00, $00, $00, $00, $3C, $00, $40, $1E, $7C, $00, $04, $3A, $78, $02, $00, $3C
|
||||
.db $10, $00, $10, $08, $7C, $00, $10, $2E, $10, $08, $10, $08, $10, $08, $00, $08
|
||||
.db $00, $00, $00, $00, $44, $00, $44, $22, $44, $22, $44, $22, $3C, $02, $00, $1E
|
||||
.db $00, $00, $00, $00, $22, $00, $22, $11, $22, $11, $14, $01, $08, $02, $00, $04
|
||||
.db $00, $00, $00, $00, $44, $00, $44, $22, $44, $22, $54, $22, $28, $02, $00, $14
|
||||
.db $00, $00, $00, $00, $44, $00, $44, $22, $38, $02, $44, $18, $44, $22, $00, $22
|
||||
.db $00, $00, $00, $00, $44, $00, $44, $22, $44, $22, $3C, $02, $04, $1A, $78, $02
|
||||
.db $00, $00, $00, $00, $7C, $00, $08, $36, $10, $04, $20, $08, $7C, $00, $00, $3E
|
||||
.db $08, $00, $10, $04, $10, $08, $20, $08, $10, $00, $10, $08, $08, $00, $00, $04
|
||||
.db $10, $08, $10, $08, $10, $08, $10, $08, $10, $08, $10, $08, $10, $08, $10, $08
|
||||
.db $10, $00, $08, $00, $08, $04, $04, $00, $08, $02, $08, $04, $10, $04, $00, $08
|
||||
.db $24, $00, $58, $02, $00, $2C, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
|
||||
; 96 tiles (0 spaces)
|
||||
; 1536 bytes
|
||||
@ -1,19 +0,0 @@
|
||||
; Created with eKid's pcx2snes converter ;
|
||||
|
||||
gfx_window:
|
||||
.db $7F, $00, $FF, $00, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $FF, $00, $FF, $00, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $FE, $00, $FD, $03, $03, $FF, $03, $FF, $03, $FF, $03, $FF, $03, $FF, $03, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $03, $FF, $03, $FF, $03, $FF, $03, $FF, $03, $FF, $03, $FF, $03, $FF, $03, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $BF, $7F, $7F, $7F, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $FF, $FF, $FF, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $03, $FF, $03, $FF, $03, $FF, $03, $FF, $03, $FF, $03, $FF, $FF, $FF, $FE, $FE, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
|
||||
gfxp_window:
|
||||
.db $1D, $7C, $60, $18, $46, $49, $0B, $6E, $16, $04, $0D, $00, $03, $50, $00, $00
|
||||
.db $0F, $60, $16, $5C, $1C, $0C, $0E, $00, $33, $03, $B9, $03, $43, $00, $00, $00
|
||||
|
||||
; 9 tiles (0 spaces)
|
||||
; 288 bytes
|
||||
@ -1,19 +0,0 @@
|
||||
; Created with eKid's pcx2snes converter ;
|
||||
|
||||
gfx_window:
|
||||
.db $80, $FF, $00, $FF, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $00, $FF, $00, $FF, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $01, $FF, $03, $FC, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $00, $00, $01, $00, $03, $00, $03, $00, $03, $00, $03, $00, $03, $00, $03, $00
|
||||
.db $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $03, $00, $03, $00, $03, $00, $03, $00, $03, $00, $03, $00, $03, $00, $03, $00
|
||||
.db $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $3F, $C0, $7F, $80, $FF, $80, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $3F, $00, $7F, $00
|
||||
.db $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $FF, $00, $FF, $00
|
||||
.db $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $01, $03, $00, $03, $00, $03, $00, $03, $00, $03, $00, $03, $00, $FF, $00, $FE, $00
|
||||
.db $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
|
||||
gfxp_window:
|
||||
.db $1C, $00, $8C, $31, $83, $0C, $EF, $3D, $07, $08, $73, $4E, $03, $50, $00, $00
|
||||
.db $0F, $10, $16, $70, $1C, $0C, $0E, $00, $36, $03, $A0, $03, $43, $00, $00, $00
|
||||
|
||||
; 9 tiles (0 spaces)
|
||||
; 288 bytes
|
||||
Binary file not shown.
Binary file not shown.
@ -1,910 +0,0 @@
|
||||
; XMSNES EXAMPLE DEMO!
|
||||
|
||||
.define nsongs 5 ; number of songs in package
|
||||
|
||||
.include "memmap.inc" ; memory map stuff
|
||||
.include "cheader.inc" ; snes rom header
|
||||
.include "InitSNES.asm" ; snes initialization code
|
||||
|
||||
.include "snes.inc" ; snes register definitions
|
||||
|
||||
.BANK 1
|
||||
|
||||
.SECTION "GRAPHICS" ; include graphics (bank1)
|
||||
.include "graphics\gfx_window.inc"
|
||||
.include "graphics\gfx_font.inc"
|
||||
.include "graphics\gfx_bg.inc"
|
||||
.include "graphics\gfx_bg2.inc"
|
||||
;.include "graphics\gfx_bub.inc"
|
||||
.ENDS
|
||||
|
||||
.BANK 2 SLOT 3 ; include songs/samples (bank2)
|
||||
.SECTION "SPX_PACKAGE"
|
||||
TEST_PACKAGE:
|
||||
.incbin "test.xmp"
|
||||
.ENDS
|
||||
|
||||
.ramsection "globals" BANK 0 SLOT 1
|
||||
bg_ripple: db ; for bg effect
|
||||
bg_rippleL: db
|
||||
|
||||
scr_fade: db ; for fading screen
|
||||
scr_flash: dsb 3 ; for flashing screen
|
||||
|
||||
joypad: dw ; joypad state
|
||||
joypadc: dw ; joypad 'clicks'
|
||||
joypadl: dw ; last joypad state
|
||||
|
||||
svar1: dw ; general purpose
|
||||
svar2: dw
|
||||
|
||||
current_song: dw
|
||||
|
||||
music_vol: dw ; 8.8 fixed
|
||||
|
||||
custom_string: dsb 32
|
||||
|
||||
effect1: db ; sound effect indexes
|
||||
effect2: db
|
||||
effect3: db
|
||||
effect4: db
|
||||
|
||||
inst_timer: dw
|
||||
|
||||
.ends
|
||||
|
||||
.BANK 0
|
||||
|
||||
.SECTION "MAIN"
|
||||
|
||||
Main:
|
||||
InitSNES ; initialize everything
|
||||
REP #$10 ; 16bit index
|
||||
SEP #$20 ; 8bit accu
|
||||
|
||||
lda #$80 ; turn off screen
|
||||
sta REG_INIDISP
|
||||
|
||||
lda #%00001001 ; set display mode
|
||||
sta REG_BGMODE ; mode 1
|
||||
|
||||
jsl LoadBG ; load background bg
|
||||
jsl BuildWindow ; build the window thingy
|
||||
jsl LoadFont ; load the font
|
||||
jsl ClearAllText ; reset the text layer
|
||||
|
||||
;ldx #STR_SPCDATA ; draw "SPC Ports"
|
||||
;ldy #14*32+12
|
||||
jsl DrawText
|
||||
|
||||
lda #%0110 ; blend the window with the background
|
||||
sta REG_TM ; enable bg1/2 main screen
|
||||
lda #%0000 ; enable bg0 subscreen
|
||||
sta REG_TD ;
|
||||
|
||||
lda #%01100011 ; add bg0+backdrop+bg1 and half the result
|
||||
sta REG_CGADSUB
|
||||
lda #%00000010
|
||||
sta REG_CGWSEL
|
||||
|
||||
;---------------------------------------------------------
|
||||
; SETUP XMSNES
|
||||
;jsl BootSPC ; send code and initialize
|
||||
;jsl SPX_Transfer_LFT ; transfer frequency table (linear mode)
|
||||
|
||||
;ldx #TEST_PACKAGE ; load package
|
||||
;lda #:TEST_PACKAGE ;
|
||||
;jsl SPXP_InstallPackage ;
|
||||
|
||||
;ldx #0 ; load song 0
|
||||
;jsl ChangeSong
|
||||
|
||||
; song is playing now...
|
||||
;---------------------------------------------------------
|
||||
|
||||
lda #%10100001 ; enable vblank irq, enable joypad
|
||||
sta REG_NMITIMEN
|
||||
|
||||
cli ; enable interrupts
|
||||
wai
|
||||
|
||||
lda #0 ; reset darkness
|
||||
sta scr_fade ;
|
||||
sta REG_INIDISP ;
|
||||
|
||||
ldx #22000 ; set playback volume
|
||||
stx music_vol ;
|
||||
;jsl SPXM_SetVol ;
|
||||
|
||||
_mainloop:
|
||||
|
||||
;-----------------------------------
|
||||
; SCREEN FADE-IN
|
||||
|
||||
lda scr_fade
|
||||
cmp #255
|
||||
beq +
|
||||
clc
|
||||
adc #2
|
||||
bcc ++
|
||||
lda #255
|
||||
++
|
||||
sta scr_fade
|
||||
lsr
|
||||
lsr
|
||||
lsr
|
||||
lsr
|
||||
sta REG_INIDISP
|
||||
+ ;--------------------------------------
|
||||
|
||||
|
||||
jsl UpdateBG ; Update the background effect
|
||||
;jsl DrawSPCData ; Read SPC Ports and display them
|
||||
|
||||
bit inst_timer+1 ; timer to hide instructions
|
||||
bmi ++ ;
|
||||
rep #$20 ;
|
||||
lda inst_timer ;
|
||||
dea ;
|
||||
bpl + ;
|
||||
ldy #(25*32) ;
|
||||
ldx #32 ;
|
||||
jsl ClearText ;
|
||||
+ ;
|
||||
sta inst_timer ;
|
||||
sep #$20 ;
|
||||
++ ;
|
||||
|
||||
;jsl SPX_Routine ; call this every frame, or every so often
|
||||
|
||||
;--------------------------------------
|
||||
; slide music volume to full
|
||||
|
||||
rep #$20
|
||||
lda music_vol
|
||||
cmp #$FFFF
|
||||
beq +
|
||||
adc #44
|
||||
bcc ++
|
||||
lda #$FFFF
|
||||
++
|
||||
sta music_vol
|
||||
sep #$20
|
||||
xba
|
||||
; jsl SPXM_SetVol
|
||||
+ ;----------------------------------------
|
||||
|
||||
;---------------------------------------
|
||||
; if user presses left, decrease song#, load new song
|
||||
|
||||
sep #$20
|
||||
lda joypadc+1
|
||||
and #1
|
||||
beq +
|
||||
ldx current_song
|
||||
inx
|
||||
cpx #nsongs
|
||||
bcc ++
|
||||
ldx #nsongs-1
|
||||
++
|
||||
jsl ChangeSong
|
||||
+ ;-------------------------------------------------
|
||||
; if user presses right, increase song#, load new song
|
||||
|
||||
lda joypadc+1
|
||||
and #%10
|
||||
beq +
|
||||
ldx current_song
|
||||
dex
|
||||
bpl ++
|
||||
ldx #0
|
||||
++
|
||||
jsl ChangeSong
|
||||
+ ;--------------------------------------------------
|
||||
|
||||
;------------------------------------------------
|
||||
; if user presses A, play effect1, full volume, freq:4
|
||||
|
||||
lda joypadc
|
||||
and #%10000000
|
||||
beq +
|
||||
; A was pressed
|
||||
lda #$04 ; freq/priority
|
||||
xba
|
||||
lda effect1 ; sample#
|
||||
beq +
|
||||
tax
|
||||
lda #$77 ; volume
|
||||
jsl SPXS_Play
|
||||
+ ;-----------------------------------------------
|
||||
; if user presses B, play effect2, full volume, freq:4
|
||||
|
||||
lda joypadc+1
|
||||
and #%10000000
|
||||
beq +
|
||||
; B was pressed
|
||||
lda #$04 ; freq/priority
|
||||
xba
|
||||
lda effect2 ; sample#
|
||||
beq +
|
||||
tax
|
||||
lda #$77 ; volume
|
||||
jsl SPXS_Play
|
||||
+ ;-----------------------------------------------
|
||||
; if user presses X, play effect3, full volume, freq:4
|
||||
lda joypadc
|
||||
and #%1000000
|
||||
beq +
|
||||
; X was pressed
|
||||
lda #$04 ; freq/priority
|
||||
xba
|
||||
lda effect3 ; sample#
|
||||
beq +
|
||||
tax
|
||||
lda #$77 ; volume
|
||||
jsl SPXS_Play
|
||||
+ ;-----------------------------------------------
|
||||
; if user presses Y, play effect4, full volume, freq:3
|
||||
|
||||
lda joypadc+1
|
||||
and #%1000000
|
||||
beq +
|
||||
; Y was pressed
|
||||
lda #$03 ; freq/priority
|
||||
xba
|
||||
lda effect4 ; sample#
|
||||
beq +
|
||||
tax
|
||||
lda #$77 ; volume
|
||||
jsl SPXS_Play
|
||||
+ ;------------------------------------------------
|
||||
|
||||
ldx #0
|
||||
stx joypadc
|
||||
wai ; wait for vblank
|
||||
jmp _mainloop ; loop
|
||||
|
||||
;---------------------------------------------------------
|
||||
; this function gets called when the snes receives a song message from the spc
|
||||
MessageReceived:
|
||||
; a = message
|
||||
cmp #1
|
||||
bne +
|
||||
jsl FlashScreen ; #1 = flash screen message
|
||||
+
|
||||
rtl
|
||||
;---------------------------------------------------------
|
||||
|
||||
FlashScreen:
|
||||
lda #16
|
||||
sta scr_flash
|
||||
rtl
|
||||
|
||||
;---------------------------------------------------------
|
||||
|
||||
cs_jumptable:
|
||||
.dw CS_WAR
|
||||
.dw CS_ACID
|
||||
.dw CS_JOURNEY
|
||||
.dw CS_SATELLITE
|
||||
.dw CS_RUSINA
|
||||
|
||||
ChangeSong:
|
||||
; x = song
|
||||
stx current_song ; save song#
|
||||
|
||||
stz effect1 ; zero out sound effect indexes
|
||||
stz effect2
|
||||
stz effect3
|
||||
stz effect4
|
||||
|
||||
jsl SPXM_Reset ; queue reset playback
|
||||
jsl SPX_Flush ; flush
|
||||
|
||||
rep #$20 ; get song*2
|
||||
lda current_song
|
||||
asl
|
||||
tax
|
||||
sep #$20
|
||||
jmp (cs_jumptable,x) ; and jump
|
||||
|
||||
CS_WAR:
|
||||
ldx #STR_WAR_AUTHOR ; get author string
|
||||
phx
|
||||
ldx #STR_WAR_TITLE ; song title
|
||||
jmp CS_BEGINDRAWING
|
||||
CS_ACID: ; other songs
|
||||
ldx #STR_ACID_AUTHOR ; etc
|
||||
phx
|
||||
ldx #STR_ACID_TITLE
|
||||
jmp CS_BEGINDRAWING
|
||||
CS_JOURNEY:
|
||||
ldx #STR_JOURNEY_AUTHOR
|
||||
phx
|
||||
ldx #STR_JOURNEY_TITLE
|
||||
jmp CS_BEGINDRAWING
|
||||
CS_SATELLITE:
|
||||
ldx #STR_SATELLITE_AUTHOR
|
||||
phx
|
||||
ldx #STR_SATELLITE_TITLE
|
||||
jmp CS_BEGINDRAWING
|
||||
CS_RUSINA:
|
||||
ldx #STR_RUSINA_AUTHOR
|
||||
phx
|
||||
ldx #STR_RUSINA_TITLE
|
||||
jmp CS_BEGINDRAWING
|
||||
CS_BEGINDRAWING:
|
||||
|
||||
phx ;preserve
|
||||
|
||||
ldy #(8*32) ; clear text
|
||||
ldx #32
|
||||
jsl ClearText
|
||||
|
||||
ldy #(10*32)
|
||||
ldx #32
|
||||
jsl ClearText
|
||||
|
||||
plx ;restore
|
||||
|
||||
ldy #16+(8*32) ; draw title
|
||||
jsl DrawCentered
|
||||
plx
|
||||
ldy #16+(10*32) ; draw author
|
||||
jsl DrawCentered
|
||||
|
||||
ldx current_song ; get song#
|
||||
jsl SPXP_LoadSong ; transfer song
|
||||
|
||||
ldx current_song ; check if song is 4 (has sound effects)
|
||||
cpx #4 ;
|
||||
bne +
|
||||
|
||||
; load some sfx
|
||||
|
||||
ldx #0 ; hh.wav
|
||||
ldy #0
|
||||
jsl SPXP_LoadSample
|
||||
sta effect1
|
||||
ldx #1 ; ow.wav
|
||||
ldy #0
|
||||
jsl SPXP_LoadSample
|
||||
sta effect2
|
||||
ldx #2 ; sd.wav
|
||||
ldy #0
|
||||
jsl SPXP_LoadSample
|
||||
sta effect3
|
||||
ldx #3 ; OWWW.wav
|
||||
ldy #0
|
||||
jsl SPXP_LoadSample
|
||||
sta effect4
|
||||
|
||||
; be sure not to load too much stuff
|
||||
ldy #(25*32)
|
||||
ldx #32
|
||||
jsl ClearText
|
||||
ldx #STR_INST1 ; tell the user to push buttons
|
||||
ldy #(25*32)+16
|
||||
jsl DrawCentered
|
||||
bra ++
|
||||
+
|
||||
ldy #(25*32)
|
||||
ldx #32
|
||||
jsl ClearText
|
||||
ldx #STR_INST2 ; tell the user to push buttons
|
||||
ldy #(25*32)+16
|
||||
jsl DrawCentered
|
||||
++
|
||||
|
||||
ldx #300
|
||||
stx inst_timer
|
||||
|
||||
jsl SPXM_Play ; start playing song
|
||||
rtl ; return
|
||||
|
||||
;-------------------------------------------------------------------------------
|
||||
; TEXT RENDERING STUFF
|
||||
|
||||
DrawText:
|
||||
; x = source
|
||||
; y = offset
|
||||
stz REG_VMAIN ; setup vram increment stuff
|
||||
rep #$20 ; set destination address
|
||||
tya ;
|
||||
ora #($9000/2) ;
|
||||
sta REG_VMADDL ;
|
||||
tay ;
|
||||
sec ;
|
||||
sep #$20 ;
|
||||
_dt_loop:
|
||||
lda $0000, x ;
|
||||
beq _dt_exit ; exit when 0
|
||||
inx ; increment counter
|
||||
sbc #32 ; viewable ascii characters start at 32
|
||||
bpl + ; check for newline
|
||||
tya ; newline
|
||||
adc #32 ; edit vram address
|
||||
sta REG_VMADDL ;
|
||||
tay ;
|
||||
sec ;
|
||||
bra _dt_loop ; loop
|
||||
+
|
||||
sta REG_VMDATAL ; store value
|
||||
bra _dt_loop ; loop
|
||||
_dt_exit:
|
||||
rtl ; end
|
||||
|
||||
ClearText:
|
||||
; x = length
|
||||
; y = offset
|
||||
|
||||
stz REG_VMAIN ; setup vram pointer
|
||||
rep #$20 ;
|
||||
tya ;
|
||||
ora #($9000/2) ;
|
||||
sta REG_VMADDL ;
|
||||
sep #$20
|
||||
lda #$00 ; start clearing memory
|
||||
|
||||
_ct_loop:
|
||||
sta REG_VMDATAL ; store...
|
||||
dex ; count...
|
||||
bne _ct_loop ; loop...
|
||||
_ct_exit:
|
||||
sep #$20 ; restore 8-bit accu
|
||||
rtl ; end
|
||||
|
||||
ClearAllText:
|
||||
lda #%10000000 ; setup vram pointer
|
||||
sta REG_VMAIN ;
|
||||
ldx #($9000/2)
|
||||
stx REG_VMADDL
|
||||
|
||||
ldx #$100|(0<<10)|(1<<13) ; $100 = blank tile
|
||||
ldy #1024 ; 1024 = 32*32 tiles
|
||||
-
|
||||
stx REG_VMDATAL ; store value
|
||||
dey ; count..
|
||||
bne - ; loop
|
||||
rtl ; end
|
||||
|
||||
DrawCentered:
|
||||
; x = string address
|
||||
; y = line
|
||||
sty svar2
|
||||
stx svar1
|
||||
jsl strlen
|
||||
rep #$20
|
||||
txa
|
||||
sec
|
||||
sbc svar1
|
||||
lsr
|
||||
clc
|
||||
eor #$FFFF
|
||||
inc a
|
||||
adc svar2
|
||||
tay
|
||||
ldx svar1
|
||||
sep #$20
|
||||
jmp DrawText
|
||||
|
||||
DrawSPCData:
|
||||
lda #0
|
||||
xba
|
||||
|
||||
ldx #0
|
||||
stx svar1
|
||||
-
|
||||
lda REG_APUI00, x
|
||||
inx
|
||||
stx svar2
|
||||
pha
|
||||
lsr
|
||||
lsr
|
||||
lsr
|
||||
lsr
|
||||
clc
|
||||
tay
|
||||
lda HEX2ASCII, y
|
||||
ldx svar1
|
||||
sta custom_string,x
|
||||
inx
|
||||
pla
|
||||
and #$0F
|
||||
tay
|
||||
lda HEX2ASCII, y
|
||||
sta custom_string,x
|
||||
inx
|
||||
lda #32
|
||||
sta custom_string,x
|
||||
inx
|
||||
stx svar1
|
||||
ldx svar2
|
||||
cpx #4
|
||||
bne -
|
||||
ldy #11+(16*32)
|
||||
ldx #custom_string
|
||||
jsl DrawText
|
||||
rtl
|
||||
|
||||
;---------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
||||
; INITIALIZATION / EFFECTS
|
||||
|
||||
LoadBub:
|
||||
lda #%10000000
|
||||
sta REG_VMAIN
|
||||
ldx #$
|
||||
|
||||
BuildWindow:
|
||||
lda #%10000000 ; setup vram pointer
|
||||
sta REG_VMAIN
|
||||
ldx #$7C00/2
|
||||
stx REG_VMADDL
|
||||
ldx #0
|
||||
REP #$20
|
||||
-
|
||||
lda.l gfx_window, x ; load graphics
|
||||
sta REG_VMDATAL
|
||||
inx
|
||||
inx
|
||||
cpx #$120
|
||||
bne -
|
||||
SEP #$20
|
||||
LDA #-1 ; setup bg attributes
|
||||
sta REG_BG0VOFS
|
||||
stz REG_BG0VOFS
|
||||
|
||||
|
||||
lda #($11<<2)
|
||||
sta REG_BG0SC
|
||||
|
||||
ldy #($8800)/2
|
||||
sty REG_VMADDL
|
||||
|
||||
ldx #464
|
||||
ldy #1024
|
||||
- stx REG_VMDATAL
|
||||
dey
|
||||
bne -
|
||||
|
||||
ldy #($8980)/2
|
||||
sty REG_VMADDL
|
||||
ldx #1000|(2<<10)
|
||||
ldy #32
|
||||
- stx REG_VMDATAL
|
||||
dey
|
||||
bne -
|
||||
ldx #1000|(2<<10)
|
||||
ldy #32*11
|
||||
- stx REG_VMDATAL
|
||||
dey
|
||||
bne -
|
||||
ldx #1000|(2<<10)
|
||||
ldy #32
|
||||
- stx REG_VMDATAL
|
||||
dey
|
||||
bne -
|
||||
|
||||
lda #32 ; load palette
|
||||
sta REG_CGADD
|
||||
ldx #gfxp_window
|
||||
ldy #32
|
||||
lda #(REG_CGDATA&255)
|
||||
xba
|
||||
lda #:gfxp_window
|
||||
jsl DMA_TRANSFER
|
||||
rtl
|
||||
|
||||
LoadFont:
|
||||
lda #%10000000 ; setup vram pointer
|
||||
sta REG_VMAIN
|
||||
ldy #($7000/2)
|
||||
sty REG_VMADDL
|
||||
ldx #0
|
||||
rep #$20
|
||||
|
||||
-
|
||||
lda.l gfx_font, x ; load byte
|
||||
sta REG_VMDATAL ; store
|
||||
inx ; count
|
||||
inx
|
||||
cpx #$600 ; transfer $600*2 bytes
|
||||
bne -
|
||||
sep #$20 ; setup palette
|
||||
lda #0
|
||||
sta REG_CGADD
|
||||
sta REG_CGDATA
|
||||
sta REG_CGDATA
|
||||
lda #$FF ; white
|
||||
sta REG_CGDATA
|
||||
lda #$7F
|
||||
sta REG_CGDATA
|
||||
lda #%00000000 ; black
|
||||
sta REG_CGDATA
|
||||
sta REG_CGDATA
|
||||
|
||||
lda #-1 ; setup bg
|
||||
sta REG_BG2VOFS
|
||||
stz REG_BG2VOFS
|
||||
lda #($12<<2) ; source = $9000
|
||||
sta REG_BG2SC
|
||||
|
||||
lda #$03 ; set character offset
|
||||
sta REG_BG23NBA
|
||||
|
||||
rtl
|
||||
|
||||
LoadBG:
|
||||
lda #%10000000
|
||||
sta REG_VMAIN
|
||||
ldx #0
|
||||
stx REG_VMADDL
|
||||
|
||||
ldx #$1000
|
||||
; transfer data
|
||||
REP #$20
|
||||
|
||||
-
|
||||
lda.l gfx_bg-$1000, x
|
||||
sta REG_VMDATAL
|
||||
inx
|
||||
inx
|
||||
bpl -
|
||||
|
||||
|
||||
ldx #0
|
||||
stx REG_VMADDL
|
||||
- lda.l gfx_bg2, x
|
||||
sta REG_VMDATAL
|
||||
inx
|
||||
inx
|
||||
cpx #96
|
||||
bne -
|
||||
|
||||
sep #$20
|
||||
|
||||
lda #-1
|
||||
sta REG_BG1VOFS
|
||||
stz REG_BG1VOFS
|
||||
|
||||
lda #($10<<2)
|
||||
sta REG_BG1SC
|
||||
; setup bg
|
||||
ldy #$8000/2
|
||||
sty REG_VMADDL
|
||||
|
||||
ldy #(1<<10)
|
||||
-
|
||||
sty REG_VMDATAL
|
||||
iny
|
||||
cpy #896|(1<<10)
|
||||
bne -
|
||||
|
||||
ldy #$8000/2
|
||||
sty REG_VMADDL
|
||||
ldy #32*5
|
||||
ldx #2|(3<<10)
|
||||
-
|
||||
stx REG_VMDATAL
|
||||
dey
|
||||
bne -
|
||||
|
||||
ldy #32
|
||||
ldx #1|(3<<10)
|
||||
- stx REG_VMDATAL
|
||||
dey
|
||||
bne -
|
||||
|
||||
ldy #$84C0/2
|
||||
sty REG_VMADDL
|
||||
ldy #32
|
||||
ldx #0|(3<<10)
|
||||
- stx REG_VMDATAL
|
||||
dey
|
||||
bne -
|
||||
|
||||
ldy #32*8
|
||||
ldx #2|(3<<10)
|
||||
-
|
||||
stx REG_VMDATAL
|
||||
dey
|
||||
bne -
|
||||
|
||||
lda #48
|
||||
sta REG_CGADD
|
||||
|
||||
ldx #gfxp_bg2
|
||||
ldy #32
|
||||
lda #(REG_CGDATA & 255)
|
||||
xba
|
||||
lda #:gfxp_bg2
|
||||
jsl DMA_TRANSFER
|
||||
|
||||
rtl
|
||||
|
||||
BG_PALETTE:
|
||||
;.dw 0,0,1024,1024,2048,2048,2081,3105,3105,4129,4129,4129,5153,5153,6177,6210,6210,6210,6177,5153,5153,4129,4129,4129,3105,3105,2081,2048,2048,1024,1024,0,0,0,1024,1024,2048,2048,2081,3105,3105,4129,4129,4129,5153,5153,6177,6210,
|
||||
;.dw 6276,6276,7300,7300,8324,8324,8357,9381,9381,10405,10405,10405,11429,11429,12453,12486,12486,12486,12453,11429,11429,10405,10405,10405,9381,9381,8357,8324,8324,7300,7300,6276,6276,6276,7300,7300,8324,8324,8357,9381,9381,10405,10405,10405,11429,11429,12453,12486,
|
||||
.dw 4162,5186,5186,6243,6243,7267,8291,8291,9348,9348,10372,11396,11396,12453,12453,13477,14501,13477,12453,12453,11396,11396,10372,9348,9348,8291,8291,7267,6243,6243,5186,5186,4162,5186,5186,6243,6243,7267,8291,8291,9348,9348,10372,11396,11396,12453,12453,13477,
|
||||
;.dw 2116,2117,2117,3174,3174,3175,3176,3176,4233,4233,4234,4235,4235,5292,5292,5293,5294,5293,5292,5292,4235,4235,4234,4233,4233,3176,3176,3175,3174,3174,2117,2117,2116,2117,2117,3174,3174,3175,3176,3176,4233,4233,4234,4235,4235,5292,5292,5293, ;red
|
||||
UpdateBG:
|
||||
|
||||
clc
|
||||
lda bg_rippleL
|
||||
adc #99
|
||||
sta bg_rippleL
|
||||
bcs +
|
||||
rtl
|
||||
+
|
||||
|
||||
lda bg_ripple
|
||||
inc a
|
||||
rep #$20
|
||||
and #31
|
||||
sta bg_ripple
|
||||
asl
|
||||
tay
|
||||
sep #$20
|
||||
|
||||
lda #0
|
||||
sta REG_CGADD
|
||||
ldx #16
|
||||
|
||||
|
||||
lda scr_flash
|
||||
rep #$20
|
||||
and #31
|
||||
asl
|
||||
asl
|
||||
asl
|
||||
asl
|
||||
asl
|
||||
ora scr_flash
|
||||
asl
|
||||
asl
|
||||
asl
|
||||
asl
|
||||
asl
|
||||
ora scr_flash
|
||||
sta scr_flash+1
|
||||
sep #$20
|
||||
|
||||
cmp #0
|
||||
beq +
|
||||
dec scr_flash
|
||||
dec scr_flash
|
||||
dec scr_flash
|
||||
dec scr_flash
|
||||
+
|
||||
clc
|
||||
lda BG_PALETTE, y
|
||||
adc scr_flash+1
|
||||
sta REG_CGDATA
|
||||
lda BG_PALETTE+1, y
|
||||
adc scr_flash+2
|
||||
sta REG_CGDATA
|
||||
lda #16
|
||||
sta REG_CGADD
|
||||
|
||||
-
|
||||
lda BG_PALETTE, y
|
||||
adc scr_flash+1
|
||||
sta REG_CGDATA
|
||||
|
||||
lda BG_PALETTE+1, y
|
||||
adc scr_flash+2
|
||||
sta REG_CGDATA
|
||||
iny
|
||||
iny
|
||||
dex
|
||||
bne -
|
||||
|
||||
rtl
|
||||
|
||||
;-----------------------------------------------------------------------------------------------------------------------------------------------------------------
|
||||
; DMA
|
||||
|
||||
DMA_TRANSFER:
|
||||
; x = src
|
||||
; y = length
|
||||
; a = bank#
|
||||
; b = dest
|
||||
stz REG_DMAP0 ; set mode
|
||||
stx REG_A1T0L ; set source
|
||||
sta REG_A1B0 ; set bank#
|
||||
xba ;
|
||||
sta REG_BBAD0 ; set dest
|
||||
sty REG_DAS0L ; set #bytes
|
||||
lda #1 ; start transfer
|
||||
sta REG_MDMAEN
|
||||
rtl ; end
|
||||
|
||||
;----------------------------------------------------------------------------------------------------------------------------------------------------------
|
||||
; INTERRUPTS
|
||||
.index 16
|
||||
.accu 8
|
||||
|
||||
VBlank:
|
||||
sei
|
||||
rep #$20
|
||||
pha ; preserve a
|
||||
|
||||
lda joypad ; update last joypad state
|
||||
sta joypadl ;
|
||||
|
||||
sep #$20
|
||||
lda #1
|
||||
-
|
||||
bit $4212 ; check if joypad is ready
|
||||
bne - ; wait...
|
||||
rep #$20
|
||||
lda REG_JOY1L ; load joystate
|
||||
sta joypad ; save to memory
|
||||
eor joypadl ; mask with old state
|
||||
and joypad ; mask some more..
|
||||
sta joypadc ; store button 'clicks'
|
||||
|
||||
sep #$20
|
||||
lda REG_TIMEUP ; do something
|
||||
rep #$20
|
||||
pla ; restore a
|
||||
rti ; exit
|
||||
|
||||
;--------------------------------------------------------------------------------------
|
||||
; misc
|
||||
|
||||
strlen:
|
||||
; x = str address
|
||||
; returns x = str address + length
|
||||
-
|
||||
lda $0000, x
|
||||
beq +
|
||||
inx
|
||||
bra -
|
||||
+
|
||||
rtl
|
||||
|
||||
;-------------------------------------------------------------------------------------
|
||||
; STRINGS
|
||||
STR_HELP:
|
||||
.DB "Press left/right to", 1
|
||||
.db "change songs",0
|
||||
|
||||
STR_SPCDATA:
|
||||
.db "SPC Ports",0
|
||||
|
||||
HEX2ASCII:
|
||||
.db 48,49,50,51,52,53,54,55,56,57,65,66,67,68,69,70
|
||||
|
||||
STR_WAR_TITLE:
|
||||
.db "War in Middle Earth", 0
|
||||
STR_WAR_AUTHOR:
|
||||
.db "by Skaven", 0
|
||||
|
||||
STR_ACID_TITLE:
|
||||
.db "Acidjazzed Evening", 0
|
||||
STR_ACID_AUTHOR:
|
||||
.db "by Tempest", 0
|
||||
|
||||
STR_JOURNEY_TITLE:
|
||||
.db "Your Journey Awaits", 0
|
||||
STR_JOURNEY_AUTHOR:
|
||||
.db "by AlexG", 0
|
||||
|
||||
STR_SATELLITE_TITLE:
|
||||
.db "Satellite One",0
|
||||
STR_SATELLITE_AUTHOR:
|
||||
.db "by Purple Motion",0
|
||||
|
||||
STR_RUSINA_TITLE:
|
||||
.db "Rusinahumppa",0
|
||||
STR_RUSINA_AUTHOR:
|
||||
.db "by Croaker",0
|
||||
|
||||
STR_INST1:
|
||||
.db "Press A/B/X/Y for SFX",0
|
||||
|
||||
STR_INST2
|
||||
.db "Change songs with left/right",0
|
||||
|
||||
.ENDS
|
||||
@ -1,3 +0,0 @@
|
||||
[objects]
|
||||
main.obj
|
||||
spx_snes.obj
|
||||
@ -1,5 +0,0 @@
|
||||
rm *.obj
|
||||
rm *.smc
|
||||
wla-65816 -ov main.asm main.obj
|
||||
wla-65816 -ov spx_snes.asm spx_snes.obj
|
||||
wlalink -rvS main.link xmsnes.smc
|
||||
@ -1,42 +0,0 @@
|
||||
.MEMORYMAP
|
||||
SLOTSIZE $8000
|
||||
DEFAULTSLOT 0
|
||||
SLOT 0 $8000
|
||||
SLOT 1 $0000
|
||||
SLOT 2 $2000
|
||||
SLOTSIZE $40000
|
||||
SLOT 3 $8000
|
||||
.ENDME
|
||||
|
||||
.ROMBANKMAP
|
||||
BANKSTOTAL 3
|
||||
BANKSIZE $8000
|
||||
BANKS 2
|
||||
BANKSIZE $40000
|
||||
BANKS 1
|
||||
.ENDRO
|
||||
|
||||
.SMC
|
||||
|
||||
|
||||
.SNESHEADER
|
||||
|
||||
ID "SNES"
|
||||
|
||||
NAME "XMSNES " ; Title (can't be over 21 bytes)
|
||||
; "123456789012345678901" (just a guide)
|
||||
|
||||
SLOWROM ; Slow ROM
|
||||
LOROM ; LO ROM
|
||||
|
||||
|
||||
|
||||
CARTRIDGETYPE $00 ; $00 = ROM only, see WLA documentation for others
|
||||
ROMSIZE $08 ; $08 = 2 Mbits, see WLA doc for more..
|
||||
SRAMSIZE $00 ; No SRAM see WLA doc for more..
|
||||
COUNTRY $02 ; $01 = U.S. $00 = Japan, that's all I know
|
||||
LICENSEECODE $00 ; Just use $00
|
||||
VERSION $00 ; $00 = 1.00, $01 = 1.01, etc.
|
||||
|
||||
|
||||
.ENDSNES
|
||||
@ -1,179 +0,0 @@
|
||||
;-----------;
|
||||
; SNES.ASM \
|
||||
;---------------------------;
|
||||
; SNES Register Definitions ;
|
||||
; by eKid ;
|
||||
;---------------------------+--;
|
||||
; Information taken from- ;
|
||||
; QWERTIE'S SNES DOCUMENTATION ;
|
||||
; AND ;
|
||||
; YOSHI'S DOCUMENTS ;
|
||||
;------------------------------;
|
||||
|
||||
.EQU REG_INIDISP $2100 ; Screen Display Register 1B/W
|
||||
.EQU REG_OBSEL $2101 ; OAM Size Control 1B/W
|
||||
.EQU REG_OAMADDL $2102 ; OAM Access Address 2B/W
|
||||
.EQU REG_OAMADDH $2103
|
||||
.EQU REG_OAMDATA $2104 ; OAM Data Write 1B/W
|
||||
.EQU REG_BGMODE $2105 ; Screen Mode Register 1B/W
|
||||
.EQU REG_MOSAIC $2106 ; Screen Pixelation Register 1B/W
|
||||
.EQU REG_BG0SC $2107 ; BG0 VRAM Location Register 1B/W
|
||||
.EQU REG_BG1SC $2108 ; BG1 VRAM Location Register 1B/W
|
||||
.EQU REG_BG2SC $2109 ; BG2 VRAM Location Register 1B/W
|
||||
.EQU REG_BG3SC $210A ; BG3 VRAM Location Register 1B/W
|
||||
.EQU REG_BG01NBA $210B ; BG0/1 Character Bases 1B/W
|
||||
.EQU REG_BG23NBA $210C ; BG2/3 Character Bases 1B/W
|
||||
.EQU REG_BG0HOFS $210D ; BG0 Vertical Scroll 1B/W D
|
||||
.EQU REG_BG0VOFS $210E ; BG0 Vertical Scroll 1B/W D
|
||||
.EQU REG_BG1HOFS $210F ; BG1 Horizontal Scroll 1B/W D
|
||||
.EQU REG_BG1VOFS $2110 ; BG1 Vertical Scroll 1B/W D
|
||||
.EQU REG_BG2HOFS $2111 ; BG2 Horizontal Scroll 1B/W D
|
||||
.EQU REG_BG2VOFS $2112 ; BG2 Vertical Scroll 1B/W D
|
||||
.EQU REG_BG3HOFS $2113 ; BG3 Horiztonal Scroll 1B/W D
|
||||
.EQU REG_BG3VOFS $2114 ; BG3 Vertical Scroll 1B/W D
|
||||
.EQU REG_VMAIN $2115 ; Video Port Control 1B/W
|
||||
.EQU REG_VMADDL $2116 ; Video Port Address 2B/W
|
||||
.EQU REG_VMADDH $2117
|
||||
.EQU REG_VMDATAL $2118 ; Video Port Data 2B/W
|
||||
.EQU REG_VMDATAH $2119
|
||||
.EQU REG_M7SEL $211A ; MODE7 settings register 1B/W
|
||||
.EQU REG_M7A $211B ; MODE7 COSINE A 1B/W
|
||||
.EQU REG_M7B $211C ; MODE7 SINE A 1B/W
|
||||
.EQU REG_M7C $211D ; MODE7 SINE B 1B/W
|
||||
.EQU REG_M7D $211E ; MODE7 COSINE B 1B/W
|
||||
.EQU REG_M7X $211F ; MODE7 Center Pos X 1B/W D
|
||||
.EQU REG_M7Y $2120 ; MODE7 Center Pos Y 1B/W D
|
||||
.EQU REG_CGADD $2121 ; CGRAM Address 1B/W
|
||||
.EQU REG_CGDATA $2122 ; CGRAM Data Write 1B/W D
|
||||
.EQU REG_W01SEL $2123 ; Window Mask Settings Reg1 1B/W
|
||||
.EQU REG_W23SEL $2124 ; Window Mask Settings Reg2 1B/W
|
||||
.EQU REG_WH0 $2126 ; Window 1 Left Posision Reg 1B/W
|
||||
.EQU REG_WH1 $2127 ; Window 1 Right Position Reg 1B/W
|
||||
.EQU REG_WH2 $2128 ; Window 2 Left Position Reg 1B/W
|
||||
.EQU REG_WH3 $2129 ; Window 2 Right Position Reg 1B/W
|
||||
.EQU REG_WBGLOG $212A ; Mask Logic for Window 1 & 2 1B/W
|
||||
.EQU REG_WOBJLOG $212B ; Mask Logic for Color&OBJ Windows 1B/W
|
||||
.EQU REG_TM $212C ; Main Screen Designation 1B/W
|
||||
.EQU REG_TD $212D ; Sub-Screen Designation 1B/W
|
||||
.EQU REG_TMW $212E ; WinMask Main Designation Reg 1B/W
|
||||
.EQU REG_TSW $212F ; WinMask Sub Designation Reg 1B/W
|
||||
.EQU REG_CGWSEL $2130 ; Fixed Color/Screen Addition Reg 1B/W
|
||||
.EQU REG_CGADSUB $2131 ; +/- For Screens/BGs/OBJs 1B/W
|
||||
.EQU REG_COLDATA $2132 ; Fixed Color Data for +/- 1B/W
|
||||
.EQU REG_SETINI $2133 ; Screen Mode Select Reg 1B/W
|
||||
.EQU REG_MPYL $2134 ; Multiplication Result Low 1B/R
|
||||
.EQU REG_MPYM $2135 ; Middle 1B/R
|
||||
.EQU REG_MPYH $2136 ; High 1B/R
|
||||
.EQU REG_SLHV $2137 ; Sofware Latch For H/V Counter 1B/R
|
||||
.EQU REG_OAMDATAREAD $2138 ; OAM Data Read 1B/R
|
||||
.EQU REG_VMDATALREAD $2139 ; VRAM Data Read High 1B/R
|
||||
.EQU REG_VMDATAHREAD $213A ; VRAM Data Read Low 1B/R
|
||||
.EQU REG_CGDATAREAD $213B ; CGRAM Data Read 1B/R
|
||||
.EQU REG_OPHCT $213C ; X Scanline Location 1B/R D
|
||||
.EQU REG_OPVCT $213D ; Y Scanline Location 1B/R D
|
||||
.EQU REG_STAT77 $213E ; PPU Status Flag & Version 1B/R
|
||||
.EQU REG_STAT78 $213F ; PPU Status Flag & Version 1B/R
|
||||
.EQU REG_APUI00 $2140 ; Sound Register 1B/RW
|
||||
.EQU REG_APUI01 $2141 ; Sound Register 1B/RW
|
||||
.EQU REG_APUI02 $2142 ; Sound Register 1B/RW
|
||||
.EQU REG_APUI03 $2143 ; Sound Register 1B/RW
|
||||
.EQU REG_WMDATA $2180 ; WRAM Data Read/Write 1B/RW
|
||||
.EQU REG_WMADDL $2181 ; WRAM Address (Low) 1B/RW
|
||||
.EQU REG_WMADDM $2182 ; WRAM Address (Middle) 1B/RW
|
||||
.EQU REG_WMADDH $2183 ; WRAM Address (High) 1B/RW
|
||||
.EQU REG_NMITIMEN $4200 ; Counter Enable 1B/W
|
||||
.EQU REG_WRIO $4201 ; Programmable I/O Port 1B/W
|
||||
.EQU REG_WRMPYA $4202 ; Multiplicand 1B/W
|
||||
.EQU REG_WRMPYB $4203 ; Multiplier 1B/W
|
||||
.EQU REG_WRDIVL $4204 ; Dividend 2B/W ???
|
||||
.EQU REG_WRDIVH $4205 ; ???
|
||||
.EQU REG_WRDIVB $4206 ; Divisor ???
|
||||
.EQU REG_HTIMEL $4207 ; Video X IRQ Beam Pointer 2B/W
|
||||
.EQU REG_HTIMEH $4208
|
||||
.EQU REG_VTIMEL $4209 ; Video Y IRQ Beam Pointer 2B/W
|
||||
.EQU REG_VTIMEH $420A
|
||||
.EQU REG_MDMAEN $420B ; DMA Enable Register 1B/W
|
||||
.EQU REG_MHDMAEN $420C ; HDMA Enable Register 1B/W
|
||||
.EQU REG_MEMSEL $420D ; Cycle Speed Register 1B/W
|
||||
.EQU REG_RDNMI $4210 ; NMI Register 1B/R
|
||||
.EQU REG_TIMEUP $4211 ; Video IRQ Register 1B/RW
|
||||
.EQU REG_HVBJOY $4212 ; Status Register 1B/RW
|
||||
.EQU REG_RDIO $4213 ; Programmable I/O Port 1B/RW
|
||||
.EQU REG_RDDIVL $4214 ; Quotient Of Divide Result 2B/R
|
||||
.EQU REG_RDDIVH $4215
|
||||
.EQU REG_RDMPYL $4216 ; Multiplication Or Divide Result 2B/R
|
||||
.EQU REG_RDMPYH $4217
|
||||
.EQU REG_JOY1L $4218 ; Joypad #1 Status 2B/R
|
||||
.EQU REG_JOY1H $4219
|
||||
.EQU REG_JOY2L $421A ; Joypad #2 Status 2B/R
|
||||
.EQU REG_JOY2H $421B
|
||||
.EQU REG_JOY3L $421C ; Joypad #3 Status 2B/R
|
||||
.EQU REG_JOY3H $421D
|
||||
.EQU REG_JOY4L $421E ; Joypad #4 Status 2B/R
|
||||
.EQU REG_JOY4H $421F
|
||||
|
||||
.EQU REG_DMAP0 $4300 ; DMA Control Register 1B/W
|
||||
.EQU REG_BBAD0 $4301 ; DMA Destination Register 1B/W
|
||||
.EQU REG_A1T0L $4302 ; DMA Source Address 2B/W
|
||||
.EQU REG_A1T0H $4303
|
||||
.EQU REG_A1B0 $4304 ; Source Bank Address 1B/W
|
||||
.EQU REG_DAS0L $4305 ; DMA Transfer size/HDMA Address 2B/W
|
||||
.EQU REG_DAS0H $4306
|
||||
.EQU REG_NTRL0 $430A ; Number Of Lines For HDMA 1B/W
|
||||
.EQU REG_DMAP1 $4310 ; DMA 1
|
||||
.EQU REG_BBAD1 $4311
|
||||
.EQU REG_A1T1L $4312
|
||||
.EQU REG_A1T1H $4313
|
||||
.EQU REG_A1B1 $4314
|
||||
.EQU REG_DAS1L $4315
|
||||
.EQU REG_DAS1H $4316
|
||||
.EQU REG_NTRL1 $431A
|
||||
.EQU REG_DMAP2 $4310 ; DMA 2
|
||||
.EQU REG_BBAD2 $4311
|
||||
.EQU REG_A1T2L $4312
|
||||
.EQU REG_A1T2H $4313
|
||||
.EQU REG_A1B2 $4314
|
||||
.EQU REG_DAS2L $4315
|
||||
.EQU REG_DAS2H $4316
|
||||
.EQU REG_NTRL2 $431A
|
||||
.EQU REG_DMAP3 $4310 ; DMA 3
|
||||
.EQU REG_BBAD3 $4311
|
||||
.EQU REG_A1T3L $4312
|
||||
.EQU REG_A1T3H $4313
|
||||
.EQU REG_A1B3 $4314
|
||||
.EQU REG_DAS3L $4315
|
||||
.EQU REG_DAS3H $4316
|
||||
.EQU REG_NTRL3 $431A
|
||||
.EQU REG_DMAP4 $4310 ; DMA 4
|
||||
.EQU REG_BBAD4 $4311
|
||||
.EQU REG_A1T4L $4312
|
||||
.EQU REG_A1T4H $4313
|
||||
.EQU REG_A1B4 $4314
|
||||
.EQU REG_DAS4L $4315
|
||||
.EQU REG_DAS4H $4316
|
||||
.EQU REG_NTRL4 $431A
|
||||
.EQU REG_DMAP5 $4310 ; DMA 5
|
||||
.EQU REG_BBAD5 $4311
|
||||
.EQU REG_A1T5L $4312
|
||||
.EQU REG_A1T5H $4313
|
||||
.EQU REG_A1B5 $4314
|
||||
.EQU REG_DAS5L $4315
|
||||
.EQU REG_DAS5H $4316
|
||||
.EQU REG_NTRL5 $431A
|
||||
.EQU REG_DMAP6 $4310 ; DMA 6
|
||||
.EQU REG_BBAD6 $4311
|
||||
.EQU REG_A1T6L $4312
|
||||
.EQU REG_A1T6H $4313
|
||||
.EQU REG_A1B6 $4314
|
||||
.EQU REG_DAS6L $4315
|
||||
.EQU REG_DAS6H $4316
|
||||
.EQU REG_NTRL6 $431A
|
||||
.EQU REG_DMAP7 $4310 ; DMA 7
|
||||
.EQU REG_BBAD7 $4311
|
||||
.EQU REG_A1T7L $4312
|
||||
.EQU REG_A1T7H $4313
|
||||
.EQU REG_A1B7 $4314
|
||||
.EQU REG_DAS7L $4315
|
||||
.EQU REG_DAS7H $4316
|
||||
.EQU REG_NTRL7 $431A
|
||||
.EQU REG_FBNANACNT $FEED ; Banana Register... 1B/RW
|
||||
@ -1,701 +0,0 @@
|
||||
;------------------------------------------------------------------------------------------------------------------------
|
||||
; Copyright (c) 2007, Mukunda Johnson
|
||||
;
|
||||
; All rights reserved.
|
||||
;
|
||||
; Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
|
||||
;
|
||||
; * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
|
||||
; * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
|
||||
; * Neither the name of the <ORGANIZATION> nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
|
||||
;
|
||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
; PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
; LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
; NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;-----------------------------------------------------------------------------------
|
||||
|
||||
.equ REG_APUI00 $2140
|
||||
.equ REG_APUI01 $2141
|
||||
.equ REG_APUI02 $2142
|
||||
.equ REG_APUI03 $2143
|
||||
|
||||
.include "memmap.inc" ; replace with your memory definitions
|
||||
|
||||
.MACRO SPX_RECEIVE_MESSAGE
|
||||
sta spx_message
|
||||
and #15
|
||||
jsl MessageReceived ; SET THIS TO YOUR MESSAGE HANDLER
|
||||
.ENDM
|
||||
|
||||
.define SPX_STACK_SIZE $10 ; increase stack size if neccesary
|
||||
|
||||
.define SPX_XMSOFFSET $2100
|
||||
|
||||
.MACRO SPX_SYNC
|
||||
lda spx_validation ; load validation
|
||||
- cmp REG_APUI03 ; sync
|
||||
bne -
|
||||
.ENDM
|
||||
|
||||
.ramsection "spx_var" BANK 0 SLOT 1
|
||||
spx_spvar: db
|
||||
spx_validation: db
|
||||
spx_package_adr: dsb 3
|
||||
|
||||
spx_stack: dsb SPX_STACK_SIZE*4 ; FIFO stack
|
||||
spx_stack_r: dw ; stack read position
|
||||
spx_stack_w: dw ; stack write position
|
||||
|
||||
spx_var1: dw
|
||||
spx_var2: dw
|
||||
spx_var3: dw
|
||||
spx_var4: dw
|
||||
|
||||
spx_message: db
|
||||
|
||||
ddd: db
|
||||
|
||||
.ends
|
||||
|
||||
.bank 0
|
||||
.SECTION "SPX_SNES"
|
||||
|
||||
spx_binary:
|
||||
.incbin "spx_binaries\spx_core.bin"
|
||||
spx_lft:
|
||||
.incbin "spx_binaries\spx_lft.bin"
|
||||
spx_aft:
|
||||
.incbin "spx_binaries\spx_aft.bin"
|
||||
spx_aftf:
|
||||
.incbin "spx_binaries\spx_aftf.bin"
|
||||
|
||||
.INDEX 16
|
||||
|
||||
;----------------------------------------------------------------------------------------------------
|
||||
BootSPC:
|
||||
ldx #spx_binary
|
||||
lda #:spx_binary
|
||||
|
||||
; x = source address (word) 16-BIT INDEX
|
||||
; a = bank (byte) 8-BIT AKKU
|
||||
|
||||
sei ; disable interrupts during upload
|
||||
|
||||
stx spx_var1 ; store source address in var1
|
||||
sta spx_var1+2 ; store bank
|
||||
|
||||
REP #$20 ; 16-bit akku
|
||||
lda #$BBAA ; Check if SPC is ready
|
||||
- cmp REG_APUI00 ;
|
||||
bne - ;
|
||||
|
||||
SEP #$20 ; 8-bit akku
|
||||
ldy #0 ; reset data counter
|
||||
lda #0 ; reset port0 data (for protocol)
|
||||
xba ; swap out
|
||||
|
||||
; load first block
|
||||
lda #$01 ; port1 = NOT 0
|
||||
sta REG_APUI01 ;
|
||||
|
||||
REP #$20 ; 16-bit akku
|
||||
lda [spx_var1], y ; load data transfer address
|
||||
iny ; increase data pointer
|
||||
iny ;
|
||||
sta REG_APUI02 ; ports2/3 = TRANSFER ADDRESS
|
||||
|
||||
SEP #$20 ; 8-bit akku
|
||||
lda #$CC ; port0 = $CC (protocol)
|
||||
sta REG_APUI00 ;
|
||||
|
||||
- cmp REG_APUI00 ; wait for SPC reply
|
||||
bne - ;
|
||||
|
||||
REP #$20 ; 16-bit akku
|
||||
lda [spx_var1], y ; load data LENGTH
|
||||
tax ; transfer to X
|
||||
SEP #$20 ; 8-bit akku
|
||||
iny ; increase data pointer
|
||||
iny ;
|
||||
lda [spx_var1], y ; load first byte (real data)
|
||||
iny ; increase pointer
|
||||
sta REG_APUI01 ; port1 = data
|
||||
|
||||
lda #0 ; port0 = 0 (start sending data)
|
||||
sta REG_APUI00 ;
|
||||
|
||||
- cmp REG_APUI00 ; wait for SPC reply
|
||||
bne - ;
|
||||
|
||||
dex ; prepare loop
|
||||
xba ; swap counter/data
|
||||
|
||||
scr_data_loop:
|
||||
lda [spx_var1], y ; load byte
|
||||
iny ; inc pointer
|
||||
xba ; swap to counter
|
||||
|
||||
- cmp REG_APUI00 ; check/wait for SPC reply
|
||||
bne - ;
|
||||
|
||||
ina ; increase counter
|
||||
REP #$20 ; port1 = data
|
||||
sta REG_APUI00 ; port0 = counter
|
||||
SEP #$20 ;
|
||||
|
||||
xba ; swap to data
|
||||
|
||||
dex ; decrease loop counter
|
||||
bne scr_data_loop ; loop
|
||||
|
||||
xba ; swap to counter
|
||||
|
||||
- cmp REG_APUI00 ; check/wait for SPC reply
|
||||
bne - ;
|
||||
|
||||
xba ; swap to data
|
||||
|
||||
REP #$20 ; 16-bit akku
|
||||
pha ; preserve
|
||||
lda [spx_var1], y ; load next block size
|
||||
tax ; transfer to X
|
||||
pla ; restore
|
||||
SEP #$20 ; 8-bit akku
|
||||
|
||||
iny ; increase data pointer
|
||||
iny ;
|
||||
cpx #0 ; load another block? (if block size is 0, then no)
|
||||
beq scr_terminate ; ...
|
||||
|
||||
REP #$20 ; yes..
|
||||
pha ; preserve
|
||||
lda [spx_var1], y ; load something
|
||||
tax ; transfer to X
|
||||
pla ; restore
|
||||
SEP #$20 ; 8-bit akku
|
||||
|
||||
iny ; increase pointer
|
||||
iny ;
|
||||
lda #1 ; port1 = NOT 0
|
||||
sta REG_APUI01 ;
|
||||
stx REG_APUI02 ; port2/3 = transfer address
|
||||
xba ; swap to counter
|
||||
ina ; counter += 2, != 0
|
||||
- ina ;
|
||||
beq - ;
|
||||
|
||||
sta REG_APUI00 ; store in port0
|
||||
|
||||
- cmp REG_APUI00 ; wait for SPC reply
|
||||
bne - ;
|
||||
bra scr_data_loop ; jump to data loop
|
||||
|
||||
scr_terminate: ; no...
|
||||
stz REG_APUI01 ; port1 = 0
|
||||
REP #$20 ; 16-bit akku
|
||||
pha ; preserve
|
||||
lda [spx_var1], y ; load program start address
|
||||
tax ; transfer to X
|
||||
pla ; restore
|
||||
SEP #$20 ; 8-bit akku
|
||||
|
||||
stx REG_APUI02 ; port2/3 = program start address
|
||||
xba ; swap to counter
|
||||
ina ; counter += 2, != 0
|
||||
- ina ;
|
||||
beq - ;
|
||||
|
||||
sta REG_APUI00 ; port0 = counter
|
||||
- cmp REG_APUI00 ; wait for SPC reply
|
||||
bne - ;
|
||||
; TRANSFER COMPLETE.
|
||||
cli ; enable interrupts
|
||||
|
||||
jmp SPX_Init ; Initialize
|
||||
;-----------------------------------------------------------------------------------------------------
|
||||
SPX_Init:
|
||||
lda #0 ; reset validation
|
||||
sta spx_validation
|
||||
sta spx_stack_w ; reset stack read/write
|
||||
sta spx_stack_r
|
||||
|
||||
REP #$20
|
||||
lda #$FEED ; initial sync
|
||||
- cmp REG_APUI00 ;
|
||||
bne -
|
||||
SEP #$20
|
||||
RTL
|
||||
|
||||
;-----------------------------------------------------------------------------------------------------
|
||||
SPX_Transfer_XMS:
|
||||
; ayy = 24-bit address
|
||||
sty spx_var1 ; save address
|
||||
sta spx_var2
|
||||
rep #$20 ; 16bit everything
|
||||
rep #$10
|
||||
lda [spx_var1] ; load length
|
||||
tax ; x = length/3
|
||||
ldy #SPX_XMSOFFSET
|
||||
lda spx_var1
|
||||
pha
|
||||
sep #$20
|
||||
lda spx_var2
|
||||
jsl SPX_Transfer
|
||||
|
||||
ply
|
||||
rtl
|
||||
;-----------------------------------------------------------------------------------------------------
|
||||
.accu 8
|
||||
SPX_Transfer_LFT:
|
||||
sep #$20 ; 8-bit akku
|
||||
rep #$10 ; 16-bit index
|
||||
ldx #(768/3) ; set transfer length (bytes/3)
|
||||
ldy #(spx_lft & 65535) ; load snes offset
|
||||
phy ; push
|
||||
ldy #$300 ; $300-$5FF = linear frequency LUT
|
||||
lda #:spx_lft ; get bank#
|
||||
|
||||
JSL SPX_Transfer ; transfer data
|
||||
|
||||
ply ; free stack
|
||||
|
||||
lda.b #$1C ; set table
|
||||
sta REG_APUI02 ;
|
||||
stz REG_APUI01 ;
|
||||
JSL SPX_SEND ;
|
||||
|
||||
RTL ; return
|
||||
|
||||
;-----------------------------------------------------------------------------------------------------
|
||||
SPX_Transfer_AFT:
|
||||
sep #$20 ; 8-bit akku
|
||||
rep #$10 ; 16-bit index
|
||||
ldx #(768/3) ; set transfer length (bytes/3)
|
||||
ldy #(spx_aft & 65535) ; load snes offset
|
||||
phy ; push
|
||||
ldy #$300 ; $300-$5FF = amiga period LUT
|
||||
lda #:spx_aft ; get bank#
|
||||
JSL SPX_Transfer ; transfer data
|
||||
ply ; free stack
|
||||
|
||||
ldx #1365 ; 4096/3, rounded down
|
||||
ldy #(spx_aftf & 65535) ; load snes offset
|
||||
phy ; push
|
||||
ldy #$F000 ; $F000-$FFFF = amiga->freq LUT
|
||||
lda #:spx_aftf ; get bank#
|
||||
JSL SPX_Transfer ; transfer data
|
||||
ply ; free stack
|
||||
lda #$1C ; set table
|
||||
sta REG_APUI02 ;
|
||||
lda #$01 ;
|
||||
sta REG_APUI01 ;
|
||||
JSL SPX_SEND ;
|
||||
RTL ; return
|
||||
|
||||
;-----------------------------------------------------------------------------------------------------
|
||||
.INDEX 16
|
||||
.ACCU 8
|
||||
|
||||
.MACRO SPX_TRANSFER_INCPOINTER
|
||||
iny ; increase pointer
|
||||
iny ;
|
||||
bpl ++ ; check for overflow
|
||||
cpy #$8001 ; check for an overflow reading
|
||||
bne + ; fix data if so
|
||||
dey ;
|
||||
dey ;
|
||||
lda [spx_var1], y ; read low byte
|
||||
sta REG_APUI00 ; store
|
||||
ldy #$0000 ; read high byte
|
||||
inc spx_var1+2 ; next bank
|
||||
lda [spx_var1], y ;
|
||||
sta REG_APUI01 ;
|
||||
iny ;
|
||||
lda spx_validation ;
|
||||
xba ;
|
||||
bra ++ ;
|
||||
+ ; if not just increase bank#
|
||||
inc spx_var1+2 ; increase bank#
|
||||
ldy #$0000 ; reset counter
|
||||
++
|
||||
.ENDM
|
||||
|
||||
SPX_Transfer_SAMP:
|
||||
sei ; $14 = SAMPLE TRANSFER
|
||||
sta spx_var1+2 ;
|
||||
SPX_SYNC ;
|
||||
lda #$14 ;
|
||||
jmp SPX_TRANSFER_MOD;
|
||||
|
||||
SPX_Transfer:
|
||||
; SPX_Transfer
|
||||
; parameters:
|
||||
; a = file bank :8
|
||||
; x = length/4 :16
|
||||
; y = spc offset :16
|
||||
; stack:1 = snes_offset :16
|
||||
|
||||
; types
|
||||
; 0 = xms
|
||||
; 1 = freq table
|
||||
|
||||
sei ; disable interrupts
|
||||
|
||||
sta spx_var1+2 ; store bank#
|
||||
|
||||
SPX_SYNC ; sync with spc
|
||||
|
||||
lda #$1A ; $1A = GENERIC TRANSFER
|
||||
SPX_TRANSFER_MOD:
|
||||
sta REG_APUI02 ; set message type
|
||||
|
||||
REP #$20 ; set spc write position
|
||||
tya ;
|
||||
SEP #$20 ;
|
||||
sta REG_APUI00 ;
|
||||
xba ;
|
||||
sta REG_APUI01 ;
|
||||
|
||||
lda spx_validation ; validate data
|
||||
eor #128 ;
|
||||
ora #1
|
||||
sta REG_APUI03 ;
|
||||
- cmp REG_APUI03 ; wait for spc to respond
|
||||
bne -
|
||||
|
||||
; eor #128 ; prepare transfer mode
|
||||
|
||||
sta spx_validation ; save
|
||||
|
||||
REP #$20 ; 16-bit akku
|
||||
lda 4, S ; load file offset sp+4
|
||||
|
||||
sec ; set carry
|
||||
sbc #$8000 ; subtract
|
||||
tay ; transfer to y
|
||||
SEP #$20 ; 8-bit akku
|
||||
lda #$80 ; set offset in var1
|
||||
stz spx_var1 ; reset mem pointers
|
||||
sta spx_var1+1 ;
|
||||
|
||||
REP #$20 ; 16-bit akku
|
||||
|
||||
_stf_start: ; loop:
|
||||
|
||||
lda [spx_var1], y ; load data
|
||||
sta spx_var3 ; save
|
||||
|
||||
SPX_TRANSFER_INCPOINTER
|
||||
|
||||
sep #$20
|
||||
lda [spx_var1], y ; get third byte
|
||||
|
||||
iny ; increase pointer
|
||||
bpl +
|
||||
ldy #$0000
|
||||
inc spx_var1+2
|
||||
+
|
||||
sta spx_spvar ; store
|
||||
lda spx_validation ; get validation
|
||||
eor #128 ;
|
||||
sta spx_validation ; update
|
||||
eor #128 ; reverse
|
||||
|
||||
phx ; preserve
|
||||
ldx spx_spvar ; get ready
|
||||
|
||||
- cmp REG_APUI03 ; sync with spc
|
||||
bne - ;
|
||||
|
||||
lda spx_var3 ; load byte1
|
||||
sta REG_APUI00 ; store byte1
|
||||
lda spx_var3+1 ; load byte2
|
||||
sta REG_APUI01 ; store byte2
|
||||
stx REG_APUI02 ; store byte3/validation
|
||||
plx ; restore
|
||||
rep #$20
|
||||
|
||||
dex ; decrease counter
|
||||
bne _stf_start ; loop until finished
|
||||
|
||||
sep #$20
|
||||
|
||||
stz REG_APUI03 ; send 0
|
||||
stz spx_validation
|
||||
lda #0
|
||||
- cmp REG_APUI03 ; wait for reply
|
||||
bne -
|
||||
|
||||
cli ; enable interrupts
|
||||
RTL ; return --make sure higher function frees stack space
|
||||
|
||||
;--------------------------------------------------------------------------------------------------------
|
||||
.index 16
|
||||
SPX_Queue:
|
||||
; a = $00/$01 message
|
||||
; x = $02/$03 params
|
||||
; accumulator can be 8 or 16 bit, do not read anything with it
|
||||
ldy spx_stack_w ; load stack position
|
||||
sta spx_stack, y ; store bytes0/1
|
||||
iny ; increase pointer
|
||||
iny
|
||||
txa ; get high word
|
||||
sta spx_stack, y ; store bytes 2/3
|
||||
iny ; increase pointer
|
||||
iny
|
||||
cpy #SPX_STACK_SIZE*4 ; wrap to stack size
|
||||
bcc +
|
||||
ldy #0
|
||||
+
|
||||
sty spx_stack_w ; save stack position
|
||||
rtl
|
||||
|
||||
;---------------------------------------------------------------------------------------------------------
|
||||
.accu 8
|
||||
SPX_Routine:
|
||||
; get messages
|
||||
lda REG_APUI00 ; check if port0 is different
|
||||
cmp spx_message
|
||||
beq +
|
||||
SPX_RECEIVE_MESSAGE ; if so then a message was received
|
||||
+
|
||||
lda spx_validation ; check if spc has processed last message
|
||||
cmp REG_APUI03
|
||||
beq +
|
||||
rtl ; not ready
|
||||
+
|
||||
ldy spx_stack_r ; load stack read position
|
||||
cpy spx_stack_w ; exit function if it equals write position (no messages)
|
||||
bne +
|
||||
rtl
|
||||
+
|
||||
lda spx_stack, y ; load byte0
|
||||
sta REG_APUI00 ; store
|
||||
iny
|
||||
lda spx_stack, y ; load byte1
|
||||
sta REG_APUI01 ; store
|
||||
iny
|
||||
lda spx_stack, y ; load byte2
|
||||
sta REG_APUI02 ; store
|
||||
iny
|
||||
lda spx_stack, y ; load byte3
|
||||
lda spx_validation ; add validation
|
||||
and #128
|
||||
eor #128
|
||||
ora spx_stack, y ; store
|
||||
sta REG_APUI03 ; message dispatched
|
||||
sta spx_validation ; save validation
|
||||
|
||||
iny
|
||||
|
||||
cpy #SPX_STACK_SIZE*4 ; wrap read counter to stack size
|
||||
bcc +
|
||||
ldy #0
|
||||
+
|
||||
sty spx_stack_r ; save
|
||||
|
||||
rtl
|
||||
|
||||
SPX_Flush: ; flushes queue
|
||||
jsl SPX_Routine ; call routine
|
||||
ldy spx_stack_r ; check for more messages
|
||||
cpy spx_stack_w
|
||||
bne SPX_Flush ; loop
|
||||
rtl ; exit
|
||||
|
||||
SPXM_Play:
|
||||
ldx #$1E ; $1E = play message
|
||||
jmp SPX_Queue
|
||||
|
||||
SPXM_BuildDir:
|
||||
ldx #$1B ; $1B = build directory
|
||||
jmp SPX_Queue
|
||||
|
||||
SPXM_Reset: ; blocking function
|
||||
ldx #$1D ; $1D = RESET XMS
|
||||
jmp SPX_Queue
|
||||
|
||||
SPXM_SetVol:
|
||||
; a = volume
|
||||
ldx #$18 ; $18 = set XM playback volume
|
||||
jmp SPX_Queue
|
||||
|
||||
SPX_SetVol:
|
||||
; a = volume L } 16bit akku
|
||||
; b = volume R } resets afterwards
|
||||
ldx #$19 ; $19 = change main volume
|
||||
jmp SPX_Queue
|
||||
|
||||
.accu 8
|
||||
.index 16
|
||||
SPXS_Play:
|
||||
; a = volume [llllrrrr]
|
||||
; x = sample#/priority/frequency [0ccfffffssssssss]
|
||||
|
||||
pha ; rearrange data
|
||||
rep #$20
|
||||
txa
|
||||
sep #$20
|
||||
pha
|
||||
rep #$20
|
||||
and #$FF00
|
||||
ora #$20 ; $20 = play sample
|
||||
tax
|
||||
sep #$20
|
||||
pla
|
||||
xba
|
||||
pla
|
||||
rep #$20
|
||||
|
||||
jsl SPX_Queue
|
||||
sep #$20
|
||||
rtl
|
||||
|
||||
SPXS_SetParam:
|
||||
; a = index
|
||||
; x = param
|
||||
xba ; rearrange data
|
||||
tax
|
||||
xba
|
||||
rep #$20
|
||||
ldx #$21 ; $21 = message
|
||||
jsl SPX_Queue ; queue
|
||||
sep #$20
|
||||
rtl
|
||||
|
||||
SPX_SEND: ; blocking send
|
||||
lda spx_validation ; get validation
|
||||
eor #128 ; change
|
||||
sta REG_APUI03 ; set port data
|
||||
sta spx_validation ; save validation
|
||||
- cmp REG_APUI03 ; wait for spc reply
|
||||
bne -
|
||||
|
||||
RTL ; exit
|
||||
|
||||
SPXP_InstallPackage:
|
||||
; x = address (16-bit) ;
|
||||
; a = bank#
|
||||
stx spx_package_adr ; store offset
|
||||
sta spx_package_adr+2 ; store bank
|
||||
rtl
|
||||
|
||||
SPXP_LoadSong:
|
||||
; x = index (16-bit)
|
||||
|
||||
sep #$20 ; 8bit akku
|
||||
txa ; a=x
|
||||
sta $4202 ; multiply a*3
|
||||
lda #3 ;
|
||||
sta $4203 ; 8 cycles... ; ...
|
||||
|
||||
; setup send
|
||||
rep #$20 ; read package address
|
||||
|
||||
lda #$10
|
||||
nop
|
||||
nop
|
||||
nop ; small delay
|
||||
clc
|
||||
adc $4216 ; add multiplication result
|
||||
tay ; y=result
|
||||
|
||||
lda spx_package_adr ; read package address
|
||||
adc [spx_package_adr], y ; add song offset
|
||||
ora #$8000 ;
|
||||
pha ; save result
|
||||
sep #$20 ; 8bit akku
|
||||
lda spx_package_adr+2 ; load bank#
|
||||
iny
|
||||
iny
|
||||
adc [spx_package_adr], y ; add song offset
|
||||
ply ; restore address
|
||||
|
||||
jsl SPX_Transfer_XMS ; transfer song
|
||||
|
||||
; transfer samples
|
||||
|
||||
SPX_SYNC
|
||||
|
||||
lda #$17 ; ask for sample requests
|
||||
sta REG_APUI02
|
||||
jsl SPX_SEND
|
||||
--
|
||||
|
||||
; message received
|
||||
lda REG_APUI02 ; satisfy request
|
||||
cmp #$9C ; 9c = no more samples
|
||||
beq +
|
||||
ldx REG_APUI00
|
||||
ldy #0
|
||||
jsl SPXP_LoadSample ; send sample
|
||||
|
||||
jsl SPX_SEND ; sync
|
||||
|
||||
jmp --
|
||||
+
|
||||
rtl
|
||||
|
||||
SPXP_LoadSample:
|
||||
; x = index (16-bit)
|
||||
; y = spc address, 0=use next available
|
||||
|
||||
rep #$20 ; 16-bit akku
|
||||
txa ; a=x
|
||||
sta spx_var1 ; save
|
||||
asl ; shift
|
||||
adc spx_var1 ; add (a = index*3 now)
|
||||
phy
|
||||
ldy #4
|
||||
adc [spx_package_adr],y ; add sample table offset
|
||||
|
||||
tay
|
||||
clc
|
||||
lda spx_package_adr
|
||||
adc [spx_package_adr], y
|
||||
ora #$8000 ; wrap around ROM area if overflow
|
||||
sta spx_var1
|
||||
|
||||
sep #$20
|
||||
lda spx_package_adr+2
|
||||
iny
|
||||
iny
|
||||
adc [spx_package_adr], y
|
||||
adc #0 ; increase on overflow
|
||||
sta spx_var2
|
||||
|
||||
rep #$20
|
||||
|
||||
lda [spx_var1] ; load sample size/3
|
||||
tax ; transfer to x
|
||||
|
||||
lda spx_var1 ; load snes address
|
||||
|
||||
ply
|
||||
pha
|
||||
sep #$20 ; 8-bit akku
|
||||
lda spx_var2 ; load bank#
|
||||
|
||||
jsl SPX_Transfer_SAMP ; transfer data
|
||||
ply ; restore stack
|
||||
|
||||
lda spx_validation ; get sample #
|
||||
eor #128
|
||||
sta REG_APUI03
|
||||
- cmp REG_APUI03
|
||||
bne -
|
||||
sta spx_validation
|
||||
|
||||
lda REG_APUI00
|
||||
|
||||
rtl ; return
|
||||
|
||||
.ENDS
|
||||
Binary file not shown.
@ -1,12 +0,0 @@
|
||||
graphic source locations
|
||||
|
||||
$0000-$7000 / $0000-$0380 : gfx_bg
|
||||
$7000-$7600 / $0380-$03E0 : gfx_font
|
||||
|
||||
$7C00-$7D20 : $03E0-$03E9 : gfx_window
|
||||
|
||||
tile map locations
|
||||
|
||||
$8000-$8800 : $10 : background (bg1)
|
||||
$8800-$8C00 : $11 : window (bg0)
|
||||
$9000-$9C00 : $12 : text (bg2)
|
||||
Loading…
x
Reference in New Issue
Block a user